Santiago Sánchez-Solano

65 papers A 1B 11C 3Journal 30Unranked 19
YearRankTypeTitle / Venue / Authors
2024 — conf
Cryptographic Security Through a Hardware Root of Trust.
ARC
Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Pablo Navarro-Torrero, Apurba Karmakar, Carlos Fernández García, Erica Tena-Sánchez, Francisco Eugenio Potestad-Ordóñez, Alejandro Casado-Galán, Pau Ortega-Castro, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández, Piedad Brox
2024 J jnl
Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management.
Sensors
Santiago Sánchez-Solano, Luis F. Rojas-Muñoz, Macarena C. Martínez-Rodríguez, Piedad Brox
2023 — conf
A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem.
DCIS
Eros Camacho-Ruiz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Erica Tena-Sánchez, Piedad Brox
2023 — conf
A complete SHA-3 hardware library based on a high efficiency Keccak design.
NorCAS
Eros Camacho-Ruiz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Piedad Brox
2023 — conf
HW/SW implementation of RSA digital signature on a RISC-V-based System-on-Chip.
DCIS
Apurba Karmakar, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Piedad Brox
2023 J jnl
On-Line Evaluation and Monitoring of Security Features of an RO-Based PUF/TRNG for IoT Devices.
Sensors
Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Piedad Brox
2023 J jnl
Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems.
Cryptogr.
Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Santiago Sánchez-Solano, Piedad Brox
2022 J jnl
Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems.
Cryptogr.
Macarena C. Martínez-Rodríguez, Luis F. Rojas-Muñoz, Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox
2022 J jnl
Embedded system implementation of an evolutionary algorithm for circle detection on programmable devices.
Comput. Electr. Eng.
Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Carlos H. Garcia-Capulin, Horacio Rostro-González
2022 J jnl
Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems.
Sensors
Santiago Sánchez-Solano, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox
2022 — conf
True Random Number Generator based on RO-PUF.
DCIS
Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Piedad Brox
2021 — conf
Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs.
DCIS
Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox
2021 J jnl
Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm.
ACM J. Emerg. Technol. Comput. Syst.
Eros Camacho-Ruiz, Santiago Sánchez-Solano, Piedad Brox, Macarena C. Martínez-Rodríguez
2020 — conf
Accelerating the Development of NTRU Algorithm on Embedded Systems.
DCIS
Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Santiago Sánchez-Solano, Piedad Brox
2019 J jnl
Memory Tampering Attack on Binary GCD Based Inversion Algorithms.
Int. J. Parallel Program.
Alejandro Cabrera Aldaya, Billy Bob Brumley, Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano
2017 J jnl
SPA vulnerabilities of the binary extended Euclidean algorithm.
J. Cryptogr. Eng.
Alejandro Cabrera Aldaya, Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano
2017 J jnl
Side-channel analysis of the modular inversion step in the RSA key generation algorithm.
Int. J. Circuit Theory Appl.
Alejandro Cabrera Aldaya, Raudel Cuiman Márquez, Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano
2016 J jnl
AES T-Box tampering attack.
J. Cryptogr. Eng.
Alejandro Cabrera Aldaya, Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano
2016 J jnl
Low-cost dedicated hardware IP modules for background subtraction in embedded vision systems.
J. Real Time Image Process.
Elisa Calvo-Gallego, Piedad Brox, Santiago Sánchez-Solano
2015 — conf
Hardware implementation of a background substraction algorithm in FPGA-based platforms.
ICIT
Elisa Calvo-Gallego, Santiago Sánchez-Solano, Piedad Brox Jiménez
2015 — conf
Hardware/software co-design of video processing applications on a reconfigurable platform.
ICIT
Javier Cerezuela-Mora, Elisa Calvo-Gallego, Santiago Sánchez-Solano
2014 J jnl
Edge-adaptive spatial video de-interlacing algorithms based on fuzzy logic.
IEEE Trans. Consumer Electron.
Piedad Brox Jiménez, Iluminada Baturone, Santiago Sánchez-Solano, Julio Gutiérrez-Ríos
2014 J jnl
Fuzzy logic-based embedded system for video de-interlacing.
Appl. Soft Comput.
Piedad Brox, Iluminada Baturone, Santiago Sánchez-Solano
2013 — conf
A Fuzzy System for Background Modeling in Video Sequences.
WILF
Elisa Calvo-Gallego, Piedad Brox, Santiago Sánchez-Solano
2013 J jnl
CAD Tools for Hardware Implementation of Embedded Fuzzy Systems on FPGAs.
IEEE Trans. Ind. Informatics
María Brox, Santiago Sánchez-Solano, Ernesto del Toro, Piedad Brox, Francisco Jose Moreno-Velo
2013 J jnl
Model-Based Design Methodology for Rapid Development of Fuzzy Controllers on FPGAs.
IEEE Trans. Ind. Informatics
Santiago Sánchez-Solano, María Brox, Ernesto del Toro, Piedad Brox, Iluminada Baturone
2012 J jnl
Enabling fuzzy technologies in high performance networking via an open FPGA-based development platform.
Appl. Soft Comput.
Federico Montesino-Pouzols, Angel Barriga Barros, Diego R. López, Santiago Sánchez-Solano
2012 — conf
Real-time FPGA connected component labeling system.
ICECS
Elisa Calvo-Gallego, Alejandro Cabrera Aldaya, Piedad Brox, Santiago Sánchez-Solano
2012 B conf
XFSML: An XML-based modeling language for fuzzy systems.
FUZZ-IEEE
Francisco Jose Moreno-Velo, Angel Barriga, Santiago Sánchez-Solano, Iluminada Baturone
2011 J jnl
Fuzzy motion adaptive algorithm and its hardware implementation for video de-interlacing.
Appl. Soft Comput.
Julio Gutiérrez-Ríos, Piedad Brox, Felipe Fernández-Hernández, Iluminada Baturone, Santiago Sánchez-Solano
2011 J jnl
Soft Computing Techniques for Video De-Interlacing.
IEEE J. Sel. Top. Signal Process.
Piedad Brox Jiménez, Iluminada Baturone, Santiago Sánchez-Solano
2011 C conf
XFVHDL4: A hardware synthesis tool for fuzzy systems.
ISDA
María Brox, Santiago Sánchez-Solano, L. Delgado
2010 B conf
A design environment for synthesis of embedded fuzzy controllers on FPGAs.
FUZZ-IEEE
Santiago Sánchez-Solano, Ernesto del Toro, María Brox, Iluminada Baturone, Angel Barriga
2010 C conf
An automated design flow from linguistic models to piecewise polynomial digital circuits.
ISCAS
Iluminada Baturone, Santiago Sánchez-Solano, Andrés Gersnoviez, María Brox
2010 — book
Fuzzy Logic-Based Algorithms for Video De-Interlacing
Piedad Brox Jiménez, Iluminada Baturone, Santiago Sánchez-Solano
2010 — conf
Hardware-software Codesign of Fuzzy Control Systems using FPGAs.
ICINCO (1)
Ernesto del Toro, Santiago Sánchez-Solano, María Brox, Alejandro J. Cabrera
2010 B conf
Tuning of a hierarchical fuzzy system for video de-interlacing.
FUZZ-IEEE
Piedad Brox Jiménez, Iluminada Baturone, Santiago Sánchez-Solano
2009 J jnl
Fuzzy Motion-Adaptive Interpolation With Picture Repetition Detection for Deinterlacing.
IEEE Trans. Instrum. Meas.
Piedad Brox, Iluminada Baturone, Santiago Sánchez-Solano
2008 B conf
Linguistic summarization of network traffic flows.
FUZZ-IEEE
Federico Montesino-Pouzols, Angel Barriga, Diego R. López, Santiago Sánchez-Solano
2007 J jnl
A fuzzy edge-dependent motion adaptive algorithm for de-interlacing.
Fuzzy Sets Syst.
Piedad Brox, Iluminada Baturone, Santiago Sánchez-Solano, Julio Gutiérrez-Ríos, Felipe Fernández-Hernández
2007 J jnl
Automatic tuning of complex fuzzy systems with Xfuzzy.
Fuzzy Sets Syst.
Francisco Jose Moreno-Velo, Iluminada Baturone, Angel Barriga, Santiago Sánchez-Solano
2007 J jnl
Erratum to "Automatic tuning of complex fuzzy systems with Xfuzzy": [Fuzzy Sets and System 158 (2007) 2026-2038].
Fuzzy Sets Syst.
Francisco Jose Moreno-Velo, Iluminada Baturone, Angel Barriga, Santiago Sánchez-Solano
2007 J jnl
FPGA Implementation of Embedded Fuzzy Controllers for Robotic Applications.
IEEE Trans. Ind. Electron.
Santiago Sánchez-Solano, Alejandro J. Cabrera, Iluminada Baturone, Francisco Jose Moreno-Velo, María Brox
2007 B conf
Using Xfuzzy Environment for the Whole Design of Fuzzy Systems.
FUZZ-IEEE
Iluminada Baturone, Francisco Jose Moreno-Velo, Santiago Sánchez-Solano, Angel Barriga, Piedad Brox Jiménez, Andrés Gersnoviez, María Brox
2006 B conf
Development of IP Modules of Fuzzy Controllers for the Design of Embedded Systems on FPGAs.
FPL
María Brox, Santiago Sánchez-Solano
2006 B conf
Fuzzy End-to-End Rate Control for Internet Transport Protocols.
FUZZ-IEEE
Federico Montesino-Pouzols, Diego R. López, Angel Barriga, Santiago Sánchez-Solano
2006 — conf
Fuzzy Motion Adaptive Algorithm for Video De-interlacing.
KES (2)
Piedad Brox, Iluminada Baturone, Santiago Sánchez-Solano, Julio Gutiérrez-Ríos, Felipe Fernández-Hernández
2006 J jnl
Modelling and implementation of fuzzy systems based on VHDL.
Int. J. Approx. Reason.
Angel Barriga, Santiago Sánchez-Solano, Piedad Brox Jiménez, Alejandro Cabrera, Iluminada Baturone
2005 — conf
Fuzzy Logic Activities at the Microelectronics Institute of Seville.
WIRN/NAIS
Angel Barriga, Santiago Sánchez-Solano, Iluminada Baturone, Francisco Jose Moreno-Velo, Piedad Brox Jiménez, Federico Montesino-Pouzols, Nashaat M. Hussein, María Brox, Andrés Gersnoviez
2005 — conf
Progressive scan conversion based on edge-dependent interpolation using fuzzy logic.
EUSFLAT Conf.
Piedad Brox, Iluminada Baturone, Santiago Sánchez-Solano
2004 J jnl
Automatic design of fuzzy controllers for car-like autonomous robots.
IEEE Trans. Fuzzy Syst.
Iluminada Baturone, Francisco Jose Moreno-Velo, Santiago Sánchez-Solano, Aníbal Ollero
2004 J jnl
Hardware/software codesign of configurable fuzzy control systems.
Appl. Soft Comput.
Alejandro Cabrera Sarmiento, Santiago Sánchez-Solano, Piedad Brox Jiménez, Angel Barriga, Raouf Senhadji
2004 B conf
The parametric definition of membership functions in XFL3.
FUZZ-IEEE
Francisco Jose Moreno-Velo, Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga
2003 B conf
Rapid design of fuzzy systems with Xfuzzy.
FUZZ-IEEE
Francisco Jose Moreno-Velo, Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga
2003 B conf
Tuning complex fuzzy systems by supervised learning algorithms.
FUZZ-IEEE
Francisco Jose Moreno-Velo, Iluminada Baturone, Raouf Senhadji, Santiago Sánchez-Solano
2003 — conf
VHDL High Level Modelling and Implementation of Fuzzy Systems.
WILF
Angel Barriga, Santiago Sánchez-Solano, Piedad Brox Jiménez, Alejandro Cabrera, Iluminada Baturone
2002 B conf
Hardware/software codesign methodology for fuzzy controller implementation.
FUZZ-IEEE
Alejandro Cabrera, Santiago Sánchez-Solano, Raouf Senhadji, Angel Barriga, Carlos Jesús Jiménez-Fernández
2002 C conf
Prototyping of Fuzzy Logic-Based Controllers Using Standard FPGA Development Boards.
IEEE International Workshop on Rapid System Prototyping
Santiago Sánchez-Solano, Raouf Senhadji, Alejandro Cabrera Sarmiento, Iluminada Baturone, Carlos Jesús Jiménez-Fernández, Angel Barriga
2001 — conf
Xfuzzy 3.0: a development environment for fuzzy systems.
EUSFLAT Conf.
Francisco Jose Moreno-Velo, Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga
1998 — conf
A design methodology for application specific fuzzy integrated circuits.
ICECS
Angel Barriga, Raouf Senhadji, Carlos Jesús Jiménez-Fernández, Iluminada Baturone, Santiago Sánchez-Solano
1998 A conf
XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers.
DATE
E. Lago, Carlos Jesús Jiménez-Fernández, Diego R. López, Santiago Sánchez-Solano, Angel Barriga
1997 J jnl
Implementation of CMOS fuzzy controllers as mixed-signal integrated circuits.
IEEE Trans. Fuzzy Syst.
Iluminada Baturone, Santiago Sánchez-Solano, Angel Barriga, José Luis Huertas
1996 J jnl
Integrated circuit implementation of fuzzy controllers.
IEEE J. Solid State Circuits
José L. Huertas, Santiago Sánchez-Solano, Iluminada Baturone, Angel Barriga
1995 J jnl
Modular Asynchronous Arbiter Insensitive to Metastability.
IEEE Trans. Computers
Manuel Valencia-Barrero, Manuel J. Bellido, José L. Huertas, Antonio J. Acosta, Santiago Sánchez-Solano
1995 — conf
VHDL package for description of fuzzy logic controllers.
EURO-DAC
D. Galán, Carlos Jesús Jiménez-Fernández, Angel Barriga, Santiago Sánchez-Solano