Santanu Mahapatra

20 papers A* 1A 1Misc 8Journal 6Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
A Continuous Energy Ising Machine Leveraging Difference-of-Convex Programming.
CoRR
Debraj Banerjee, Santanu Mahapatra, Kunal Narayan Chaudhury
2025 J jnl
CUDA-METRO: Parallel Metropolis Monte Carlo for 2D Atomistic Spin Texture Simulation.
J. Open Source Softw.
Arkavo Hait, Santanu Mahapatra
2025 — conf
Linear Order Graph Sparsification for MCMC and Mean-Field Annealing.
HiPCW
Debraj Banerjee, Santanu Mahapatra, Kunal N. Chaudhury
2025 — conf
Unbound Parallelization on Heisenberg Model.
HiPCW
Arkavo Hait, Santanu Mahapatra
2022 J jnl
Massive Monte Carlo simulations-guided interpretable learning of two-dimensional Curie temperature.
Patterns
Arnab Kabiraj, Tripti Jain, Santanu Mahapatra
2020 — conf
First Principles Based Compact Model for 2D-Channel MOSFETs.
ISDCS
Biswapriyo Das, Santanu Mahapatra
2019 Misc conf
Insights on Anisotropic Dissipative Quantum Transport in n-Type Phosphorene MOSFET.
VLSID
Madhuchhanda Brahma, Arnab Kabiraj, Santanu Mahapatra
2018 Misc conf
New Asymmetric Atomistic Model for the Analysis of Phase-Engineered MoS2-Gold Top Contact.
VLSID
Richa Chakravarty, Dipankar Saha, Santanu Mahapatra
2016 J jnl
Compact noise modelling for common double-gate metal-oxide-semiconductor field-effect transistor adapted to gate-oxide-thickness asymmetry.
IET Circuits Devices Syst.
Neha Sharan, Santanu Mahapatra
2014 Misc conf
Small Signal Nonquasi-static Model for Common Double-Gate MOSFETs Adapted to Gate Oxide Thickness Asymmetry.
VLSID
Neha Sharan, Santanu Mahapatra
2010 Misc conf
A Non Quasi-static Small Signal Model for Long Channel Symmetric DG MOSFET.
VLSI Design
Sudipta Sarkar, Ananda S. Roy, Santanu Mahapatra
2010 J jnl
Impact of energy quantisation in single electron transistor island on hybrid complementary metal oxide semiconductor- single electron transistor integrated circuits.
IET Circuits Devices Syst.
Surya Shankar Dan, Santanu Mahapatra
2009 Misc conf
Analysis of the Energy Quantization Effects on Single Electron Inverter Performance through Noise Margin Modeling.
VLSI Design
Surya Shankar Dan, Santanu Mahapatra
2009 Misc conf
Concept of "Crossover Point" and its Application on Threshold Voltage Definition for Undoped-Body Transistors.
VLSI Design
Ratul Kumar Baruah, Santanu Mahapatra
2008 Misc conf
A New Threshold Voltage Model for Omega Gate Cylindrical Nanowire Transistor.
VLSI Design
Biswajit Ray, Santanu Mahapatra
2008 J jnl
Drive current boosting of n-type tunnel FET with strained SiGe layer at source.
Microelectron. J.
Nayan Patel, A. Ramesha, Santanu Mahapatra
2007 Misc conf
Modeling and Analysis of Noise Margin in SET Logic.
VLSI Design
Chaitanya Sathe, Santanu Mahapatra
2003 A conf
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits.
ICCAD
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeon, Adrian M. Ionescu
2002 — conf
A SET quantizer circuit aiming at digital communication system.
ISCAS (5)
Santanu Mahapatra, Adrian M. Ionescu, Kaustav Banerjee, Michel J. Declercq
2002 A* conf
Few electron devices: towards hybrid CMOS-SET integrated circuits.
DAC
Adrian M. Ionescu, Michel J. Declercq, Santanu Mahapatra, Kaustav Banerjee, Jacques Gautier