Santanu Dutta

31 papers A* 2A 2C 5Misc 1Journal 16Unranked 5
YearRankTypeTitle / Venue / Authors
2019 — conf
Adaptive Beamforming for Mobile Satellite Systems Based on User Location/Waveform.
VTC Fall
Dunmin Zheng, Santanu Dutta
2018 J jnl
Nonparametric estimation of 100(1 - p)% expected shortfall: p → 0 as sample size is increased.
Commun. Stat. Simul. Comput.
Santanu Dutta, Suparna Biswas
2017 J jnl
Extreme quantile estimation based on financial time series.
Commun. Stat. Simul. Comput.
Santanu Dutta, Suparna Biswas
2016 J jnl
Cross-validation Revisited.
Commun. Stat. Simul. Comput.
Santanu Dutta
2015 J jnl
Local Smoothing for Kernel Distribution Function Estimation.
Commun. Stat. Simul. Comput.
Santanu Dutta
2014 J jnl
Local Smoothing Using the Bootstrap.
Commun. Stat. Simul. Comput.
Santanu Dutta
2013 J jnl
Robustness of designs for model discrimination.
J. Multivar. Anal.
Subir Ghosh, Santanu Dutta
2009 J jnl
S-WiMAX: adaptation of IEEE 802.16e for mobile satellite services.
IEEE Commun. Mag.
Arif Ansari, Santanu Dutta, Michael Tseytlin
2007 C conf
Recent Trends in the Design of Video Signal Processing IPS and Multimedia SoCs.
SECRYPT
Santanu Dutta
2007 A* conf
Reducing Data-Memory Footprint of Multimedia Applications by Delay Redistribution.
DAC
Balaji Raman, Samarjit Chakraborty, Wei Tsang Ooi, Santanu Dutta
2005 — conf
Design of Multimillion-Gate Multimedia SoCs: Where do we stand?
ESTIMedia
Santanu Dutta
2003 — conf
Architecture and Implementation of Multi-Processor SoCs for Advanced Set-Top Box and Digital TV Systems.
SBCCI
Santanu Dutta
2001 J jnl
Architecture and design of NX-2700: a programmable single-chip HDTV all-format-decode-and-display processor.
IEEE Trans. Very Large Scale Integr. Syst.
Santanu Dutta
2001 — conf
Design verification of an 18-million-transistor digital television and media processor chip.
ICECS
Santanu Dutta
2001 J jnl
Viper: A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems.
IEEE Des. Test Comput.
Santanu Dutta, Rune Jensen, Alf Rieckmann
2000 Misc conf
Architecture and Implementation of a High-Definition Video Co-Processor for Digital Television Applications.
VLSI Design
Santanu Dutta, Deepak Singh, Essam Abu-Ghoush, Vijay Mehra
2000 — conf
Architecture, Design, and Verification of an 18 Million Transistor Digital Television and Media Processor Chip.
PATMOS
Santanu Dutta
1999 J jnl
A circuit-driven design methodology for video signal-processing datapath elements.
IEEE Trans. Very Large Scale Integr. Syst.
Santanu Dutta, Wayne H. Wolf
1999 J jnl
Architecture and design of a Talisman-compatible multimedia processor.
IEEE Trans. Circuits Syst. Video Technol.
Santanu Dutta, Vijay Mehra, Weiwen Zhu, Deepak Singh, Marcel Janssens, Ramakrishna Vengalasetti, Boaz Ben-Nun, Pardha Pothana, Venkat Adusumilli, Nahid King, John Yen-Han Huang, Lie Ling, Chris Nelson, Jai Bannur, Sarah Wu
1998 J jnl
A design study of a 0.25-μm video signal processor.
IEEE Trans. Circuits Syst. Video Technol.
Santanu Dutta, Kevin J. O'Connor, Wayne H. Wolf, Andrew Wolfe
1998 J jnl
A methodology to evaluate memory architecture design tradeoffs for video signal processors.
IEEE Trans. Circuits Syst. Video Technol.
Santanu Dutta, Wayne H. Wolf, Andrew Wolfe
1997 A* conf
Datapath Design for a VLIW Video Signal Processor.
HPCA
Andrew Wolfe, Jason Fritts, Santanu Dutta, Edil S. T. Fernandes
1996 J jnl
A flexible parallel architecture adapted to block-matching motion-estimation algorithms.
IEEE Trans. Circuits Syst. Video Technol.
Santanu Dutta, Wayne H. Wolf
1995 J jnl
A comprehensive delay model for CMOS inverters.
IEEE J. Solid State Circuits
Santanu Dutta, Shivaling S. Mahant-Shetti, Stephen L. Lusky
1995 J jnl
Asymptotic limits of video signal processing architectures.
IEEE Trans. Circuits Syst. Video Technol.
Santanu Dutta, Wayne H. Wolf
1995 C conf
VLSI issues in memory-system design for video signal processors.
ICCD
Santanu Dutta, Wayne H. Wolf, Andrew Wolfe
1994 C conf
ASAP: A Transistor Sizing Tool for Speed Area and Power Optimization of Static CMOS Circuits.
ISCAS
Santanu Dutta, Sudip Nag, Kaushik Roy
1994 C conf
Asymptotic Limits of Video Signal Processing Architectures.
ICCD
Santanu Dutta, Wayne H. Wolf
1993 C conf
Channel Architecture Optimization for Performance and Routability of Row-Based FPGAs.
ICCD
Kaushik Roy, Sudip Nag, Santanu Dutta
1990 A conf
DC Parameterized Piecewise-Function Transistor Models for Bipolar and MOS Logic Stage Delay Evaluation.
ICCAD
Douglas R. Holberg, Santanu Dutta, Lawrence T. Pillage
1989 A conf
A timing model for static CMOS gates.
ICCAD
Hau-Yung Chen, Santanu Dutta