Sanjiv Narayan

23 papers A* 3A 2Misc 2Journal 5Unranked 11
YearRankTypeTitle / Venue / Authors
2014 A conf
Energy optimization in Android applications through wakelock placement.
DATE
Faisal Alam, Preeti Ranjan Panda, Nikhil Tripathi, Namita Sharma, Sanjiv Narayan
2003 Misc conf
Graph Transformations for Improved Tree Height Reduction.
VLSI Design
G. N. Mangalam, Sanjiv Narayan, Paul van Besouw, LaNae J. Avra, Anmol Mathur, Sanjeev Saluja
1998 J jnl
SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design.
IEEE Trans. Very Large Scale Integr. Syst.
Daniel D. Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong
1998 A* conf
System-level exploration with SpecSyn.
DAC
Daniel Gajski, Frank Vahid, Sanjiv Narayan, Jie Gong
1996 J jnl
An optimal clock period selection method based on slack minimization criteria.
ACM Trans. Design Autom. Electr. Syst.
En-Shou Chang, Daniel Gajski, Sanjiv Narayan
1996 — conf
Rapid performance estimation for system design.
EURO-DAC
Sanjiv Narayan, Daniel D. Gajski
1996 J jnl
System design methodologies: aiming at the 100 h design cycle.
IEEE Trans. Very Large Scale Integr. Syst.
Daniel D. Gajski, Sanjiv Narayan, Loganath Ramachandran, Frank Vahid, Peter Fung
1995 A* conf
Interfacing Incompatible Protocols Using Interface Process Generation.
DAC
Sanjiv Narayan, Daniel Gajski
1995 — conf
Software estimation using a generic-processor model.
ED&TC
Jie Gong, Daniel D. Gajski, Sanjiv Narayan
1995 J jnl
SpecCharts: a VHDL front-end for embedded systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Frank Vahid, Sanjiv Narayan, Daniel D. Gajski
1994 — conf
100-hour design cycle: a test case.
EURO-DAC
Loganath Ramachandran, Daniel D. Gajski, Sanjiv Narayan, Frank Vahid, Peter Fung
1994 — conf
A System-Design Methodology: Executable-Specification Refinement.
EDAC-ETC-EUROASIC
Daniel Gajski, Frank Vahid, Sanjiv Narayan
1994 — conf
A transformation for integrating VHDL behavioral specification with synthesis and software generation.
EURO-DAC
Frank Vahid, Daniel D. Gajski, Sanjiv Narayan
1994 A* conf
Protocol Generation for Communication Channels.
DAC
Sanjiv Narayan, Daniel Gajski
1994 — conf
Synthesis of System-Level Bus Interfaces.
EDAC-ETC-EUROASIC
Sanjiv Narayan, Daniel Gajski
1993 — conf
Features supporting system-level specification in HDLs.
EURO-DAC
Sanjiv Narayan, Daniel D. Gajski
1993 — conf
Synthesis of functions and procedures in behavioral VHDL.
EURO-DAC
Loganath Ramachandran, Sanjiv Narayan, Frank Vahid, Daniel D. Gajski
1992 — conf
Semantics and synthesis of signals in behavioral VHDL.
EURO-DAC
Loganath Ramachandran, Frank Vahid, Sanjiv Narayan, Daniel D. Gajski
1992 Misc conf
System Level Specification and Synthesis.
VLSI Design
Sanjiv Narayan, Frank Vahid, Daniel D. Gajski
1992 J jnl
System Specification with the SpecCharts Language.
IEEE Des. Test Comput.
Sanjiv Narayan, Frank Vahid, Daniel D. Gajski
1992 — conf
System clock estimation based on clock slack minimization.
EURO-DAC
Sanjiv Narayan, Daniel D. Gajski
1991 A conf
System Specification and Synthesis with the SpecCharts Language.
ICCAD
Sanjiv Narayan, Frank Vahid, Daniel Gajski
1991 — conf
Translating system specifications to VHDL.
EURO-DAC
Sanjiv Narayan, Frank Vahid, Daniel D. Gajski