Sanjay V. Rajopadhye

130 papers A* 2A 10B 14C 1Misc 6Journal 48Unranked 46

Year	Rank	Type	Title / Venue / Authors
2025	J	`jnl`	Maximal Simplification of Polyhedral Reductions. Proc. ACM Program. Lang. Louis Narmour, Tomofumi Yuki, Sanjay V. Rajopadhye
2024	J	`jnl`	An Irredundant and Compressed Data Layout to Optimize Bandwidth Utilization of FPGA Accelerators. CoRR Corentin Ferry, Nicolas Derumigny, Steven Derrien, Sanjay V. Rajopadhye
2024	J	`jnl`	Simplification of Polyhedral Reductions in Practice. CoRR Louis Narmour, Ryan Job, Tomofumi Yuki, Sanjay V. Rajopadhye
2024	J	`jnl`	Taking RNA-RNA Interaction to Machine Peak. IEEE Trans. Parallel Distributed Syst. Chiranjeb Mondal, Sanjay V. Rajopadhye
2023	J	`jnl`	An Irredundant Decomposition of Data Flow with Affine Dependences. CoRR Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye
2023	B	`conf`	Automatic Algorithm-Based Fault Tolerance (AABFT) of Stencil Computations. PACT Louis Narmour, Steven Derrien, Sanjay V. Rajopadhye
2023	J	`jnl`	Distributed non-negative RESCAL with automatic model selection for exascale data. J. Parallel Distributed Comput. Manish Bhattarai, Namita Kharat, Ismael Boureima, Erik Skau, Benjamin T. Nebgen, Hristo N. Djidjev, Sanjay V. Rajopadhye, James P. Smith, Boian S. Alexandrov
2023	J	`jnl`	Increasing FPGA Accelerators Memory Bandwidth With a Burst-Friendly Memory Layout. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Corentin Ferry, Tomofumi Yuki, Steven Derrien, Sanjay V. Rajopadhye
2023	J	`jnl`	Maximal Simplification of Polyhedral Reductions. CoRR Louis Narmour, Tomofumi Yuki, Sanjay V. Rajopadhye
2022	J	`jnl`	Distributed non-negative RESCAL with Automatic Model Selection for Exascale Data. CoRR Manish Bhattarai, Namita Kharat, Erik Skau, Benjamin T. Nebgen, Hristo N. Djidjev, Sanjay V. Rajopadhye, James P. Smith, Boian S. Alexandrov
2022	J	`jnl`	Increasing FPGA Accelerators Memory Bandwidth with a Burst-Friendly Memory Layout. CoRR Corentin Ferry, Tomofumi Yuki, Steven Derrien, Sanjay V. Rajopadhye
2022	J	`jnl`	Maximal Atomic irRedundant Sets: a Usage-based Dataflow Partitioning Algorithm. CoRR Corentin Ferry, Steven Derrien, Sanjay V. Rajopadhye
2021	—	`conf`	(When) Do Multiple Passes Save Energy? SAMOS Louis Narmour, Tomofumi Yuki, Sanjay V. Rajopadhye
2021	—	`conf`	Accelerating the BPMax Algorithm for RNA-RNA Interaction. IPDPS Workshops Chiranjeb Mondal, Sanjay V. Rajopadhye
2021	C	`conf`	BPPart: RNA-RNA Interaction Partition Function in the Absence of Entropy. WABI Ali Ebrahimpour Boroojeny, Sanjay V. Rajopadhye, Hamidreza Chitsaz
2021	J	`jnl`	Monoparametric Tiling of Polyhedral Programs. Int. J. Parallel Program. Guillaume Iooss, Christophe Alias, Sanjay V. Rajopadhye
2020	—	`conf`	A Tropical Semiring Multiple Matrix-Product Library on GPUs: (not just) a step towards RNA-RNA Interaction Computations. IPDPS Workshops Brandon Gildemaster, Prerana Ghalsasi, Sanjay V. Rajopadhye
2020	J	`jnl`	LLOV: A Fast Static Data-Race Checker for OpenMP Programs. ACM Trans. Archit. Code Optim. Utpal Bora, Santanu Das, Pankaj Kukreja, Saurabh Joshi, Ramakrishna Upadrasta, Sanjay V. Rajopadhye
2020	J	`jnl`	On Simplifying Dependent Polyhedral Reductions. CoRR Sanjay V. Rajopadhye
2020	J	`jnl`	Optimization Approach to Accelerator Codesign. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov
2020	B	`conf`	Revisiting Sparse Dynamic Programming for the 0/1 Knapsack Problem. ICPP Tarequl Islam Sifat, Nirmal Prajapati, Sanjay V. Rajopadhye
2019	J	`jnl`	LLOV: A Fast Static Data-Race Checker for OpenMP Programs. CoRR Utpal Bora, Santanu Das, Pankaj Kukreja, Saurabh Joshi, Ramakrishna Upadrasta, Sanjay V. Rajopadhye
2018	J	`jnl`	A Code Generator for Energy-Efficient Wavefront Parallelization of Uniform Dependence Computations. IEEE Trans. Parallel Distributed Syst. Yun Zou, Sanjay V. Rajopadhye
2018	J	`jnl`	Analytical Cost Metrics : Days of Future Past. CoRR Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev
2018	J	`jnl`	PCOT: Cache Oblivious Tiling of Polyhedral Programs. CoRR Waruna Ranasinghe, Nirmal Prajapati, Tomofumi Yuki, Sanjay V. Rajopadhye
2017	J	`jnl`	Accelerator Codesign as Non-Linear Optimization. CoRR Nirmal Prajapati, Sanjay V. Rajopadhye, Hristo N. Djidjev, Nandakishore Santhi, Tobias Grosser, Rumen Andonov
2017	B	`conf`	One size does not fit all: Implementation trade-offs for iterative stencil computations on FPGAs. FPL Gaël Deest, Tomofumi Yuki, Sanjay V. Rajopadhye, Steven Derrien
2017	B	`conf`	Simple, Accurate, Analytical Time Modeling and Optimal Tile Size Selection for GPGPU Stencils. PPoPP Nirmal Prajapati, Waruna Ranasinghe, Sanjay V. Rajopadhye, Rumen Andonov, Hristo N. Djidjev, Tobias Grosser
2016	J	`jnl`	Hybrid Static/Dynamic Schedules for Tiled Polyhedral Programs. CoRR Tian Jin, Nirmal Prajapati, Waruna Ranasinghe, Guillaume Iooss, Yun Zou, Sanjay V. Rajopadhye, David G. Wonnacott
2015	A	`conf`	Automatic Energy Efficient Parallelization of Uniform Dependence Computations. ICS Yun Zou, Sanjay V. Rajopadhye
2015	J	`jnl`	Combining execution pipelines to improve parallel implementation of HMMER on FPGA. Microprocess. Microsystems Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton, Alexandre Cornu, Dominique Lavenier
2015	—	`conf`	Energy Modeling and Optimization for Tiled Nested-Loop Codes. IPDPS Workshops Nirmal Prajapati, Waruna Ranasinghe, Vamshi Tandrapati, Rumen Andonov, Hristo N. Djidjev, Sanjay V. Rajopadhye
2014	B	`conf`	On Program Equivalence with Reductions. SAS Guillaume Iooss, Christophe Alias, Sanjay V. Rajopadhye
2014	Misc	`conf`	Optimizing Dynamic Resource Allocation. ICCS Lucas W. Krakow, Louis Rabiet, Yun Zou, Guillaume Iooss, Edwin K. P. Chong, Sanjay V. Rajopadhye
2013	B	`conf`	Array dataflow analysis for polyhedral X10 programs. PPoPP Tomofumi Yuki, Paul Feautrier, Sanjay V. Rajopadhye, Vijay A. Saraswat
2013	J	`jnl`	Checking Race Freedom of Clocked X10 Programs. CoRR Tomofumi Yuki, Paul Feautrier, Sanjay V. Rajopadhye, Vijay A. Saraswat
2013	—	`conf`	Folklore Confirmed: Compiling for Speed = Compiling for Energy. LCPC Tomofumi Yuki, Sanjay V. Rajopadhye
2013	—	`ed.`	Languages and Compilers for Parallel Computing, 24th International Workshop, LCPC 2011, Fort Collins, CO, USA, September 8-10, 2011. Revised Selected Papers LCPC Sanjay V. Rajopadhye, Michelle Mills Strout
2012	—	`conf`	AlphaZ: A System for Design Space Exploration in the Polyhedral Model. LCPC Tomofumi Yuki, Gautam Gupta, DaeGon Kim, Tanveer Pathan, Sanjay V. Rajopadhye
2012	J	`jnl`	Bridging the chasm between MDE and the world of compilation. Softw. Syst. Model. Jean-Marc Jézéquel, Benoît Combemale, Steven Derrien, Clément Guy, Sanjay V. Rajopadhye
2012	J	`jnl`	Improving Reliability of Islanded Distribution Systems With Distributed Renewable Energy Resources. IEEE Trans. Smart Grid Hilary E. Brown, Siddharth Suryanarayanan, Sudarshan Natarajan, Sanjay V. Rajopadhye
2012	J	`jnl`	Parameterized loop tiling. ACM Trans. Program. Lang. Syst. Lakshminarayanan Renganarayanan, DaeGon Kim, Michelle Mills Strout, Sanjay V. Rajopadhye
2012	A	`conf`	Scan detection and parallelization in "inherently sequential" nested loop programs. CGO Yun Zou, Sanjay V. Rajopadhye
2011	—	`conf`	Alphabets: An Extended Polyhedral Equational Language. IPDPS Workshops Sanjay V. Rajopadhye, Samik Gupta, DaeGon Kim
2011	—	`conf`	Improving CUDASW++, a Parallelization of Smith-Waterman for CUDA Enabled Devices. IPDPS Workshops Doug Hains, Zach Cashero, Mark Ottenberg, Wim Bohm, Sanjay V. Rajopadhye
2011	A	`conf`	Model-Driven Engineering and Optimizing Compilers: A Bridge Too Far? MoDELS Antoine Floch, Tomofumi Yuki, Clément Guy, Steven Derrien, Benoît Combemale, Sanjay V. Rajopadhye, Robert B. France
2011	—	`conf`	ompVerify: Polyhedral Analysis for the OpenMP Programmer. IWOMP V. Basupalli, Tomofumi Yuki, Sanjay V. Rajopadhye, Antoine Morvan, Steven Derrien, Patrice Quinton, David Wonnacott
2010	—	`conf`	Accelerating HMMER on FPGA using parallel prefixes and reductions. FPT Naeem Abbas, Steven Derrien, Sanjay V. Rajopadhye, Patrice Quinton
2010	A	`conf`	Automatic creation of tile size selection models. CGO Tomofumi Yuki, Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye, Charles Anderson, Alexandre E. Eichenberger, Kevin O'Brien
2009	J	`jnl`	A reindexing based approach towards mapping of DAG with affine schedules onto parallel embedded systems. J. Parallel Distributed Comput. Clémentin Tayou Djamégni, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset, Maurice Tchuenté
2009	—	`conf`	Efficient Tiled Loop Generation: D-Tiling. LCPC DaeGon Kim, Sanjay V. Rajopadhye
2008	B	`conf`	A domain specific interconnect for reconfigurable computing. LCTES Sanjay V. Rajopadhye, Gautam Gupta, Lakshminarayanan Renganarayanan
2008	A	`conf`	Positivity, posynomials and tile size selection. SC Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye
2008	—	`conf`	Smashing: Folding Space to Tile through Time. LCPC Nissa Osheim, Michelle Mills Strout, Dave Rostron, Sanjay V. Rajopadhye
2007	—	`conf`	0/1 Knapsack on Hardware: A Complete Solution. ASAP K. Nibbelink, Sanjay V. Rajopadhye, Richard McConnell
2007	—	`ch.`	Computations on Iteration Spaces. The Compiler Design Handbook, 2nd ed. Sanjay V. Rajopadhye, Lakshimarayanan Renganarayana, Gautam Gupta, Michelle Mills Strout
2007	A	`conf`	Multi-level tiling: M for the price of one. SC DaeGon Kim, Lakshminarayanan Renganarayanan, Dave Rostron, Sanjay V. Rajopadhye, Michelle Mills Strout
2007	A*	`conf`	Parameterized tiled loops for free. PLDI Lakshminarayanan Renganarayanan, DaeGon Kim, Sanjay V. Rajopadhye, Michelle Mills Strout
2007	A	`conf`	Scheduling in the Z-Polyhedral Model. IPDPS Gautam Gupta, DaeGon Kim, Sanjay V. Rajopadhye
2007	J	`jnl`	Special Issue on ASAP 2004 Conference. J. VLSI Signal Process. Joseph R. Cavallaro, Sanjay V. Rajopadhye, Lothar Thiele, Tobias Noll
2007	B	`conf`	The Z-polyhedral model. PPoPP Gautam Gupta, Sanjay V. Rajopadhye
2007	A	`conf`	Towards Optimal Multi-level Tiling for Stencil Computations. IPDPS Lakshminarayanan Renganarayanan, Manjukumar Harthikote-Matha, Rinku Dewri, Sanjay V. Rajopadhye
2006	—	`conf`	An Improved Systolic Architecture for LU Decomposition. ASAP DaeGon Kim, Sanjay V. Rajopadhye
2006	—	`conf`	On Control Signals for Multi-Dimensional Time. LCPC DaeGon Kim, Gautam Gupta, Sanjay V. Rajopadhye
2006	A*	`conf`	Simplifying reductions. POPL Gautam Gupta, Sanjay V. Rajopadhye
2005	—	`conf`	A 1.5-D Architecture for Back-Propagation Training. ERSA Sanjay V. Rajopadhye, Kolin Paul
2005	—	`conf`	Combined ILP and Register Tiling: Analytical Model and Optimization Framework. LCPC Lakshminarayanan Renganarayanan, U. Ramakrishna, Sanjay V. Rajopadhye
2004	A	`conf`	A Geometric Programming Framework for Optimal Multi-Level Tiling. SC Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye
2003	J	`jnl`	Optimal Semi-Oblique Tiling. IEEE Trans. Parallel Distributed Syst. Rumen Andonov, Stephan Balev, Sanjay V. Rajopadhye, Nicola Yanev
2003	—	`conf`	Switched Memory Architectures-Moving Beyond Systolic Arrays. ASAP Lakshminarayanan Renganarayanan, Sanjay V. Rajopadhye
2002	—	`ch.`	Dependence Analysis and Parallelizing Transformations. The Compiler Design Handbook Sanjay V. Rajopadhye
2002	—	`conf`	Energy/Power Estimation of Regular Processor Arrays. ISSS Sanjay V. Rajopadhye, Steven Derrien
2002	B	`conf`	Scheduling reductions on realistic machines. SPAA Gautam Gupta, Sanjay V. Rajopadhye, Patrice Quinton
2001	—	`conf`	Combined instruction and loop parallelism in array synthesis for FPGAs. ISSS Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay
2001	Misc	`conf`	Combining Instruction and Loop Level Parallelism for FPGAs. FCCM Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay
2001	B	`conf`	Loop Tiling for Reconfigurable Accelerators. FPL Steven Derrien, Sanjay V. Rajopadhye
2001	B	`conf`	Optimal semi-oblique tiling. SPAA Rumen Andonov, Stephan Balev, Sanjay V. Rajopadhye, Nicola Yanev
2001	A	`conf`	Proving Properties of Multidimensional Recurrences with Application to Regular Parallel Algorithms. IPDPS David Cachera, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
2001	B	`conf`	Uniformization of Affine Dependance Programs for Parallel Embedded System Design. ICPP Manju Manjunathaiah, Graham M. Megson, Sanjay V. Rajopadhye, Tanguy Risset
2000	J	`jnl`	Derivation of systolic algorithms for the algebraic path problem by recurrence transformations. Parallel Comput. Clémentin Tayou Djamégni, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
2000	Misc	`conf`	FCCMS and the Memory Wall. FCCM Steven Derrien, Sanjay V. Rajopadhye
2000	J	`jnl`	Generation of Efficient Nested Loops from Polyhedra. Int. J. Parallel Program. Fabien Quilleré, Sanjay V. Rajopadhye, Doran Wilde
2000	—	`conf`	Optimal Partitioning for FPGA Based Regular Array Implementations. PARELEC Steven Derrien, Sanjay V. Rajopadhye, Susmita Sur-Kolay
2000	J	`jnl`	Optimizing memory usage in the polyhedral model. ACM Trans. Program. Lang. Syst. Fabien Quilleré, Sanjay V. Rajopadhye
2000	—	`conf`	Quadratic Control Signals in Linear Systolic Arrays. ASAP Scott Bowden, Doran Wilde, Sanjay V. Rajopadhye
2000	J	`jnl`	Unbounded knapsack problem: Dynamic programming revisited. Eur. J. Oper. Res. Rumen Andonov, Vincent Poirriez, Sanjay V. Rajopadhye
1999	—	`conf`	The Algebraic Path Problem Revisited. Euro-Par Sanjay V. Rajopadhye, Claude Tadonki, Tanguy Risset
1998	B	`conf`	Linear Programming Models for Scheduling Systems of Affine Recurrence Equations - A Comparative Study. SPAA Stephan Balev, Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
1998	—	`conf`	Optimal Orthogonal Tiling. Euro-Par Rumen Andonov, Sanjay V. Rajopadhye, Nicola Yanev
1997	J	`jnl`	Knapsack on VLSI: from Algorithm to Optimal Circuit. IEEE Trans. Parallel Distributed Syst. Rumen Andonov, Sanjay V. Rajopadhye
1997	J	`jnl`	Memory Reuse Analysis in the Polyhedral Model. Parallel Process. Lett. Doran Wilde, Sanjay V. Rajopadhye
1997	J	`jnl`	Multirate VLSI Arrays and Their Synthesis. IEEE Trans. Computers Patrick M. Lenders, Sanjay V. Rajopadhye
1997	J	`jnl`	On Manipulating Parallel Process. Lett. Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
1997	J	`jnl`	Optimal Orthogonal Tiling of 2-D Iterations. J. Parallel Distributed Comput. Rumen Andonov, Sanjay V. Rajopadhye
1996	—	`conf`	A Regular VLSI Array for an Irregular Algorithm. IRREGULAR Florent de Dinechin, Doran Wilde, Sanjay V. Rajopadhye, Rumen Andonov
1996	—	`conf`	Extension Of The Alpha Language To Recurrences On Sparse Periodic Domains. ASAP Patrice Quinton, Sanjay V. Rajopadhye, Tanguy Risset
1996	—	`conf`	Memory Reuse Analysis in the Polyhedral Model. Euro-Par, Vol. I Doran Wilde, Sanjay V. Rajopadhye
1996	J	`jnl`	Parallel Divide and Conquer on Meshes. IEEE Trans. Parallel Distributed Syst. Virginia Mary Lo, Sanjay V. Rajopadhye, Jan Arne Telle, Xiaoxiong Zhong
1996	Misc	`conf`	Two-dimensional orthogonal tiling: from theory to practice. HiPC Rumen Andonov, Hafid Bourzoufi, Sanjay V. Rajopadhye
1995	J	`jnl`	A Shift Registered-Based Systolic Array for the Unbounded Knapsack Problem. Parallel Process. Lett. Rumen Andonov, Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
1995	—	`conf`	Deriving Imperative Code from Functional Programs. FPCA Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
1995	—	`conf`	On deriving data parallel code from a functional program. IPPS Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
1995	—	`conf`	Synthesis of Multirate VLSI Arrays. ASAP Patrick M. Lenders, Sanjay V. Rajopadhye
1995	—	`conf`	The naive execution of affine recurrence equations. ASAP Doran Wilde, Sanjay V. Rajopadhye
1994	—	`conf`	A sparse knapsack algo-tech-cuit and its synthesis. ASAP Rumen Andonov, Sanjay V. Rajopadhye
1994	—	`conf`	Optimal Tile Sizing. CONPAR Rumen Andonov, Sanjay V. Rajopadhye
1994	—	`conf`	Pure Systolic Array for a Class of Dynamic Dependency Recurrences. Parcella Rumen Andonov, Patrice Quinton, Sanjay V. Rajopadhye, Doran Wilde
1993	J	`jnl`	An improved systolic algorithm for the algebraic path problem. Integr. Sanjay V. Rajopadhye
1993	—	`conf`	An optimal algo-tech-cuit for the knapsack problem. ASAP Rumen Andonov, Sanjay V. Rajopadhye
1993	—	`conf`	Analysis of Affine Communication Specifications. SPDP Sanjay V. Rajopadhye
1993	—	`conf`	Parallel Assignment, Reduction and Communication for Data Parallel Programming. PPSC Sanjay V. Rajopadhye, Manjunath Muddarangegowda
1992	—	`conf`	Parallel Implementation of Divide-and-Conquer Algorithms on Binary de Bruijn Networks. IPPS Xiaoxiong Zhong, Sanjay V. Rajopadhye, Virginia Mary Lo
1992	J	`jnl`	Quasi-Linear allocation functions for efficient array design. J. VLSI Signal Process. Xiaoxiong Zhong, Sanjay V. Rajopadhye
1992	—	`conf`	Reasoning about Permutations in Regular Arrays. Designing Correct Circuits Björn Lisper, Sanjay V. Rajopadhye
1992	J	`jnl`	Systematic generation of linear allocation functions in systolic array design. J. VLSI Signal Process. Xiaoxiong Zhong, Sanjay V. Rajopadhye, Ivan Wong
1991	Misc	`conf`	A folding transformation for VLSI IIR filter array design. ICASSP Sanjay V. Rajopadhye, Sayfe Kiaei
1991	—	`conf`	An improved systolic algorithm for the algebraic path problem. Algorithms and Parallel VLSI Architectures Sanjay V. Rajopadhye
1991	—	`conf`	Deriving Fully Efficient Systolic Arrays by Quasi-Linear Allocation Functions. PARLE (1) Xiaoxiong Zhong, Sanjay V. Rajopadhye
1991	J	`jnl`	OREGAMI: Tools for mapping parallel computations to parallel architectures. Int. J. Parallel Program. Virginia Mary Lo, Sanjay V. Rajopadhye, Samik Gupta, David Keldsen, Moataz A. Mohamed, Bill Nitzberg, Jan Arne Telle, Xiaoxiong Zhong
1991	Misc	`conf`	Synthesizing fully efficient systolic arrays. ICASSP Xiaoxiong Zhong, Sanjay V. Rajopadhye
1990	J	`jnl`	Automating the design of systolic arrays. Integr. Sanjay V. Rajopadhye, Richard M. Fujimoto
1990	—	`conf`	Mapping Divide-and-Conquer Algorithms to Parallel Architectures. ICPP (3) Virginia Mary Lo, Sanjay V. Rajopadhye, Samik Gupta, David Keldsen, Moataz A. Mohamed, Jan Arne Telle
1990	—	`conf`	OREGAMI: Software Tools for Mapping Parallel Computations to Parallel Architectures. ICPP (2) Virginia Mary Lo, Sanjay V. Rajopadhye, Samik Gupta, David Keldsen, Moataz A. Mohamed, Jan Arne Telle
1990	—	`conf`	Scheduling affine parameterized recurrences by means of Variable Dependent Timing Functions. ASAP Christophe Mauras, Patrice Quinton, Sanjay V. Rajopadhye, Yannick Saouter
1990	J	`jnl`	Synthesizing systolic arrays from recurrence equations. Parallel Comput. Sanjay V. Rajopadhye, Richard Fujimoto
1989	J	`jnl`	Synthesizing Systolic Arrays with Control Signals from Recurrence Equations. Distributed Comput. Sanjay V. Rajopadhye
1987	—	`conf`	Systolic Array Synthesis by Static Analysis of Program Dependencies. PARLE (1) Sanjay V. Rajopadhye, Richard Fujimoto
1986	—	`conf`	On Synthesizing Systolic Arrays from Recurrence Equations with Linear Dependencies. FSTTCS Sanjay V. Rajopadhye, S. Purushothaman, Richard Fujimoto
1986	B	`conf`	Verification of Systolic Arrays: A Stream Function Approach. ICPP Sanjay V. Rajopadhye, Prakash Panangaden
1985	J	`jnl`	Formal semantics for a symbolic IC design technique: Examples and applications. Integr. Sanjay V. Rajopadhye, P. A. Subrahmanyam