| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2019 | J | jnl |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
|
| 2019 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2019 | J | jnl |
IEEE J. Solid State Circuits
|
| 2018 | — | conf |
ISSCC
|
| 2016 | — | conf |
ISSCC
|
| 2015 | — | conf |
CICC
|
| 2012 | J | jnl |
IEEE J. Solid State Circuits
|
| 2012 | J | jnl |
IEEE Des. Test
|
| 2011 | C | conf |
FIE
|
| 2010 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2009 | J | jnl |
IEEE J. Solid State Circuits
|
| 2009 | J | jnl |
Proc. IEEE
|
| 2008 | C | conf |
ISCAS
|
| 2007 | J | jnl |
IEEE Trans. Circuits Syst. I Regul. Pap.
|
| 2004 | J | jnl |
Concurr. Pract. Exp.
|
| 2004 | — | conf |
ICMENS
|
| 2003 | Misc | conf |
SAC
|
| 2003 | J | jnl |
IEEE J. Solid State Circuits
|