Sangyeun Cho - RankMe

99 papers A* 12A 8B 16C 7Misc 1Journal 27Unranked 27

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Self-Encrypting Drive Evolving Toward Multitenant Cloud Computing. Computer Jisoo Kim, Mungyu Bae, Yeonsung Chu, Moon Chan Park, Dongwon Park, Dawoon Jung, Sangyeun Cho
2024	—	`conf`	ZMS: Zone Abstraction for Mobile Flash Storage. USENIX ATC Joo Young Hwang, Seokhwan Kim, Daejun Park, Yong-Gil Song, Junyoung Han, Seunghyun Choi, Sangyeun Cho, Youjip Won
2023	—	`conf`	TiDedup: A New Distributed Deduplication Architecture for Ceph. USENIX ATC Myoungwon Oh, Sungmin Lee, Samuel Just, Youngjin Yu, Duck-Ho Bae, Sage A. Weil, Sangyeun Cho, Heon Y. Yeom
2018	A*	`conf`	2B-SSD: The Case for Dual, Byte- and Block-Addressable Solid-State Drives. ISCA Duck-Ho Bae, Insoon Jo, Youra Choi, Joo Young Hwang, Sangyeun Cho, Daniel D. G. Lee, Jaeheon Jeong
2018	—	`conf`	A flash memory controller for 15μs ultra-low-latency SSD using high-speed 3D NAND flash with 3μs read time. ISSCC Wooseong Cheong, Chanho Yoon, Seonghoon Woo, Kyuwook Han, Daehyun Kim, Chulseung Lee, Youra Choi, Shine Kim, Dongku Kang, Geunyeong Yu, Jaehong Kim, Jaechun Park, Ki-Whan Song, Ki-Tae Park, Sangyeun Cho, Hwaseok Oh, Daniel D. G. Lee, Jin-Hyeok Choi, Jaeheon Jeong
2018	A	`conf`	Barrier-Enabled IO Stack for Flash Storage. FAST Youjip Won, Jaemin Jung, Gyeongyeol Choi, Joontaek Oh, Seongbae Son, Joo Young Hwang, Sangyeun Cho
2018	J	`jnl`	Bringing Order to Chaos: Barrier-Enabled I/O Stack for Flash Storage. ACM Trans. Storage Youjip Won, Joontaek Oh, Jaemin Jung, Gyeongyeol Choi, Seongbae Son, Joo Young Hwang, Sangyeun Cho
2018	A	`conf`	FStream: Managing Flash Streams in the File System. FAST Eunhee Rho, Kanchan Joshi, Seung-Uk Shin, Nitesh Jagadeesh Shetty, Joo Young Hwang, Sangyeun Cho, Daniel D. G. Lee, Jaeheon Jeong
2017	J	`jnl`	An analytical model based on performance demand of workload for energy-efficient heterogeneous multicore systems. J. Parallel Distributed Comput. Min-Kwan Kee, Hong-Yeol Lim, Giho Park, Sangyeun Cho
2017	J	`jnl`	Barrier Enabled IO Stack for Flash Storage. CoRR Youjip Won, Jaemin Jung, Gyeongyeol Choi, Joontaek Oh, Seongbae Son, Joo Young Hwang, Sangyeun Cho
2017	—	`conf`	Jointly optimizing task granularity and concurrency for in-memory mapreduce frameworks. IEEE BigData Jonghyun Bae, Hakbeom Jang, Wenjing Jin, Jun Heo, Jaeyoung Jang, Joo Young Hwang, Sangyeun Cho, Jae W. Lee
2016	A*	`conf`	Biscuit: A Framework for Near-Data Processing of Big Data Workloads. ISCA Boncheol Gu, Andre S. Yoon, Duck-Ho Bae, Insoon Jo, Jinyoung Lee, Jonghyun Yoon, Jeong-Uk Kang, MoonSang Kwon, Chanho Yoon, Sangyeun Cho, Jaeheon Jeong, Duckhyun Chang
2016	A*	`conf`	Design and implementation of a mobile storage leveraging the DRAM interface. HPCA Sungyong Seo, Youngjin Cho, Youngkwang Yoo, Otae Bae, Jaegeun Park, Heehyun Nam, Sunmi Lee, Yongmyung Lee, Seungdo Chae, MoonSang Kwon, Jin-Hyeok Choi, Sangyeun Cho, Jaeheon Jeong, Duckhyun Chang
2016	J	`jnl`	In-storage processing of database scans and joins. Inf. Sci. Sungchan Kim, Hyunok Oh, Chanik Park, Sangyeun Cho, Sang-Won Lee, Bongki Moon
2016	J	`jnl`	Symbol Shifting: Tolerating More Faults in PCM Blocks. IEEE Trans. Computers Rakan Maddah, Sangyeun Cho, Rami G. Melhem
2016	J	`jnl`	YourSQL: A High-Performance Database System Leveraging In-Storage Computing. Proc. VLDB Endow. Insoon Jo, Duck-Ho Bae, Andre S. Yoon, Jeong-Uk Kang, Sangyeun Cho, Daniel D. G. Lee, Jaeheon Jeong
2015	A	`conf`	F2FS: A New File System for Flash Storage. FAST Changman Lee, Dongho Sim, Joo Young Hwang, Sangyeun Cho
2015	—	`conf`	Fast memory and storage architectures for the big data era. A-SSCC Sangyeun Cho
2015	—	`conf`	Optimizing NoSQL DB on Flash: A Case Study of RocksDB. UIC/ATC/ScalCom Fei Yang, Kun Dou, Siyu Chen, Mengwei Hou, Jeong-Uk Kang, Sangyeun Cho
2015	J	`jnl`	RDIS: Tolerating Many Stuck-At Faults in Resistive Memory. IEEE Trans. Computers Rakan Maddah, Rami G. Melhem, Sangyeun Cho
2015	—	`conf`	Recent advances in flash solutions. ICDE Workshops Sangyeun Cho
2015	A*	`conf`	The solid-state drive technology, today and tomorrow. ICDE Sangyeun Cho, Sanghoan Chang, Insoon Jo
2014	J	`jnl`	COMeT+: Continuous Online Memory Testing with Multi-Threading Extension. IEEE Trans. Computers Musfiq Rahman, Bruce R. Childers, Sangyeun Cho
2014	C	`conf`	Design space exploration of an NVM-based memory hierarchy. ICCD Seungjae Baek, Daeyeon Son, Dongwoo Kang, Jongmoo Choi, Sangyeun Cho
2014	—	`conf`	Keynote: "Flashing the roads ahead". NVMSA Sangyeun Cho
2014	J	`jnl`	Refresh Now and Then. IEEE Trans. Computers Seungjae Baek, Sangyeun Cho, Rami G. Melhem
2014	A*	`conf`	Stash directory: A scalable directory for many-core coherence. HPCA Socrates Demetriades, Sangyeun Cho
2014	—	`conf`	The Multi-streamed Solid-State Drive. HotStorage Jeong-Uk Kang, Jeeseok Hyun, Hyunjoo Maeng, Sangyeun Cho
2013	J	`jnl`	Accurately modeling superscalar processor performance with reduced trace. J. Parallel Distributed Comput. Kiyeon Lee, Sangyeun Cho
2013	A	`conf`	Active disk meets flash: a case for intelligent SSDs. ICS Sangyeun Cho, Chanik Park, Hyunok Oh, Sungchan Kim, Youngmin Yi, Gregory R. Ganger
2013	J	`jnl`	Data Dependent Sparing to Manage Better-Than-Bad Blocks. IEEE Comput. Archit. Lett. Rakan Maddah, Sangyeun Cho, Rami G. Melhem
2013	A	`conf`	Memorage: emerging persistent RAM based malleable main memory and storage architecture. ICS Ju-Young Jung, Sangyeun Cho
2013	C	`conf`	Power of One Bit: Increasing Error Correction Capability with Data Inversion. PRDC Rakan Maddah, Sangyeun Cho, Rami G. Melhem
2012	—	`conf`	A Theoretical Design for SSD Texture Storage. ICPP Workshops Andrew Conn, Joseph V. Cavanaugh, Sangyeun Cho
2012	—	`conf`	Characterizing Machines and Workloads on a Google Cluster. ICPP Workshops Zitao Liu, Sangyeun Cho
2012	C	`conf`	Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors. ICCD Kiyeon Lee, Moo-Kyoung Chung, Soojung Ryu, Yeon-Gon Cho, Sangyeun Cho
2012	B	`ed.`	International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012 PACT Pen-Chung Yew, Sangyeun Cho, Luiz DeRose, David J. Lilja
2012	A*	`conf`	Predicting Coherence Communication by Tracking Synchronization Points at Run Time. MICRO Socrates Demetriades, Sangyeun Cho
2012	A	`conf`	RDIS: A recursively defined invertible set scheme to tolerate multiple stuck-at faults in resistive memory. DSN Rami G. Melhem, Rakan Maddah, Sangyeun Cho
2011	B	`conf`	A Novel Scalable IPv6 Lookup Scheme Using Compressed Pipelined Tries. Networking (1) Michel Hanna, Sangyeun Cho, Rami G. Melhem
2011	J	`jnl`	Advanced hashing schemes for packet forwarding using set associative memory architectures. J. Parallel Distributed Comput. Michel Hanna, Socrates Demetriades, Sangyeun Cho, Rami G. Melhem
2011	B	`conf`	An Analytical Performance Model for Co-management of Last-Level Cache and Bandwidth Sharing. MASCOTS Taecheol Oh, Kiyeon Lee, Sangyeun Cho
2011	—	`conf`	BarrierWatch: characterizing multithreaded workloads across and within program-defined epochs. Conf. Computing Frontiers Socrates Demetriades, Sangyeun Cho
2011	J	`jnl`	C-AMTE: A location mechanism for flexible cache management in chip multiprocessors. J. Parallel Distributed Comput. Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
2011	C	`conf`	COMeT: Continuous Online Memory Test. PRDC Musfiq Rahman, Bruce R. Childers, Sangyeun Cho
2011	—	`conf`	Cache equalizer: a placement mechanism for chip multiprocessor distributed shared caches. HiPEAC Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
2011	A*	`conf`	CloudCache: Expanding and shrinking private caches. HPCA Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2011	J	`jnl`	DEFCAM: A design and evaluation framework for defect-tolerant cache memories. ACM Trans. Archit. Code Optim. Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2011	—	`conf`	Dynamic co-management of persistent RAM main memory and storage resources. Conf. Computing Frontiers Ju-Young Jung, Sangyeun Cho
2011	—	`conf`	Fast, Energy Efficient Scan inside Flash Memory. ADMS@VLDB Sungchan Kim, Hyunok Oh, Chanik Park, Sangyeun Cho, Sang-Won Lee
2011	B	`conf`	In-N-Out: Reproducing Out-of-Order Superscalar Processor Behavior from Reduced In-Order Traces. MASCOTS Kiyeon Lee, Sangyeun Cho
2011	—	`conf`	MAESTRO: Orchestrating predictive resource management in future multicore systems. AHS Sangyeun Cho, Socrates Demetriades
2011	J	`jnl`	Macro Data Load: An Efficient Mechanism for Enhancing Loaded Data Reuse. IEEE Trans. Computers Lei Jin, Sangyeun Cho
2011	B	`conf`	PRISM: Zooming in persistent RAM storage behavior. ISPASS Ju-Young Jung, Sangyeun Cho
2011	B	`conf`	Scalable Multi-cache Simulation Using GPUs. MASCOTS Michael Moeng, Sangyeun Cho, Rami G. Melhem
2010	J	`jnl`	A Dynamic Pressure-Aware Associative Placement Strategy for Large Scale Chip Multiprocessors. IEEE Comput. Archit. Lett. Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
2010	Misc	`conf`	A content-aware block placement algorithm for reducing PRAM storage bit writes. MSST Brian Wongchaowart, Marian Kamal Iskander, Sangyeun Cho
2010	B	`conf`	An intra-tile cache set balancing scheme. PACT Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
2010	J	`jnl`	On the Interplay of Parallelization, Program Performance, and Energy Consumption. IEEE Trans. Parallel Distributed Syst. Sangyeun Cho, Rami G. Melhem
2010	J	`jnl`	PERFECTORY: A Fault-Tolerant Directory Memory Architecture. IEEE Trans. Computers Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2010	B	`conf`	StealthWorks: Emulating Memory Errors. RV Musfiq Rahman, Bruce R. Childers, Sangyeun Cho
2010	A*	`conf`	StimulusCache: Boosting performance of chip multiprocessors with excess cache. HPCA Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2010	J	`jnl`	Two-phase trace-driven simulation (TPTS): a fast multicore processor architecture simulation approach. Softw. Pract. Exp. Hyunjin Lee, Lei Jin, Kiyeon Lee, Socrates Demetriades, Michael Moeng, Sangyeun Cho
2009	—	`conf`	ACM: An Efficient Approach for Managing Shared Caches in Chip Multiprocessors. HiPEAC Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
2009	B	`conf`	Accurately approximating superscalar processor performance from traces. ISPASS Kiyeon Lee, Shayne Evans, Sangyeun Cho
2009	—	`conf`	An Analytical Model to Study Optimal Area Breakdown between Cores and Caches in a Chip Multiprocessor. ISVLSI Taecheol Oh, Hyunjin Lee, Kiyeon Lee, Sangyeun Cho
2009	J	`jnl`	Augmented FIFO Cache Replacement Policies for Low-Power Embedded Processors. J. Circuits Syst. Comput. Sangyeun Cho, Lory Al Moakar
2009	B	`conf`	CHAP: Enabling Efficient Hardware-Based Multiple Hash Schemes for IP Lookup. Networking Michel Hanna, Socrates Demetriades, Sangyeun Cho, Rami G. Melhem
2009	A	`conf`	Dynamic cache clustering for chip multiprocessors. ICS Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
2009	A*	`conf`	Flip-N-Write: a simple deterministic technique to improve PRAM write performance, energy and endurance. MICRO Sangyeun Cho, Hyunjin Lee
2009	—	`conf`	Progressive hashing for packet processing using set associative memory. ANCS Michel Hanna, Socrates Demetriades, Sangyeun Cho, Rami G. Melhem
2009	B	`conf`	SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors. PACT Lei Jin, Sangyeun Cho
2008	—	`conf`	An Efficient Hardware-Based Multi-hash Scheme for High Speed IP Lookup. Hot Interconnects Socrates Demetriades, Michel Hanna, Sangyeun Cho, Rami G. Melhem
2008	J	`jnl`	Corollaries to Amdahl's Law for Energy. IEEE Comput. Archit. Lett. Sangyeun Cho, Rami G. Melhem
2008	—	`conf`	Early prediction of product performance and yield via technology benchmark. CICC Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Daihyun Lim, Sangyeun Cho
2008	J	`jnl`	Guest Editors' Introduction: Interaction of Many-Core Computer Architecture and Operating Systems. IEEE Micro Sangyeun Cho, Tao Li, Onur Mutlu
2008	—	`conf`	Preliminary studies to develop a ubiquitous computing and health-monitoring system for wheelchair users. BODYNETS Jongbae Kim, Sangyeun Cho, Seung-Jae Kim
2008	B	`conf`	TPTS: A Novel Framework for Very Fast Manycore Processor Architecture Simulation. ICPP Sangyeun Cho, Socrates Demetriades, Shayne Evans, Lei Jin, Hyunjin Lee, Kiyeon Lee, Michael Moeng
2008	B	`conf`	Taming Single-Thread Program Performance on Many Distributed On-Chip L2 Caches. ICPP Lei Jin, Sangyeun Cho
2007	—	`conf`	A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology. ISQED Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Jean-Olivier Plouchart, Daihyun Lim, Sangyeun Cho, Robert Trzcinski
2007	B	`conf`	Achieving Predictable Performance with On-Chip Shared L2 Caches for Manycore-Based Real-Time Systems. RTCSA Sangyeun Cho, Lei Jin, Kiyeon Lee
2007	—	`ed.`	Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings Asia-Pacific Computer Systems Architecture Conference Lynn Choi, Yunheung Paek, Sangyeun Cho
2007	B	`conf`	CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications. ISPASS Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad H. Hammoud, Rami G. Melhem
2007	C	`conf`	Exploring the interplay of yield, area, and performance in processor caches. ICCD Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2007	—	`conf`	I-cache multi-banking and vertical interleaving. ACM Great Lakes Symposium on VLSI Sangyeun Cho
2007	—	`conf`	Performance of Graceful Degradation for Cache Faults. ISVLSI Hyunjin Lee, Sangyeun Cho, Bruce R. Childers
2006	—	`conf`	A flexible data to L2 cache mapping approach for future multicore processors. Memory System Performance and Correctness Lei Jin, Hyunjin Lee, Sangyeun Cho
2006	A*	`conf`	Managing Distributed, Shared L2 Caches through OS-Level Page Allocation. MICRO Sangyeun Cho, Lei Jin
2006	A	`conf`	Reducing cache traffic and energy with macro data load. ISLPED Lei Jin, Sangyeun Cho
2001	J	`jnl`	A High-Bandwidth Memory Pipeline for Wide Issue Processors. IEEE Trans. Computers Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
2001	C	`conf`	A Low-Power Cache Design for CalmRISC ICCD Sangyeun Cho, Wooyoung Jung, Yongchun Kim, Seh-Woong Jeong
1999	A*	`conf`	Access Region Locality for High-Bandwidth Processor Memory System Design. MICRO Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
1999	J	`jnl`	Coherence and Replacement Protocol of DICE-A Bus-Based COMA Multiprocessor. J. Parallel Distributed Comput. Sangyeun Cho, Jinseok Kong, Gyungho Lee
1999	A*	`conf`	Decoupling Local Variable Accesses in a Wide-Issue Superscalar Processor. ISCA Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
1999	J	`jnl`	Design of a bus-based shared-memory multiprocessor DICE. Microprocess. Microsystems Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney
1998	B	`conf`	High-Level Information - An Approach for Integrating Front-End and Back-End Compilers. ICPP Sangyeun Cho, Jenn-Yuan Tsai, Yonghong Song, Bixia Zheng, Stephen J. Schwinn, Xin Wang, Qing Zhao, Zhiyuan Li, David J. Lilja, Pen-Chung Yew
1998	J	`jnl`	On timing constraints of snooping in a bus-based COMA multiprocessor. Microprocess. Microsystems Sangyeun Cho, Jinseok Kong, Gyungho Lee
1996	C	`conf`	Global Bus Design of a Bus-Based COMA Multiprocessor DICE. ICCD Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney
1996	—	`conf`	Reducing Coherence Overhead in Shared-Bus Multiprocessors. Euro-Par, Vol. II Sangyeun Cho, Gyungho Lee