Sanghyeon Baeg

40 papers A* 1A 2C 1Journal 30Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
Reassessing March Test Effectiveness in System Memory Error Detection Through Inductive Fault Analysis.
IEEE Access
Jeonghwan Kim, Sanghyeon Baeg
2024 — conf
Total-Ionizing Dose Damage from X-Ray PCB Inspection Systems.
IRPS
Nicholas J. Pieper, M. Chun, Yoni Xiong, H. M. Dattilo, Jenna B. Kronenberg, Sanghyeon Baeg, Shi-Jie Wen, Rita Fung, D. Chan, C. Escobar, Bharat L. Bhuva
2023 — conf
Write Recovery Time Degradation by Thermal Neutrons in DDR4 DRAM Components.
IRPS
Hyeongseok Oh, Myungsun Chun, Jiwon Lee, Shi-Jie Wen, Nick Yu, Byung-Gun Park, Sanghyeon Baeg
2021 J jnl
DDR4 Data Channel Failure Due to DC Offset Caused by Intermittent Solder Ball Fracture in FBGA Package.
IEEE Access
Muhammad Waqar, GeunYong Bak, Junhyeong Kwon, Sanghyeon Baeg
2021 J jnl
Exploitations of Multiple Rows Hammering and Retention Time Interactions in DRAM Using X-Ray Radiation.
IEEE Access
Donghyuk Yun, Myungsang Park, GeunYong Bak, Sanghyeon Baeg, Shi-Jie Wen
2021 J jnl
Fault Coverage Re-Evaluation of Memory Test Algorithms With Physical Memory Characteristics.
IEEE Access
Kiseok Lee, Jeonghwan Kim, Sanghyeon Baeg
2019 J jnl
Architectural design tradeoffs in SRAM-based TCAMs.
IEICE Electron. Express
Ali Ahmed, Kyungbae Park, Saqib Ali Khan, Naeem Maroof, Sanghyeon Baeg
2018 J jnl
Failure signature analysis of power-opens in DDR3 SDRAMs.
Microelectron. Reliab.
Tan Li, Hosung Lee, GeunYong Bak, Sanghyeon Baeg
2018 J jnl
Signal characteristic and test exploitation for intermittent nanometer-scale cracks.
Microelectron. Reliab.
Hosung Lee, Sanghyeon Baeg
2018 — conf
Study of TID effects on one row hammering using gamma in DDR4 SDRAMs.
IRPS
Donghyuk Yun, Myungsang Park, Chul Seung Lim, Sanghyeon Baeg
2018 J jnl
Study of proton radiation effect to row hammer fault in DDR4 SDRAMs.
Microelectron. Reliab.
Chul Seung Lim, Kyungbae Park, GeunYong Bak, Donghyuk Yun, Myungsang Park, Sanghyeon Baeg, Shi-Jie Wen, Richard Wong
2017 J jnl
An alternative approach to measure alpha-particle-induced SEU cross-section for flip-chip packaged SRAM devices: High energy alpha backside irradiation.
Microelectron. Reliab.
Saqib A. Khan, Chul Seung Lim, GeunYong Bak, Sanghyeon Baeg, Soonyoung Lee
2017 J jnl
Resource-Efficient SRAM-Based Ternary Content Addressable Memory.
IEEE Trans. Very Large Scale Integr. Syst.
Ali Ahmed, Kyungbae Park, Sanghyeon Baeg
2017 J jnl
Temporal and frequency characteristic analysis of margin-related failures caused by an intermittent nano-scale fracture of the solder ball in a BGA package device.
Microelectron. Reliab.
Hosung Lee, Sanghyeon Baeg, Nelson Hua, Shi-Jie Wen
2016 J jnl
Assessing alpha-particle-induced SEU sensitivity of flip-chip bonded SRAM using high energy irradiation.
IEICE Electron. Express
Saqib A. Khan, Shi-Jie Wen, Sanghyeon Baeg
2016 J jnl
Erratum: Assessing alpha-particle-induced SEU sensitivity of flip-chip bonded SRAM using high energy irradiation [IEICE Electronics Express Vol. 13 (2016) No. 17 pp. 20160627].
IEICE Electron. Express
Saqib A. Khan, Shi-Jie Wen, Sanghyeon Baeg
2016 J jnl
Experiments and root cause analysis for active-precharge hammering fault in DDR3 SDRAM under 3 × nm technology.
Microelectron. Reliab.
Kyungbae Park, Chul Seung Lim, Donghyuk Yun, Sanghyeon Baeg
2016 J jnl
Statistical distributions of row-hammering induced failures in DDR3 components.
Microelectron. Reliab.
Kyungbae Park, Donghyuk Yun, Sanghyeon Baeg
2015 — conf
Logic soft error study with 800-MHz DDR3 SDRAMs in 3x nm using proton and neutron beams.
IRPS
GeunYong Bak, Soonyoung Lee, Hosung Lee, Kyungbae Park, Sanghyeon Baeg, Shi-Jie Wen, Richard Wong, Charlie Slayman
2014 J jnl
An Efficient Multiple Cell Upsets Tolerant Content-Addressable Memory.
IEEE Trans. Computers
Syed Mohsin Abbas, Soonyoung Lee, Sanghyeon Baeg, Sungju Park
2014 J jnl
Single Event Resilient Dynamic Logic Designs.
J. Electron. Test.
Haibin Wang, Mulong Li, Li Chen, Rui Liu, Sanghyeon Baeg, Shi-Jie Wen, Richard Wong, Rita Fung, Jinshun Bi
2013 J jnl
Soft error tolerant Content Addressable Memories (CAMs) using error detection codes and duplication.
Microprocess. Microsystems
Juan Antonio Maestro, Pedro Reviriego, Sanghyeon Baeg, Shi-Jie Wen, Richard Wong
2012 J jnl
Characterizing the Capacitive Crosstalk in SRAM Cells Using Negative Bit-Line Voltage Stress.
IEEE Trans. Instrum. Meas.
Jongsun Bae, Sanghyeon Baeg, Sungju Park
2012 J jnl
Hybrid Partitioned SRAM-Based Ternary Content Addressable Memory.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zahid Ullah, Kim Ilgon, Sanghyeon Baeg
2012 — conf
Soft Error Issues with Scaling Technologies.
Asian Test Symposium
Sanghyeon Baeg, Jongsun Bae, Soonyoung Lee, Chul Seung Lim, Sang Hoon Jeon, Hyeonwoo Nam
2011 — conf
Design method of NOR-type comparison circuit in CAM with ground bounce noise considerations.
ISQED
Changmin Jung, Sanghyeon Baeg, Shi-Jie Wen, Richard Wong
2011 A* conf
Designing ad-hoc scrubbing sequences to improve memory reliability against soft errors.
DAC
Pedro Reviriego, Juan Antonio Maestro, Sanghyeon Baeg
2011 J jnl
Mitigating the effects of large multiple cell upsets (MCUs) in memories.
ACM Trans. Design Autom. Electr. Syst.
Juan Antonio Maestro, Pedro Reviriego, Sanghyeon Baeg, Shi-Jie Wen, Richard Wong
2010 J jnl
Minimizing Soft Errors in TCAM Devices: A Probabilistic Approach to Determining Scrubbing Intervals.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sanghyeon Baeg, Shi-Jie Wen, Richard Wong
2009 J jnl
A di/dt Compensation Technique in Delay Testing by Disconnecting Power Pins.
IEEE Trans. Instrum. Meas.
Sanghyeon Baeg
2009 J jnl
Null Detector Circuit Design Scheme for Detecting Defective AC-Coupled Capacitors in Differential Signaling.
IEEE Trans. Instrum. Meas.
Sanghyeon Baeg
2008 J jnl
Low Power Configuration Strategy of TCAM Lookup Table.
IEICE Trans. Commun.
Sanghyeon Baeg
2008 J jnl
Low-Power Ternary Content-Addressable Memory Design Using a Segmented Match Line.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sanghyeon Baeg
2007 J jnl
Delay Fault Coverage Enhancement by Partial Clocking for Low-Power Designs With Heavily Gated Clocks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sanghyeon Baeg
2006 J jnl
Efficient Interconnect Test Patterns for Crosstalk and Static Faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pyoungwoo Min, Hyunbean Yi, Jaehoon Song, Sanghyeon Baeg, Sungju Park
2005 J jnl
Analytical test buffer design for differential signaling I/O buffers by error syndrome analysis.
IEEE Trans. Very Large Scale Integr. Syst.
Sanghyeon Baeg, Sung Soo Chung
2001 A conf
AC-JTAG: empowering JTAG beyond testing DC nets.
ITC
Sung Soo Chung, Sanghyeon Baeg
1999 J jnl
A cost-effective design for testability: clock line control and test generation using selective clocking.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sanghyeon Baeg, William A. Rogers
1994 C conf
A New Test Generation Methodology Using Selective Clocking for the Clock Line Controlled Circuits.
ICCD
Sanghyeon Baeg, William A. Rogers
1994 A conf
Hybrid Design for Testability Combining Scan and Clock Line Control and Method for Test Generation.
ITC
Sanghyeon Baeg, William A. Rogers