| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2016 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2012 | A* | conf |
DAC
|
| 2012 | A | conf |
DATE
|
| 2012 | Misc | conf |
VLSI Design
|
| 2012 | — | conf |
ICICDT
|
| 2012 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2012 | A | conf |
ISLPED
|
| 2011 | A | conf |
Column-selection-enabled 8T SRAM array with ~1R/1W multi-port operation for DVFS-enabled processors.
ISLPED
|
| 2011 | A | conf |
ISLPED
|
| 2011 | Misc | conf |
VTS
|
| 2011 | A | conf |
DATE
|
| 2010 | A | conf |
ISLPED
|
| 2010 | A | conf |
DATE
|
| 2010 | J | jnl |
IEEE J. Solid State Circuits
|
| 2010 | J | jnl |
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2009 | J | jnl |
IEEE J. Solid State Circuits
|
| 2009 | J | jnl |
IEEE Des. Test Comput.
|
| 2008 | — | conf |
ISSCC
|
| 2008 | — | conf |
ASP-DAC
|
| 2008 | A* | conf |
DAC
|
| 2007 | A | conf |
ICCAD
|