Sandeep K. Gupta

153 papers A* 8A 39C 5Misc 33Journal 26Unranked 42
YearRankTypeTitle / Venue / Authors
2025 J jnl
Stochastic TDC Using Common-Mode Time Dithering and Passive Approximate Adders.
IEEE J. Solid State Circuits
Shiyu Su, Qiaochu Zhang, Baishakhi Rani Biswas, Sandeep K. Gupta, Mike Shuo-Wei Chen
2021 — conf
HW-BCP: A Custom Hardware Accelerator for SAT Suitable for Single Chip Implementation for Large Benchmarks.
ASP-DAC
Soowang Park, Jae-Won Nam, Sandeep K. Gupta
2020 Misc conf
Aging-resilient SRAM design: an end-to-end framework.
VTS
Xuan Zuo, Sandeep K. Gupta
2019 Misc conf
A New Method for Software Test Data Generation Inspired by D-algorithm.
VTS
Jianwei Zhang, Sandeep K. Gupta, William G. J. Halfond
2019 Misc conf
Cache Design for Yield-per-Area Maximization: Switchable Spare Columns with Disabling (SSC-Disable).
VTS
Soowang Park, Sandeep K. Gupta
2017 Misc conf
Asymmetric sizing: An effective design approach for SRAM cells against BTI aging.
VTS
Xuan Zuo, Sandeep K. Gupta
2017 — conf
Wordline overdriving test: An effective predictive testing method for SRAMs against BTI aging.
ISQED
Jizhe Zhang, Sandeep K. Gupta
2016 Misc conf
Process variation oriented delay testing of SRAMs.
VTS
Xuan Zuo, Sandeep K. Gupta
2016 Misc conf
SRAM yield-per-area optimization under spatially-correlated process variation.
VTS
Jizhe Zhang, Sandeep K. Gupta
2016 Misc conf
Using hardware testing approaches to improve software testing: Undetectable mutant identification.
VTS
Jianwei Zhang, Sandeep K. Gupta
2016 — conf
Yield estimation and statistical design of memristor cross-point memory systems.
ISQED
Jizhe Zhang, Sandeep K. Gupta
2015 Misc conf
A multi-layered methodology for defect-tolerance of datapath modules in processors.
VTS
Hsunwei Hsiung, Sandeep K. Gupta
2015 Misc conf
Analysis and optimization of soft error tolerance strategies for real-time systems.
CODES+ISSS
Bowen Zheng, Yue Gao, Qi Zhu, Sandeep K. Gupta
2015 Misc conf
PPB: Partially-working processors binning for maximizing wafer utilization.
VTS
Da Cheng, Sandeep K. Gupta
2014 — conf
A Resizing Method to Minimize Effects of Hardware Trojans.
ATS
Byeongju Cha, Sandeep K. Gupta
2014 A conf
An energy-aware fault tolerant scheduling framework for soft error resilient cloud computing systems.
DATE
Yue Gao, Sandeep K. Gupta, Yanzhi Wang, Massoud Pedram
2014 — conf
Efficient post-silicon validation via segmentation of process variation envelope - Global vs local variations.
ISQED
Prasanjeet Das, Sandeep K. Gupta
2014 J jnl
Maximizing Yield per Area of Highly Parallel CMPs Using Hardware Redundancy.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Da Cheng, Sandeep K. Gupta
2014 — conf
Optimal Redundancy Designs for CNFET-Based Circuits.
ATS
Da Cheng, Fangzhou Wang, Feng Gao, Sandeep K. Gupta
2014 A conf
Optimizing redundancy design for chip-multiprocessors for flexible utility functions.
ITC
Da Cheng, Sandeep K. Gupta
2013 — conf
A New March Test for Process-Variation Induced Delay Faults in SRAMs.
Asian Test Symposium
Da Cheng, Hsunwei Hsiung, Bin Liu, Jianing Chen, Jia Zeng, Ramesh Govindan, Sandeep K. Gupta
2013 Misc conf
An energy and deadline aware resource provisioning, scheduling and optimization framework for cloud systems.
CODES+ISSS
Yue Gao, Yanzhi Wang, Sandeep K. Gupta, Massoud Pedram
2013 Misc conf
Extending pre-silicon delay models for post-silicon tasks: Validation, diagnosis, delay testing, and speed binning.
VTS
Prasanjeet Das, Sandeep K. Gupta
2013 C conf
Gate delay modeling for pre- and post-silicon timing related tasks for ultra-low power CMOS circuits.
ICCD
Prasanjeet Das, Sandeep K. Gupta
2013 — conf
Interplay of Failure Rate, Performance, and Test Cost in TCAM under Process Variations.
Asian Test Symposium
Hsunwei Hsiung, Da Cheng, Bin Liu, Ramesh Govindan, Sandeep K. Gupta
2013 A conf
Trojan detection via delay measurements: a new approach to select paths and vectors to maximize effectiveness and minimize cost.
DATE
Byeongju Cha, Sandeep K. Gupta
2013 A conf
Using explicit output comparisons for fault tolerant scheduling (FTS) on modern high-performance processors.
DATE
Yue Gao, Sandeep K. Gupta, Melvin A. Breuer
2012 A conf
A design flow to maximize yield/area of physical devices via redundancy.
ITC
Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta
2012 — conf
A systematic methodology to improve yield per area of highly-parallel CMPs.
DFT
Da Cheng, Sandeep K. Gupta
2012 — conf
Efficient Trojan Detection via Calibration of Process Variations.
Asian Test Symposium
Byeongju Cha, Sandeep K. Gupta
2012 A conf
Salvaging chips with caches beyond repair.
DATE
Hsunwei Hsiung, Byeongju Cha, Sandeep K. Gupta
2012 — conf
Theory of redundancy for logic circuits to maximize yield/area.
ISQED
Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta, Shahin Nazarian
2011 A conf
A new circuit simplification method for error tolerant applications.
DATE
Doochul Shin, Sandeep K. Gupta
2011 — conf
On Generating Vectors for Accurate Post-Silicon Delay Characterization.
Asian Test Symposium
Prasanjeet Das, Sandeep K. Gupta
2011 — conf
Yield-per-Area Optimization for 6T-SRAMs Using an Integrated Approach to Exploit Spares and ECC to Efficiently Combat High Defect and Soft-Error Rates.
Asian Test Symposium
Jae Chul Cha, Sandeep K. Gupta
2010 A conf
Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules.
DATE
Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta
2010 A conf
Approximate logic synthesis for error tolerant applications.
DATE
Doochul Shin, Sandeep K. Gupta
2010 A conf
Design and test of latch-based circuits to maximize performance, yield, and delay test quality.
ITC
Kun Young Chung, Sandeep K. Gupta
2010 — conf
HYPER: A Heuristic for Yield/Area imProvEment Using Redundancy in SoC.
Asian Test Symposium
Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta
2009 Misc conf
Efficient Scheduling of Path Delay Tests for Latch-Based Circuits.
VTS
Kun Young Chung, Sandeep K. Gupta
2009 — conf
SIRUP: Switch Insertion in RedUndant Pipeline Structures for Yield and Yield/Area Improvement.
Asian Test Symposium
Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta
2009 J jnl
Threshold Testing: Improving Yield for Nanoscale VLSI.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhigang Jiang, Sandeep K. Gupta
2009 A conf
Tolerance of performance degrading faults for effective yield improvement.
ITC
Tong-Yu Hsieh, Melvin A. Breuer, Murali Annavaram, Sandeep K. Gupta, Kuen-Jong Lee
2008 — conf
A Multi-valued Algebra for Capacitance Induced Crosstalk Delay Faults.
ATS
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
2008 — conf
A Re-design Technique for Datapath Modules in Error Tolerant Applications.
ATS
Doochul Shin, Sandeep K. Gupta
2008 J jnl
An Efficient Data-Distribution Mechanism in a Processor-In-Memory (PIM) Architecture Applied to Motion Estimation.
IEEE Trans. Computers
Jung-Yup Kang, Sandeep K. Gupta, Jean-Luc Gaudiot
2008 Misc conf
An Industrial Case Study of Sticky Path-Delay Faults.
VTS
I-De Huang, Yi-Shing Chang, Sandeep K. Gupta, Sreejit Chakravarty
2008 C conf
Characterization of granularity and redundancy for SRAMs for optimal yield-per-area.
ICCD
Jae Chul Cha, Sandeep K. Gupta
2008 C conf
Data Partitioning and Placement Schemes for Matrix Multiplications on a PIM Architecture.
ISPDC
Jae Chul Cha, Sandeep K. Gupta
2008 — conf
Matrix Inversion on a PIM (Processor-in-Memory).
CSSE (3)
Jae Chul Cha, Sandeep K. Gupta
2008 A conf
On Accelerating Path Delay Fault Simulation of Long Test Sequences.
ITC
I-De Huang, Yi-Shing Chang, Suriyaprakash Natarajan, Ramesh Sharma, Sandeep K. Gupta
2007 — conf
Improving Timing-Independent Testing of Crosstalk Using Realistic Assumptions on Delay Faults.
ATS
Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer
2007 — conf
On Generating Vectors That Invoke High Circuit Delays - Delay Testing and Dynamic Timing Analysis.
ATS
I-De Huang, Sandeep K. Gupta
2006 C conf
A theory of Error-Rate Testing.
ICCD
Shideh Shahidi, Sandeep K. Gupta
2006 — conf
Diagnosis of delay faults due to resistive bridges, delay variations and defects.
ATS
Lei Wang, Sandeep K. Gupta, Melvin A. Breuer
2006 J jnl
LT-RTPG: a new test-per-scan BIST TPG for low switching activity.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Seongmoon Wang, Sandeep K. Gupta
2006 Misc conf
Low-Cost Scan-Based Delay Testing of Latch-Based Circuits with Time Borrowing.
VTS
Kun Young Chung, Sandeep K. Gupta
2006 — conf
STAX: statistical crosstalk target set compaction.
DATE Designers' Forum
Shahin Nazarian, Massoud Pedram, Sandeep K. Gupta, Melvin A. Breuer
2006 — conf
Test Generation for Weak Resistive Bridges.
ATS
Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer
2005 — conf
A Methodology to Compute Bounds on Crosstalk Effects in Arbitrary Interconnects.
Asian Test Symposium
Wichian Sirisaengtaksin, Sandeep K. Gupta
2005 A conf
Multiple tests for each gate delay fault: higher coverage and lower test application cost.
ITC
Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer
2005 — conf
Selection of Paths for Delay Testing.
Asian Test Symposium
I-De Huang, Sandeep K. Gupta
2005 — conf
Threshold testing: Covering bridging and other realistic faults.
Asian Test Symposium
Zhigang Jiang, Sandeep K. Gupta
2004 J jnl
Defect and Error Tolerance in the Presence of Massive Numbers of Defects.
IEEE Des. Test Comput.
Melvin A. Breuer, Sandeep K. Gupta, T. M. Mak
2004 Misc conf
Designing Reconfigurable Multiple Scan Chains for Systems-on-Chip.
VTS
Md. Saffat Quasem, Sandeep K. Gupta
2004 — conf
Efficient Identification of Crosstalk Induced Slowdown Targets.
Asian Test Symposium
Melvin A. Breuer, Sandeep K. Gupta, Shahin Nazarian
2004 — conf
Modeling and Simulation for Crosstalk Aggravated by Weak-Bridge Defects between On-Chip Interconnects.
Asian Test Symposium
Lei Wang, Sandeep K. Gupta, Melvin A. Breuer
2004 — conf
Modeling and Testing Crosstalk Faults in Inter-Core Interconnects that Include Tri-State and Bi-Directional Nets.
Asian Test Symposium
Wichian Sirisaengtaksin, Sandeep K. Gupta
2004 A conf
Timing-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models.
ITC
Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer
2003 — conf
A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores.
Asian Test Symposium
Zhigang Jiang, Sandeep K. Gupta
2003 — conf
An Enhanced Test Generator for Capacitance Induced Crosstalk Delay Faults.
Asian Test Symposium
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
2003 Misc conf
Analyzing Crosstalk in the Presence of Weak Bridge Defects.
VTS
Shahdad Irajpour, Shahin Nazarian, Lei Wang, Sandeep K. Gupta, Melvin A. Breuer
2003 J jnl
Benefits of a SoC-Specific Test Methodology.
IEEE Des. Test Comput.
Md. Saffat Quasem, Zhigang Jiang, Sandeep K. Gupta
2003 — conf
Designing Multiple Scan Chains for Systems-on-Chip.
Asian Test Symposium
Md. Saffat Quasem, Sandeep K. Gupta
2003 Misc conf
Generating Complete and Optimal March Tests for Linked Faults in Memories.
VTS
Sultan M. Al-Harbi, Sandeep K. Gupta
2003 Misc conf
Path-Delay Fault Simulation for Circuits with Large Numbers of Paths for Very Large Test Sets.
VTS
Nabil M. Abdulrazzaq, Sandeep K. Gupta
2003 A conf
Structural Delay Testing of Latch-based High-speed Pipelines with Time Borrowing.
ITC
Kun Young Chung, Sandeep K. Gupta
2003 Misc conf
Test Generation for Maximizing Ground Bounce Considering Circuit Delay.
VTS
Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
2002 C conf
Accurate and Efficient Static Timing Analysis with Crosstalk.
ICCD
I-De Huang, Sandeep K. Gupta, Melvin A. Breuer
2002 A conf
An ATPG for Threshold Testing: Obtaining Acceptable Yield in Future Processes.
ITC
Zhigang Jiang, Sandeep K. Gupta
2002 J jnl
An automatic test pattern generator for minimizing switching activity during scan testing activity.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Seongmoon Wang, Sandeep K. Gupta
2002 J jnl
Analytical models for crosstalk excitation and propagation in VLSI circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
2002 J jnl
DS-LFSR: a BIST TPG for low switching activity.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Seongmoon Wang, Sandeep K. Gupta
2002 — conf
Enhanced Crosstalk Fault Model and Methodology to Generate Tests for Arbitrary Inter-core Interconnect Topology.
Asian Test Symposium
Wichian Sirisaengtaksin, Sandeep K. Gupta
2002 J jnl
TA-PSV - Timing Analysis for Partially Specified Vectors.
J. Electron. Test.
Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer
2002 J jnl
Test Generation for Crosstalk-Induced Faults: Framework and Computational Results.
J. Electron. Test.
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
2002 A conf
XIDEN: Crosstalk Target Identification Framework.
ITC
Shahin Nazarian, Hang Huang, Suriyaprakash Natarajan, Sandeep K. Gupta, Melvin A. Breuer
2001 A* conf
A New Gate Delay Model for Simultaneous Switching and Its Applications.
DAC
Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer
2001 Misc conf
An Efficient Methodology for Generating Optimal and Uniform March Tests.
VTS
Sultan M. Al-Harbi, Sandeep K. Gupta
2001 A conf
Crosstalk test generation on pseudo industrial circuits: a case study.
ITC
Liang-Chi Chen, T. M. Mak, Sandeep K. Gupta, Melvin A. Breuer
2001 A conf
Exact fault simulation for systems on Silicon that protects each core's intellectual property.
DATE
Md. Saffat Quasem, Sandeep K. Gupta
2001 J jnl
Introducing redundant computations in RTL data paths for reducing BIST resources.
ACM Trans. Design Autom. Electr. Syst.
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
2001 J jnl
Path delay fault diagnosis in combinational circuits with implicitfault enumeration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pankaj Pant, Yuan-Chieh Hsu, Sandeep K. Gupta, Abhijit Chatterjee
2001 A conf
Switch-level delay test of domino logic circuits.
ITC
Suriyaprakash Natarajan, Sandeep K. Gupta, Melvin A. Breuer
2001 Misc conf
Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-out.
VTS
Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
2000 Misc conf
A Framework to Minimize Test Escape and Yield Loss during IDDQ Testing: A Case Study.
VTS
Hugo Cheung, Sandeep K. Gupta
2000 — conf
A new framework for static timing analysis, incremental timing refinement, and timing simulation.
Asian Test Symposium
Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer
2000 J jnl
BIST TPG for Combinational Cluster Interconnect Testing at Board Level.
J. Electron. Test.
Chen-Huan Chiang, Sandeep K. Gupta
2000 — conf
BIST TPG for SRAM cluster interconnect testing at board level.
Asian Test Symposium
Chen-Huan Chiang, Sandeep K. Gupta
2000 Misc conf
New Validation and Test Problems for High Performance Deep Submicron VLSI Circuits.
VLSI Design
Melvin A. Breuer, Sandeep K. Gupta
2000 J jnl
Novel Test Pattern Generators for Pseudoexhaustive Testing.
IEEE Trans. Computers
Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer
2000 — conf
Test generation for crosstalk-induced faults: framework and computational result.
Asian Test Symposium
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
2000 A conf
Test generation for path-delay faults in one-dimensional iterative logic arrays.
ITC
Nabil M. Abdulrazzaq, Sandeep K. Gupta
1999 A conf
LT-RTPG: a new test-per-scan BIST TPG for low heat dissipation.
ITC
Seongmoon Wang, Sandeep K. Gupta
1999 A conf
Switch-level delay test.
ITC
Suriyaprakash Natarajan, Sandeep K. Gupta, Melvin A. Breuer
1999 Misc conf
Test Generation for Ground Bounce in Internal Logic Circuitry.
VTS
Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
1999 A conf
Test generation for crosstalk-induced delay in integrated circuits.
ITC
Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer
1999 A conf
Validation and test generation for oscillatory noise in VLSI interconnects.
ICCAD
Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer
1998 Misc conf
A Methodology for Transforming Memory Tests for In-System Testing of Direct Mapped Cache Tags.
VTS
Sultan M. Al-Harbi, Sandeep K. Gupta
1998 A conf
A new path-oriented effect-cause methodology to diagnose delay failures.
ITC
Yuan-Chieh Hsu, Sandeep K. Gupta
1998 J jnl
ATPG for Heat Dissipation Minimization During Test Application.
IEEE Trans. Computers
Seongmoon Wang, Sandeep K. Gupta
1998 J jnl
Allocation Techniques for Reducing BIST Area Overhead of Data Paths.
J. Electron. Test.
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
1998 — conf
An Automatic Test Pattern Generator for At-Speed Robust Path Delay Testing.
Asian Test Symposium
Yuan-Chieh Hsu, Sandeep K. Gupta
1998 — conf
BIST TPG for Combinational Cluster (Glue Logic) Interconnect Testing at Board Level.
Asian Test Symposium
Chen-Huan Chiang, Sandeep K. Gupta
1998 J jnl
Bounds on pseudoexhaustive test lengths.
IEEE Trans. Very Large Scale Integr. Syst.
Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer
1998 J jnl
Estimation of BIST Resources During High-Level Synthesis.
J. Electron. Test.
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
1998 A* conf
Introducing Redundant Computations in a Behavior for Reducing BIST Resources.
DAC
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
1998 — conf
Process Variations and their Impact on Circuit Operation.
DFT
Suriyaprakash Natarajan, Melvin A. Breuer, Sandeep K. Gupta
1998 A conf
Scheduling and Module Assignment for Reducing Bist Resources.
DATE
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
1998 A conf
Test generation in VLSI circuits for crosstalk noise.
ITC
Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer
1997 A* conf
ATPG for Heat Dissipation Minimization During Scan Testing.
DAC
Seongmoon Wang, Sandeep K. Gupta
1997 Misc conf
Analysis of Ground Bounce in Deep Sub-Micron Circuits.
VTS
Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
1997 A conf
Analytic Models for Crosstalk Delay and Pulse Analysis Under Non-Ideal Inputs.
ITC
Weiyu Chen, Melvin A. Breuer, Sandeep K. Gupta
1997 A conf
BIST TPG for faults in system backplanes.
ICCAD
Chen-Huan Chiang, Sandeep K. Gupta
1997 Misc conf
BIST TPGs for Faults in Board Level Interconnect via Boundary Scan.
VTS
Chen-Huan Chiang, Sandeep K. Gupta
1997 A conf
DS-LFSR: A New BIST TPG for Low Heat Dissipation.
ITC
Seongmoon Wang, Sandeep K. Gupta
1997 Misc conf
High Quality Robust Tests for Path Delay Faults.
VTS
Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer
1996 A* conf
A Satisfiability-Based Test Generator for Path Delay Faults in Combinational Circuts.
DAC
Chih-Ang Chen, Sandeep K. Gupta
1996 J jnl
A Simulator for At-Speed Robust Testing of Path Delay Faults in Combinational Circuits.
IEEE Trans. Computers
Yuan-Chieh Hsu, Sandeep K. Gupta
1996 J jnl
BIST Test Pattern Generators for Two-Pattern Testing-Theory and Design Algorithms.
IEEE Trans. Computers
Chih-Ang Chen, Sandeep K. Gupta
1996 Misc conf
Delay Fault Testing: How Robust are Our Models?
VTS
Sandeep K. Gupta, Slawomir Pilarski, Sudhakar M. Reddy, Jacob Savir, Prab Varma
1996 A* conf
Lower Bounds on Test Resources for Scheduled Data Flow Graphs.
DAC
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
1996 A conf
Process-Aggravated Noise (PAN): New Validation and Test Problems.
ITC
Melvin A. Breuer, Sandeep K. Gupta
1996 J jnl
Utilization of On-Line (Concurrent) Checkers During Built-In-Self-Test and Vice Versa.
IEEE Trans. Computers
Sandeep K. Gupta, Dhiraj K. Pradhan
1995 A* conf
Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead.
DAC
Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer
1995 J jnl
Test embedding with discrete logarithms.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mody Lempel, Sandeep K. Gupta, Melvin A. Breuer
1994 — conf
A Low Cost BIST Methodology and Associated Novel Test Pattern Generator.
EDAC-ETC-EUROASIC
Sen-Pin Lin, Sandeep K. Gupta, Melvin A. Breuer
1994 A conf
ATPG for Heat Dissipation Minimization During Test Application.
ITC
Seongmoon Wang, Sandeep K. Gupta
1994 — conf
BIST Test Pattern Generators for Stuck-Open and Delay Testing.
EDAC-ETC-EUROASIC
Chih-Ang Chen, Sandeep K. Gupta
1994 A* conf
Clock Grouping: A Low Cost DFT Methodology for Delay Testing.
DAC
Wen-Chang Fang, Sandeep K. Gupta
1994 A conf
Random pattern testable logic synthesis.
ICCAD
Chen-Huan Chiang, Sandeep K. Gupta
1994 Misc conf
Test embedding with discrete logarithms.
VTS
Mody Lempel, Sandeep K. Gupta, Melvin A. Breuer
1994 Misc conf
Weighted random robust path delay testing of synthesized multilevel circuits.
VTS
Weili Wang, Sandeep K. Gupta
1993 A* conf
An Efficient Partitioning Strategy for Pseudo-Exhaustive Testing.
DAC
Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer
1993 A conf
Novel Test Pattern Generators for Pseudo-Exhaustive Testing.
ITC
Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer
1992 A conf
Can Concurrent Checkers Help BIST?
ITC
Sandeep K. Gupta, Dhiraj K. Pradhan
1992 Misc conf
Recent advances in BIST.
VTS
Sandeep K. Gupta
1991 J jnl
A New Framework for Designing and Analyzing BIST Techniques and Zero Aliasing Compression.
IEEE Trans. Computers
Dhiraj K. Pradhan, Sandeep K. Gupta
1991 A conf
Aliasing and Diagnosis Probability in MISR and STUMPS Using a General Error Model.
ITC
Mark G. Karpovsky, Sandeep K. Gupta, Dhiraj K. Pradhan
1990 J jnl
Aliasing Probability for Multiple Input Signature Analyzer.
IEEE Trans. Computers
Dhiraj K. Pradhan, Sandeep K. Gupta, Mark G. Karpovsky
1990 — conf
Zero aliasing compression.
FTCS
Sandeep K. Gupta, Dhiraj K. Pradhan, Sudhakar M. Reddy
1988 A conf
A New Framework for Designing and Analyzing BIST Techniques: Computation of Exact Aliasing Probability.
ITC
Sandeep K. Gupta, Dhiraj K. Pradhan
1988 A conf
Concurrent Control of Multiple BIT Structures.
ITC
Sandeep K. Gupta, Melvin A. Breuer, Jung-Cheun Lien