Samira Mirbagher Ajorpaz

17 papers A* 6C 2Journal 8Unranked 1
YearRankTypeTitle / Venue / Authors
2026 — conf
CacheMind: From Miss Rates to Why - Natural-Language, Trace-Grounded Reasoning for Cache Replacement.
ASPLOS (2)
Kaushal Mhapsekar, Azam Ghanbari, Bita Aslrousta, Samira Mirbagher Ajorpaz
2026 J jnl
CacheMind: From Miss Rates to Why - Natural-Language, Trace-Grounded Reasoning for Cache Replacement.
CoRR
Kaushal Mhapsekar, Azam Ghanbari, Bita Aslrousta, Samira Mirbagher Ajorpaz
2026 J jnl
FeatureBleed: Inferring Private Enriched Attributes From Sparsity-Optimized AI Accelerators.
IEEE Comput. Archit. Lett.
Darsh Asher, Farshad Dizani, Joshua Kalyanapu, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2026 J jnl
FeatureBleed: Inferring Private Enriched Attributes From Sparsity-Optimized AI Accelerators.
CoRR
Darsh Asher, Farshad Dizani, Joshua Kalyanapu, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2025 J jnl
Exploiting Intel AMX Power Gating.
IEEE Comput. Archit. Lett.
Joshua Kalyanapu, Farshad Dizani, Azam Ghanbari, Darsh Asher, Samira Mirbagher Ajorpaz
2025 J jnl
GATEBLEED: Exploiting On-Core Accelerator Power Gating for High Performance & Stealthy Attacks on AI.
CoRR
Joshua Kalyanapu, Farshad Dizani, Darsh Asher, Azam Ghanbari, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2025 A* conf
GateBleed: Exploiting On-Core Accelerator Power Gating for High Performance and Stealthy Attacks on AI.
MICRO
Joshua Kalyanapu, Farshad Dizani, Darsh Asher, Azam Ghanbari, Rosario Cammarota, Aydin Aysu, Samira Mirbagher Ajorpaz
2025 J jnl
THOR: A Non-Speculative Value Dependent Timing Side Channel Attack Exploiting Intel AMX.
CoRR
Farshad Dizani, Azam Ghanbari, Joshua Kalyanapu, Darsh Asher, Samira Mirbagher Ajorpaz
2025 J jnl
Thor: A Non-Speculative Value Dependent Timing Side Channel Attack Exploiting Intel AMX.
IEEE Comput. Archit. Lett.
Farshad Dizani, Azam Ghanbari, Joshua Kalyanapu, Darsh Asher, Samira Mirbagher Ajorpaz
2023 J jnl
An Attack on The Speculative Vectorization: Leakage from Higher Dimensional Speculation.
CoRR
Sayinath Karuppanan, Samira Mirbagher Ajorpaz
2022 C conf
Composite Instruction Prefetching.
ICCD
Gino Chacon, Elba Garza, Alexandra Jimborean, Alberto Ros, Paul V. Gratz, Daniel A. Jiménez, Samira Mirbagher Ajorpaz
2022 C conf
Dynamic Set Stealing to Improve Cache Performance.
SBAC-PAD
Brady Testa, Samira Mirbagher Ajorpaz, Daniel A. Jiménez
2022 A* conf
EVAX: Towards a Practical, Pro-active & Adaptive Architecture for High Performance & Security.
MICRO
Samira Mirbagher Ajorpaz, Daniel Moghimi, Jeffrey Neal Collins, Gilles Pokam, Nael B. Abu-Ghazaleh, Dean M. Tullsen
2020 A* conf
CHiRP: Control-Flow History Reuse Prediction.
MICRO
Samira Mirbagher Ajorpaz, Elba Garza, Gilles Pokam, Daniel A. Jiménez
2020 A* conf
PerSpectron: Detecting Invariant Footprints of Microarchitectural Attacks with Perceptron.
MICRO
Samira Mirbagher Ajorpaz, Gilles Pokam, Esmaeil Mohammadian Koruyeh, Elba Garza, Nael B. Abu-Ghazaleh, Daniel A. Jiménez
2019 A* conf
Bit-level perceptron prediction for indirect branches.
ISCA
Elba Garza, Samira Mirbagher Ajorpaz, Tahsin Ahmad Khan, Daniel A. Jiménez
2018 A* conf
Exploring Predictive Replacement Policies for Instruction Cache and Branch Target Buffer.
ISCA
Samira Mirbagher Ajorpaz, Elba Garza, Sangam Jindal, Daniel A. Jiménez