Saman Adham - RankMe

22 papers A 6C 1Misc 1Journal 4Unranked 10

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A 3 nm FinFET 125 TOPS/W-29 TFLOPS/W, 90 TOPS/mm IEEE J. Solid State Circuits Haruki Mori, Je-Min Hung, Wei-Chang Zhao, Kinshuk Khare, Brian Crafton, Hiroaki Ishii, Cheng-En Lee, Xiaochen Peng, Xiaoyu Sun, Yorinobu Fujino, Chia-Jung Tsen, Vineet Joshi, Chao-Kai Chuang, Takeshi Hashizume, Chia-Fu Lee, Tan-Li Chou, Kerem Akarvardar, Saman Adham, Yih Wang, Hidehiro Fujiwara, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang
2024	—	`conf`	15.9 A 16nm 16Mb Embedded STT-MRAM with a 20ns Write Time, a 10 ISSCC Ku-Feng Lin, Hiroki Noguchi, Yi-Chun Shih, Perng-Fei Yuh, Yuan-Jen Lee, Tung-Cheng Chang, Sheng-Po Huang, Yu-Fan Lin, Chun-Ying Lee, Yen-Hsiang Huang, Jui-Che Tsai, Saman Adham, Peter Noel, Ramin Yazdi, Marat Gershoig, YangJae Shin, Vineet Joshi, Ted Wong, Meng-Ru Jiang, J. J. Wu, Chun-Tai Cheng, Yu-Jen Wang, Harry Chuang, Yu-Der Chih, Yih Wang, Tsung-Yung Jonathan Chang
2024	—	`conf`	34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm ISSCC Hidehiro Fujiwara, Haruki Mori, Wei-Chang Zhao, Kinshuk Khare, Cheng-En Lee, Xiaochen Peng, Vineet Joshi, Chao-Kai Chuang, Shu-Huan Hsu, Takeshi Hashizume, Toshiaki Naganuma, Chen-Hung Tien, Yao-Yi Liu, Yen-Chien Lai, Chia-Fu Lee, Tan-Li Chou, Kerem Akarvardar, Saman Adham, Yih Wang, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang
2022	—	`conf`	A 5-nm 254-TOPS/W 221-TOPS/mm ISSCC Hidehiro Fujiwara, Haruki Mori, Wei-Chang Zhao, Mei-Chen Chuang, Rawan Naous, Chao-Kai Chuang, Takeshi Hashizume, Dar Sun, Chia-Fu Lee, Kerem Akarvardar, Saman Adham, Tan-Li Chou, Mahmut Ersin Sinangil, Yih Wang, Yu-Der Chih, Yen-Huei Chen, Hung-Jen Liao, Tsung-Yung Jonathan Chang
2019	—	`conf`	A Reliable, Low-Cost, Low-Energy Physically Unclonable Function Circuit Through Effective Filtering. VLSI-DAT Shih-Lien Lu, Cheng-En Lee, Peter Noel, Saman Adham, Ted Wong, Jonathan Chang
2014	J	`jnl`	A 1 Tbit/s Bandwidth 1024 b PLL/DLL-Less eDRAM PHY Using 0.3 V 0.105 mW/Gbps Low-Swing IO for CoWoS Application. IEEE J. Solid State Circuits Mu-Shan Lin, Chien-Chun Tsai, Chih-Hsien Chang, Wen-Hung Huang, Ying-Yu Hsu, Shu-Chun Yang, Chin-Ming Fu, Mao-Hsuan Chou, Tien-Chien Huang, Ching-Fang Chen, Tze-Chiang Huang, Saman Adham, Min-Jer Wang, William Wu Shen, Ashok Mehta
2014	—	`conf`	A novel DFT architecture for 3DIC test, diagnosis and repair. VLSI-DAT Mincent Lee, Saman Adham, Min-Jer Wang, Ching-Nen Peng, Hung-Chih Lin, Sen-Kuei Hsu, Hao Chen
2014	—	`conf`	Design-for-diagnosis: Your safety net in catching design errors in known good dies in CoWoS VLSI-DAT Sandeep Kumar Goel, Min-Jer Wang, Saman Adham, Ashok Mehta, Frank Lee
2014	A	`conf`	The importance of DFX, a foundry perspective. ITC Saman Adham, Jonathan Chang, Hung-Jen Liao, John Hung, Ting-Hua Hsieh
2013	A	`conf`	Test and debug strategy for TSMC CoWoS™ stacking process based heterogeneous 3D IC: A silicon case study. ITC Sandeep Kumar Goel, Saman Adham, Min-Jer Wang, Ji-Jan Chen, Tze-Chiang Huang, Ashok Mehta, Frank Lee, Vivek Chickermane, Brion L. Keller, Thomas Valind, Subhasish Mukherjee, Navdeep Sood, Jeongho Cho, Hayden Hyungdong Lee, Jungi Choi, Sangdoo Kim
2009	J	`jnl`	Improved Core Isolation and Access for Hierarchical Embedded Test. IEEE Des. Test Comput. Benoit Nadeau-Dostie, Saman Adham, Russell Abbott
2004	—	`conf`	A BIST Algorithm for Bit/Group Write Enable Faults in SRAMs. MTDT Saman Adham, Benoit Nadeau-Dostie
2000	—	`conf`	Comparing defect coverage for current-mode logic and CMOS VLSI cells. ICECS Côme Rozon, Dhamin Al-Khalili, Saman Adham, Douglas Racz
2000	C	`conf`	Comprehensive defect analysis and testability of current-mode logic circuits. ISCAS Saman Adham, Dhamin Al-Khalili, Côme Rozon, Douglas Racz
1999	A	`conf`	Design For Testability Method for CML Digital Circuits. DATE Bernard Antaki, Yvon Savaria, Nanhan Xiong, Saman Adham
1999	J	`jnl`	Scan-based BIST fault diagnosis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yuejian Wu, Saman Adham
1998	—	`conf`	Comprehensive Defect Analysis and Defect Coverage of CMOS Circuits. DFT Dhamin Al-Khalili, Saman Adham, Côme Rozon, Moazzem Hossain, Douglas Racz
1998	Misc	`conf`	Test Reuse at System Level. VTS José M. Miranda, Scott Davidson, Peter Dziel, Saman Adham, Steve Millman
1996	A	`conf`	BIST Fault Diagnosis in Scan-Based VLSI Environments. ITC Yuejian Wu, Saman Adham
1996	—	`conf`	DP-BIST: A Built-In Self Test For DSP DataPaths A Low Overhead and High Fault Coverage Technique. Asian Test Symposium Saman Adham, Sanjay Gupta
1995	A	`conf`	A New Hardware Fault Insertion Scheme for System Diagnostics Verification. ITC Benoit Nadeau-Dostie, Harry Hulvershorn, Saman Adham
1995	A	`conf`	Linking Diagnostic Software to Hardware Self Test in Telecom Systems. ITC Harry Hulvershorn, Paul Soong, Saman Adham