Salim Ullah - RankMe

51 papers A* 2A 3B 1C 2Misc 6Journal 23Unranked 12

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	BiKA: Kolmogorov-Arnold-Network-inspired Ultra Lightweight Neural Network Hardware Accelerator. CoRR Yuhao Liu, Salim Ullah, Akash Kumar
2026	J	`jnl`	Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-precision Quantized Multiplication on Hardware Accelerators. CoRR Yuhao Liu, Salim Ullah, Akash Kumar
2026	J	`jnl`	GRAU: Generic Reconfigurable Activation Unit Design for Neural Network Hardware Accelerators. CoRR Yuhao Liu, Salim Ullah, Akash Kumar
2025	J	`jnl`	A bit-level loosely coupled computing-in-memory macro with early termination. Microelectron. J. Junchuan Gu, Yang Chen, Wenwei Wang, Akash Kumar, Salim Ullah, Kejie Huang, Haibin Shen
2025	—	`conf`	Approximate Arithmetic Circuits Enabling Energy-Efficient Edge Computing. MOCAST Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2025	J	`jnl`	AxOSyn: An Open-source Framework for Synthesizing Novel Approximate Arithmetic Operators. CoRR Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
2025	Misc	`conf`	BiKA: Binarized KAN-inspired Neural Network for Efficient Hardware Accelerator Designs. FCCM Yuhao Liu, Salim Ullah, Akash Kumar
2025	—	`conf`	Bitwise Systolic Array Architecture for Runtime-Reconfigurable Multi-Precision Quantized Multiplication on Hardware Accelerators. ISQED Yuhao Liu, Salim Ullah, Akash Kumar
2025	Misc	`conf`	Design, Model, and Explore Approximate Arithmetic Operators with AI/ML: A Tutorial. CASES Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2025	J	`jnl`	EMGAxO: Extending Machine Learning Hardware Generators With Approximate Operators. IEEE Embed. Syst. Lett. Ali Asghar, Shahzad Bangash, Suleman Shah, Laiq Hasan, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2025	A	`conf`	Invited Paper: Circuit and Architecture Design with Emerging Computing Paradigms. ICCAD Salim Ullah, Siva Satyendra Sahoo, Can Li, Chao Li, Liu Liu, Tomas Sousa Pereira, Bo Wen, Xunzhao Yin, Armin Darjani, Nima Kavand, Chakravarthy Bodla, Rupa Yashaswi Panduga, Aniruddh Holemadlu, Johannes Maly, Jonathan Förste, Samarth Vadia, Xiaobo Sharon Hu, Akash Kumar
2025	J	`jnl`	MdCSR: A Memory-Efficient Sparse Matrix Compression Format. IEEE Embed. Syst. Lett. Noble G, Nalesh S, S. Kala, Salim Ullah, Akash Kumar
2025	—	`conf`	Retrospective: A CORDIC Based Configurable Activation Function for NN Applications. ISVLSI Omkar Kokane, Gopal Raut, Salim Ullah, Mukul Lokhande, Adam Teman, Akash Kumar, Santosh Kumar Vishvakarma
2025	J	`jnl`	Retrospective: A CORDIC Based Configurable Activation Function for NN Applications. CoRR Omkar Kokane, Gopal Raut, Salim Ullah, Mukul Lokhande, Adam Teman, Akash Kumar, Santosh Kumar Vishvakarma
2025	Misc	`conf`	Special Sessions - Emerging Scope and Design Challenges for Approximate Computing: Optimizing Accuracy-PPA trade-offs and Beyond. CASES Siva Satyendra Sahoo, Bastien Deveautour, Marcello Traiola, Chongyan Gu, Yun Wu, Aditya Japa, Salim Ullah, Akash Kumar
2024	J	`jnl`	AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling. IEEE Trans. Circuits Syst. I Regul. Pap. Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
2024	J	`jnl`	AxOSpike: Spiking Neural Networks-Driven Approximate Operator Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2024	Misc	`conf`	BitSys: Bitwise Systolic Array Architecture for Multi-precision Quantized Hardware Accelerators. FCCM Yuhao Liu, Salim Ullah, Akash Kumar
2024	—	`ch.`	Designing Resource-Efficient Hardware Arithmetic for FPGA-Based Accelerators Leveraging Approximations and Mixed Quantizations. Embedded Machine Learning for Cyber-Physical, IoT, and Edge Computing: Hardware Architectures Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2024	Misc	`conf`	Enabling Energy-efficient AI Computing: Leveraging Application-specific Approximations : (Education Class). CASES Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2024	C	`conf`	LeQC-At: Learning Quantization Configurations During Adversarial Training for Robust Deep Neural Networks. DSD Siddharth Gupta, Salim Ullah, Akash Kumar
2024	J	`jnl`	MONO: Enhancing Bit-Flip Resilience With Bit Homogeneity for Neural Networks. IEEE Embed. Syst. Lett. Maryam Eslami, Yuhao Liu, Salim Ullah, Mostafa E. Salehi, Reshad Hosseini, Seyed Ahmad Mirsalari, Akash Kumar
2023	J	`jnl`	AxOCS: Scaling FPGA-based Approximate Operators using Configuration Supersampling. CoRR Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
2023	J	`jnl`	AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. CoRR Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
2023	—	`conf`	CoOAx: Correlation-aware Synthesis of FPGA-based Approximate Operators. ACM Great Lakes Symposium on VLSI Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2023	J	`jnl`	High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers. IEEE Embed. Syst. Lett. Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
2023	—	`conf`	NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs. IPDPS Workshops Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
2023	J	`jnl`	NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories. IEEE Embed. Syst. Lett. Yuankang Zhao, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2023	—	`conf`	SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks. ASP-DAC Rohit Ranjan, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2022	—	`—`	Design, Analysis, and Applications of Approximate Arithmetic Modules. Salim Ullah
2022	B	`conf`	ERMES: Efficient Racetrack Memory Emulation System based on FPGA. FPL Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar
2022	J	`jnl`	High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Salim Ullah, Semeen Rehman, Muhammad Shafique, Akash Kumar
2022	—	`conf`	Multi-Precision Deep Neural Network Acceleration on FPGAs. ASP-DAC Negar Neda, Salim Ullah, Azam Ghanbari, Hoda Mahdiani, Mehdi Modarressi, Akash Kumar
2022	—	`conf`	NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture. FPT Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
2022	C	`conf`	PosAx-O: Exploring Operator-level Approximations for Posit Arithmetic in Embedded AI/ML. DSD Amritha Immaneni, Salim Ullah, Suresh Nambi, Siva Satyendra Sahoo, Akash Kumar
2021	J	`jnl`	Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures. IEEE Trans. Computers Salim Ullah, Hendrik Schmidl, Siva Satyendra Sahoo, Semeen Rehman, Akash Kumar
2021	A*	`conf`	CLAppED: A Design Framework for Implementing Cross-Layer Approximation in FPGA-based Embedded Systems. DAC Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2021	J	`jnl`	Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators. IEEE Embed. Syst. Lett. Salim Ullah, Tuan Duy Anh Nguyen, Akash Kumar
2021	J	`jnl`	ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems. IEEE Access Suresh Nambi, Salim Ullah, Siva Satyendra Sahoo, Aditya Lohana, Farhad Merchant, Akash Kumar
2021	J	`jnl`	ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Akhil Raj Baranwal, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
2020	J	`jnl`	ALigN: A Highly Accurate Adaptive Layerwise Log_2_Lead Quantization of Pre-Trained Neural Networks. IEEE Access Siddharth Gupta, Salim Ullah, Kapil Ahuja, Aruna Tiwari, Akash Kumar
2020	—	`conf`	An Approximate Binary Classifier for Data Integrity Assessment in IoT Sensors. ICECS Arlene John, Salim Ullah, Akash Kumar, Barry Cardiff, Deepu John
2020	J	`jnl`	ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-based Systems. CoRR Suresh Nambi, Salim Ullah, Aditya Lohana, Siva Satyendra Sahoo, Farhad Merchant, Akash Kumar
2020	A	`conf`	L2L: A Highly Accurate Log_2_Lead Quantization of Pre-trained Neural Networks. DATE Salim Ullah, Siddharth Gupta, Kapil Ahuja, Aruna Tiwari, Akash Kumar
2020	—	`conf`	LeAp: Leading-one Detection-based Softcore Approximate Multipliers with Tunable Accuracy. ASP-DAC Zahra Ebrahimi, Salim Ullah, Akash Kumar
2020	—	`conf`	SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy. ACM Great Lakes Symposium on VLSI Zahra Ebrahimi, Salim Ullah, Akash Kumar
2020	J	`jnl`	SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy. CoRR Zahra Ebrahimi, Salim Ullah, Akash Kumar
2019	Misc	`conf`	A Comparative Analysis of Neural Networks and Enhancement of ELM for Short Term Load Forecasting. CISIS Rahim Ullah, Nadeem Javaid, Ghulam Hafeez, Salim Ullah, Fahad Ahmad, Ashraf Ullah
2019	—	`conf`	Design Methodology for Embedded Approximate Artificial Neural Networks. ACM Great Lakes Symposium on VLSI Adarsha Balaji, Salim Ullah, Anup Das, Akash Kumar
2018	A*	`conf`	Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators. DAC Salim Ullah, Semeen Rehman, Bharath Srinivas Prabakaran, Florian Kriebel, Muhammad Abdullah Hanif, Muhammad Shafique, Akash Kumar
2018	A	`conf`	DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems. DATE Bharath Srinivas Prabakaran, Semeen Rehman, Muhammad Abdullah Hanif, Salim Ullah, Ghazal Mazaheri, Akash Kumar, Muhammad Shafique