Salil Raje

18 papers A* 2A 5C 1Journal 5Unranked 5
YearRankTypeTitle / Venue / Authors
2004 — conf
Innovate or perish: FPGA physical design.
ISPD
Taraneh Taghavi, Soheil Ghiasi, Abhishek Ranjan, Salil Raje, Majid Sarrafzadeh
2004 A* conf
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources.
DAC
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, George Karypis
2004 A conf
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources.
FPGA
Navaratnasothie Selvakkumaran, Abhishek Ranjan, Salil Raje, George Karypis
2004 A conf
What is the right model for programming and using modern FPGAs?
FPGA
André DeHon, Brad L. Hutchings, Daryl Rudusky, James Hwang, Nikhil, Salil Raje, Adrian Stoica
2003 A conf
Multi-Million Gate FPGA Physical Design Challenges.
ICCAD
Maogang Wang, Abhishek Ranjan, Salil Raje
2002 J jnl
An analysis of the wire-load model uncertainty problem.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Padmini Gopalakrishnan, Altan Odabasioglu, Lawrence T. Pileggi, Salil Raje
2001 — conf
Overcoming wireload model uncertainty during physical design.
ISPD
Padmini Gopalakrishnan, Altan Odabasioglu, Lawrence T. Pileggi, Salil Raje
1999 — conf
Scheduling with multiple voltages under resource constraints.
ISCAS (1)
Majid Sarrafzadeh, Salil Raje
1998 J jnl
Fast Approximation Algorithms on Maxcut, k-Coloring, and k-Color Ordering vor VLSI Applications.
IEEE Trans. Computers
Jun Dong Cho, Salil Raje, Majid Sarrafzadeh
1997 J jnl
Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system.
IEEE Trans. Very Large Scale Integr. Syst.
Reinaldo A. Bergamaschi, Salil Raje, Indira Nair, Louise Trevillyan
1997 A conf
Generalized resource sharing.
ICCAD
Salil Raje, Reinaldo A. Bergamaschi
1997 J jnl
Observable Time Windows: Verifying High-Level Synthesis Results.
IEEE Des. Test Comput.
Reinaldo A. Bergamaschi, Salil Raje
1997 J jnl
Scheduling with multiple voltages.
Integr.
Salil Raje, Majid Sarrafzadeh
1996 — conf
Observable Time Windows: Verifying the Results of High-Level Synthesis.
ED&TC
Reinaldo A. Bergamaschi, Salil Raje
1995 A* conf
Constrained Register Allocation in Bus Architectures.
DAC
Elof Frank, Salil Raje, Majid Sarrafzadeh
1995 — conf
Variable voltage scheduling.
ISLPD
Salil Raje, Majid Sarrafzadeh
1994 A conf
Approximation Algorithm on Multi-Way Maxcut Partitioning.
ESA
Jun Dong Cho, Salil Raje, Majid Sarrafzadeh
1993 C conf
GEM: A Geometric Algorithm for Scheduling.
ISCAS
Salil Raje, Majid Sarrafzadeh