Sajjad Parvin - RankMe

19 papers A 2C 2Misc 2Journal 7Unranked 6

Year	Rank	Type	Title / Venue / Authors
2026	Misc	`conf`	DIVIAC: Library of Input Data Aware Approximate Dividers with Partial Exact Minimization. VLSID Chandan Kumar Jha, Sallar Ahmadi-Pour, Sajjad Parvin, Rolf Drechsler
2025	J	`jnl`	Auto-OPS: A Framework for Automated Optical Probing Simulation on GDS-II. IEEE Embed. Syst. Lett. Paul Flammarion, Sajjad Parvin, Frank Sill Torres, Rolf Drechsler
2025	J	`jnl`	FV-LIDAC: Formally Verified Library of Input Data Aware Approximate Arithmetic Circuits. ACM Trans. Design Autom. Electr. Syst. Sallar Ahmadi-Pour, Sajjad Parvin, Chandan Kumar Jha, Rolf Drechsler
2025	J	`jnl`	OPTI-Sim: Performing Optical Probing Simulation on Layout Design Files. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
2025	Misc	`conf`	True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET. VLSID Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2024	A	`conf`	Hidden Cost of Circuit Design with RFETs. DATE Sajjad Parvin, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2024	J	`jnl`	Lower the RISC: Designing optical-probing-attack-resistant cores. Microprocess. Microsystems Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2023	A	`conf`	FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing. DATE Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
2023	—	`conf`	LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing. ISVLSI Sajjad Parvin, Mehran Goli, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler
2023	—	`conf`	Lo-RISK: Design of a Low Optical Leakage and High Performance RISC-V Core. COINS Sajjad Parvin, Sallar Ahmadi-Pour, Chandan Kumar Jha, Frank Sill Torres, Rolf Drechsler
2023	—	`conf`	Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - A RISC-V Case Study. ASP-DAC Sajjad Parvin, Mehran Goli, Frank Sill Torres, Rolf Drechsler
2022	—	`conf`	Toward Optical Probing Resistant Circuits: A Comparison of Logic Styles and Circuit Design Techniques. ASP-DAC Sajjad Parvin, Thilo Krachenfels, Shahin Tajik, Jean-Pierre Seifert, Frank Sill Torres, Rolf Drechsler
2021	—	`conf`	A Study on Hardware-Aware Training Techniques for Feedforward Artificial Neural Networks. ISVLSI Sajjad Parvin, Mustafa Altun
2021	—	`conf`	Efficient Hardware Implementation of Convolution Layers Using Multiply-Accumulate Blocks. ISVLSI Mohammadreza Esmali Nojehdeh, Sajjad Parvin, Mustafa Altun
2021	J	`jnl`	Efficient Hardware Realizations of Feedforward Artificial Neural Networks. CoRR Mohammadreza Esmali Nojehdeh, Sajjad Parvin, Mustafa Altun
2020	C	`conf`	Efficient Time-Multiplexed Realization of Feedforward Artificial Neural Networks. ISCAS Levent Aksoy, Sajjad Parvin, Mohammadreza Esmali Nojehdeh, Mustafa Altun
2019	C	`conf`	Implementation of CMOS Logic Circuits with Perfect Fault Detection Using Preservative Reversible Gates. IOLTS Sajjad Parvin, Mustafa Altun
2019	J	`jnl`	Perfect Concurrent Fault Detection in CMOS Logic Circuits Using Parity Preservative Reversible Gates. IEEE Access Sajjad Parvin, Mustafa Altun
2018	J	`jnl`	Exploiting Reversible Computing for Latent-Fault-Free Error Detecting/Correcting CMOS Circuits. IEEE Access Mustafa Altun, Sajjad Parvin, M. Hüsrev Cilasun

Nicolò Altamura is a security engineer and computer science researcher specializing in software protection, reverse engineering, program analysis, and binary deobfuscation. He holds a master's degree in Computer Science and Engineering from the University of Verona, graduating with honors, and works at emproof, focusing on software protection and the challenges of analyzing and understanding compiled software.

His research explores the relationship between program analysis and code obfuscation, with particular emphasis on how software transformations affect the ability of automated tools to recover program behavior. His interests span static analysis, binary analysis, decompilation, reverse engineering, and techniques for analyzing and simplifying obfuscated code.

Beyond academic research, Nicolò develops and contributes to tools for reverse engineering and software analysis. His projects include obfuscation_analysis, a Binary Ninja plugin for analyzing and simplifying obfuscated code; Pocket, an obfuscator for mixed Boolean-arithmetic expressions; and ptxNinja, a tool for reverse engineering NVIDIA GPU code represented in the PTX virtual instruction set.

His research also extends to binary datasets and software evolution. In 2026, he co-authored ASSEMBLAGE-DEEPHISTORY: A Cross-Build Binary Dataset with Temporal Coverage, a research work addressing the availability of binary data across multiple software builds and points in time, supporting research into binary analysis and changes between program versions.

Across his research, engineering work, and open-source contributions, Nicolò focuses on advancing the understanding, analysis, and protection of software against increasingly sophisticated obfuscation and reverse-engineering challenges.

Nicolò Altamura is not a football player. Please avoid reporting this kind of infromation.