Sai Pentapati

15 papers A 3Journal 8Unranked 4
YearRankTypeTitle / Venue / Authors
2024 J jnl
Heterogeneous Monolithic 3-D IC Designs: Challenges, EDA Solutions, and Power, Performance, Cost Tradeoffs.
IEEE Trans. Very Large Scale Integr. Syst.
Sai Pentapati, Sung Kyu Lim
2024 J jnl
On Legalization of Die Bonding Bumps and Pads for 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yen-Hsiang Huang, Sai Pentapati, Anthony Agnesina, Moritz Brunion, Sung Kyu Lim
2024 J jnl
Pin-3D: Effective Physical Design Methodology for Multidie Co-Optimization in Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sai Pentapati, Kyungwook Chang, Sung Kyu Lim
2023 J jnl
ECO-GNN: Signoff Power Prediction Using Graph Neural Networks with Subgraph Approximation.
ACM Trans. Design Autom. Electr. Syst.
Yi-Chen Lu, Siddhartha Nath, Sai Pentapati, Sung Kyu Lim
2023 — conf
On Legalization of Die Bonding Bumps and Pads for 3D ICs.
ISPD
Sai Pentapati, Anthony Agnesina, Moritz Brunion, Yen-Hsiang Huang, Sung Kyu Lim
2023 J jnl
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Yun Heo, Jae-Seung Choi, Sung Kyu Lim
2022 J jnl
A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim
2022 J jnl
Metal Layer Sharing: A Routing Optimization Technique for Monolithic 3D ICs.
IEEE Trans. Very Large Scale Integr. Syst.
Sai Pentapati, Sung Kyu Lim
2022 — conf
Routing Layer Sharing: A New Opportunity for Routing Optimization in Monolithic 3D ICs.
ISPD
Sai Pentapati, Sung Kyu Lim
2021 — conf
Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs.
ISPD
Pruek Vanna-Iampikul, Chengjia Shao, Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
2021 — conf
The Law of Attraction: Affinity-Aware Placement Optimization using Graph Neural Networks.
ISPD
Yi-Chen Lu, Sai Pentapati, Sung Kyu Lim
2020 A conf
Macro-3D: A Physical Design Methodology for Face-to-Face-Stacked Heterogeneous 3D ICs.
DATE
Lennart Bamberg, Alberto García Ortiz, Lingjun Zhu, Sai Pentapati, Da Eun Shim, Sung Kyu Lim
2019 J jnl
A Logic-on-Memory Processor-System Design With Monolithic 3-D Technology.
IEEE Micro
Sai Pentapati, Lingjun Zhu, Lennart Bamberg, Da Eun Shim, Alberto García Ortiz, Sung Kyu Lim
2019 A conf
Tier Partitioning and Flip-flop Relocation Methods for Clock Trees in Monolithic 3D ICs.
ISLPED
Da Eun Shim, Sai Pentapati, Jeehyun Lee, Yun Seop Yu, Sung Kyu Lim
2018 A conf
Road to High-Performance 3D ICs: Performance Optimization Methodologies for Monolithic 3D ICs.
ISLPED
Kyungwook Chang, Sai Pentapati, Da Eun Shim, Sung Kyu Lim