Saghir A. Shaikh

20 papers A 4B 1C 1Misc 7Journal 2Unranked 5
YearRankTypeTitle / Venue / Authors
2025 A conf
Chasing Front-End-Of-Line Defects with Cell-Aware Diagnostics in High-Volume Manufacturing.
ITC
Saghir A. Shaikh, Brandon Brea, Gaurav Devrani, Muhammad Waheed, Lay Hoon Loh, Prakash Palanisamy, Jim Lee, Giyoung Yang
2025 Misc conf
Innovation Practices Track: Frontiers in Diagnosis and Debug.
VTS
Suriyaprakash Natarajan, Saghir A. Shaikh, Wu-Tung Cheng, Sankaran Menon
2016 B conf
Practices in High-Speed IO testing.
ETS
Salem Abdennadher, Saghir A. Shaikh
2014 A conf
Fast BIST of I/O Pin AC specifications and inter-chip delays.
ITC
Stephen Sunter, Saghir A. Shaikh, Qing Lin
2013 Misc conf
Innovative practices session 3C: Harnessing the challenges of testability and debug of high speed I/Os.
VTS
Saghir A. Shaikh
2011 Misc conf
Test and characterization of high-speed circuits.
VTS
Saghir A. Shaikh
2007 J jnl
Practices in Mixed-Signal and RF IC Testing.
IEEE Des. Test Comput.
Salem Abdennadher, Saghir A. Shaikh
2005 — conf
Challenges in High Speed Interface Testing.
Asian Test Symposium
Salem Abdennadher, Saghir A. Shaikh
2005 — conf
Practices in Testing of Mixed-Signal and RF SoCs.
Asian Test Symposium
Salem Abdennadher, Saghir A. Shaikh
2004 A conf
IEEE Std 1149.6 Implementation for a XAUI-to-Serial 10-Gbps Transceiver.
ITC
Saghir A. Shaikh
2001 A conf
Test response compression and bitmap encoding for embedded memories in manufacturing process monitoring.
ITC
John T. Chen, Jitendra Khare, Ken Walker, Saghir A. Shaikh, Janusz Rajski, Wojciech Maly
2000 Misc conf
Manufacturability and Testability Oriented Synthesis.
VLSI Design
Saghir A. Shaikh, Jitendra Khare, Hans T. Heineken
2000 Misc conf
Maximizing Wafer Productivity Through Layout Optimization.
VLSI Design
Charles H. Ouyang, Hans T. Heineken, Jitendra Khare, Saghir A. Shaikh, Manuel d'Abreu
2000 Misc conf
Test and Debug of Networking SoCs: A Case Study.
VTS
A. Bommireddy, Jitendra Khare, Saghir A. Shaikh, S.-T. Su
2000 — conf
Wire planning for performance and yield enhancement.
CICC
Charles Ouyang, Kyungsuk Ryu, Hans T. Heineken, Jitu Khare, Saghir A. Shaikh, Manuel d'Abreu
1998 J jnl
Design of an experience-based assembly sequence planner for mechanical assemblies.
Robotica
Arun Swaminathan, Saghir A. Shaikh, K. Suzanne Barber
1997 — conf
Concurrent Fault and Design Error Simulation in Interactive Simulation Automation System.
Annual Simulation Symposium
Youngmin Hur, Saghir A. Shaikh, Silvian Goldenberg, Dominik Kacprzak, Stephen A. Szygenda
1997 — conf
Exploiting Component/Event-Level Parallelism in Concurrent Fault and Design Error Simulation.
Annual Simulation Symposium
Saghir A. Shaikh, Stephen A. Szygenda
1996 Misc conf
CON
PDPTA
Saghir A. Shaikh, Silvian Goldenberg, Stephen A. Szygenda
1995 C conf
Statistics on concurrent fault and design error simulation.
ICCD
Brian Grayson, Saghir A. Shaikh, Stephen A. Szygenda