Saeed Shamshiri

14 papers A 3Misc 3Journal 3Unranked 5
YearRankTypeTitle / Venue / Authors
2012 Misc conf
Comprehensive online defect diagnosis in on-chip networks.
VTS
Amirali Ghofrani, Ritesh Parikh, Saeed Shamshiri, Andrew DeOrio, Kwang-Ting Cheng, Valeria Bertacco
2012 — conf
Post-fabrication reconfiguration for power-optimized tuning of optically connected multi-core systems.
ASP-DAC
Yan Zheng, Peter Lisherness, Saeed Shamshiri, Amirali Ghofrani, Shiyuan Yang, Kwang-Ting Cheng
2011 A conf
End-to-end error correction and online diagnosis for on-chip networks.
ITC
Saeed Shamshiri, Amirali Ghofrani, Kwang-Ting Cheng
2011 J jnl
Modeling Yield, Cost, and Quality of a Spare-Enhanced Multicore Chip.
IEEE Trans. Computers
Saeed Shamshiri, Kwang-Ting (Tim) Cheng
2010 A conf
Error-locality-aware linear coding to correct multi-bit upsets in SRAMs.
ITC
Saeed Shamshiri, Kwang-Ting Cheng
2010 Misc conf
Modeling yield, cost, and quality of an NoC with uniformly and non-uniformly distributed redundancy.
VTS
Saeed Shamshiri, Kwang-Ting Cheng
2009 Misc conf
Yield and Cost Analysis of a Reliable NoC.
VTS
Saeed Shamshiri, Kwang-Ting Cheng
2008 A conf
A Cost Analysis Framework for Multi-core Systems with Spares.
ITC
Saeed Shamshiri, Peter Lisherness, Sung-Jui (Song-Ra) Pan, Kwang-Ting Cheng
2005 — conf
Binary Taylor diagrams: an efficient implementation of Taylor expansion diagrams.
ISCAS (1)
Arash Hooshmand, Saeed Shamshiri, Mohammad Alisafaee, Bijan Alizadeh, Pejman Lotfi-Kamran, Mostafa Naderi, Zainalabedin Navabi
2005 J jnl
Genetic-algorithm Memory Minimisation for Designing Reconfigurable Ip Address Lookup Engine.
Int. J. Comput. Intell. Appl.
Saeed Shamshiri, Seid Mehdi Fakhraie
2005 — conf
ISC: Reconfigurable Scan-Cell Architecture for Low Power Testing.
Asian Test Symposium
Hadi Esmaeilzadeh, Saeed Shamshiri, Pooya Saeedi, Zainalabedin Navabi
2005 J jnl
Instruction-level test methodology for CPU core self-testing.
ACM Trans. Design Autom. Electr. Syst.
Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin Navabi
2004 — conf
Instruction level test methodology for CPU core software-based self-testing.
HLDVT
Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin Navabi
2004 — conf
Test Instruction Set (TIS) for High Level Self-Testing of CPU Cores.
Asian Test Symposium
Saeed Shamshiri, Hadi Esmaeilzadeh, Zainalabedin Navabi