Saeed Seyedfaraji

11 papers A* 1A 1C 1Journal 8
YearRankTypeTitle / Venue / Authors
2024 J jnl
HOPE: Holistic STT-RAM Architecture Exploration Framework for Future Cross-Platform Analysis.
IEEE Access
Saeed Seyedfaraji, Markus Bichl, Asad Aftab, Semeen Rehman
2024 J jnl
HOPE: Holistic STT-RAM Architecture Exploration Framework for Future Cross-Platform Analysis.
CoRR
Saeed Seyedfaraji, Markus Bichl, Asad Aftab, Semeen Rehman
2024 J jnl
OPTIMA: Design-Space Exploration of Discharge-Based In-SRAM Computing: Quantifying Energy-Accuracy Trade-Offs.
CoRR
Saeed Seyedfaraji, Severin Jager, Salar Shakibhamedan, Asad Aftab, Semeen Rehman
2024 A* conf
OPTIMA: Design-Space Exploration of Discharge-Based In-SRAM Computing: Quantifying Energy-Accuracy Trade-offs.
DAC
Saeed Seyedfaraji, Severin Jager, Salar Shakibhamedan, Asad Aftab, Semeen Rehman
2022 A conf
AID: Accuracy Improvement of Analog Discharge-Based in-SRAM Multiplication Accelerator.
DATE
Saeed Seyedfaraji, Baset Mesgari, Semeen Rehman
2022 J jnl
AID: Accuracy Improvement of Analog Discharge-Based in-SRAM Multiplication Accelerator.
CoRR
Saeed Seyedfaraji, Baset Mesgari, Semeen Rehman
2022 J jnl
EXTENT: Enabling Approximation-Oriented Energy Efficient STT-RAM Write Circuit.
IEEE Access
Saeed Seyedfaraji, Javad Talafy Daryani, Mohamed M. Sabry Aly, Semeen Rehman
2022 J jnl
EXTENT: Enabling Approximation-Oriented Energy Efficient STT-RAM Write Circuit.
CoRR
Saeed Seyedfaraji, Javad Talafy, Mohamed M. Sabry, Semeen Rehman
2022 C conf
SMART: Investigating the Impact of Threshold Voltage Suppression in an In-SRAM Multiplication/Accumulation Accelerator for Accuracy Improvement in 65 nm CMOS Technology.
DSD
Saeed Seyedfaraji, Baset Mesgari, Semeen Rehman
2022 J jnl
SMART: Investigating the Impact of Threshold Voltage Suppression in an In-SRAM Multiplication/Accumulation Accelerator for Accuracy Improvement in 65 nm CMOS Technology.
CoRR
Saeed Seyedfaraji, Baset Mesgari, Semeen Rehman
2020 J jnl
DYSCO: DYnamic Stepper Current InjectOr to improve write performance in STT-RAM memories.
Microprocess. Microsystems
Saeed Seyedfaraji, Amir M. Hajisadeghi, Javad Talafy, Hamid R. Zarandi