Saeed Safari - RankMe

90 papers A 3C 17Misc 4Journal 43Unranked 23

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Flexi-NeurA: A Configurable Neuromorphic Accelerator with Adaptive Bit-Precision Exploration for Edge SNNs. CoRR Mohammad Farahani, Mohammad Rasoul Roshanshah, Saeed Safari
2025	J	`jnl`	Neural Network-Based Control of Forced-Convection and Thermoelectric Coolers. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Mahsa Akhsham, Mohammad Javad Dousti, Saeed Safari
2024	J	`jnl`	AMCAL: Approximate Multiplier With the Configurable Accuracy Levels for Image Processing and Convolutional Neural Network. IEEE Access Reza Zendegani, Saeed Safari
2024	J	`jnl`	Performance Improvement of Processor Through Configurable Approximate Arithmetic Units in Multicore Systems. IEEE Access Seyed Ali Kashani Gharavi, Saeed Safari
2024	—	`conf`	Real-Time Crosswalk Segmentation Using FPGA Based Spiking Neural Networks: A Comparison of Integrate-and-Fire and Izhikevich Hardware Neural Models. EWDTS Amirhesam Jafari Rad, Arista Monazzam, Amirhosein Reyhani ShowkatAbad, Saeed Safari
2024	J	`jnl`	SSTE: Syllable-Specific Temporal Encoding to FORCE-learn audio sequences with an associative memory approach. Neural Networks Nastaran Jannesar, Kaveh Akbarzadeh-Sherbaf, Saeed Safari, AbdolHossein Vahabie
2023	J	`jnl`	A Hardware-Friendly Real-Time Implementation of the Auditory Attention Based on a Novel Spiking Winner-Take-All Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Behrooz Abdoli, Saeed Safari
2022	J	`jnl`	Adjoint recurrent neural network technique for nonlinear electronic component modeling. Int. J. Circuit Theory Appl. Zohreh Naghibi, Sayed Alireza Sadrossadat, Saeed Safari
2022	J	`jnl`	Compression of Deep Neural Networks based on quantized tensor decomposition to implement on reconfigurable hardware platforms. Neural Networks Amirreza Nekooei, Saeed Safari
2021	J	`jnl`	A Novel Approximate Hamming Weight Computing for Spiking Neural Networks: an FPGA Friendly Architecture. CoRR Kaveh Akbarzadeh-Sherbaf, Mikaeel Bahmani, Danial Ghiaseddin, Saeed Safari, AbdolHossein Vahabie
2021	J	`jnl`	Modeling of single/multiple-bit upset effects on logic circuits applying Recurrent Neural Network. Microelectron. J. Rasoul Farjaminezhad, Saeed Safari, Amir-Masoud Eftekhari-Moghadam
2021	J	`jnl`	Recurrent neural networks models for analyzing single and multiple transient faults in combinational circuits. Microelectron. J. Rasoul Farjaminezhad, Saeed Safari, Amir-Masoud Eftekhari-Moghadam
2020	J	`jnl`	A digital hardware implementation of spiking neural networks with binary FORCE training. Neurocomputing Kaveh Akbarzadeh-Sherbaf, Saeed Safari, AbdolHossein Vahabie
2020	J	`jnl`	A reconfigurable real-time neuromorphic hardware for spiking winner-take-all network. Int. J. Circuit Theory Appl. Behrooz Abdoli, Saeed Safari
2020	J	`jnl`	EREER: Energy-aware register file and execution unit using exploiting redundancy in GPGPUs. Microprocess. Microsystems Alireza Yazdanpanah, Sohrab Sajadimanesh, Saeed Safari
2019	J	`jnl`	A memory-efficient canonical data structure for decimal floating point arithmetic systems modeling and verification. Turkish J. Electr. Eng. Comput. Sci. Mohammad Saeed Jahangiry, Saeed Safari
2019	J	`jnl`	CMV: Clustered Majority Voting Reliability-Aware Task Scheduling for Multicore Real-Time Systems. IEEE Trans. Reliab. Alireza Namazi, Saeed Safari, Siamak Mohammadi
2019	J	`jnl`	Dynamic behavioral modeling of nonlinear circuits using a novel recurrent neural network technique. Int. J. Circuit Theory Appl. Zohreh Naghibi, Sayed Alireza Sadrossadat, Saeed Safari
2019	J	`jnl`	Modeling Soft Error Propagation in Near-Threshold Combinational Circuits Using Neural Networks. J. Electron. Test. Ali Hajian, Saeed Safari
2019	J	`jnl`	SORT: Semi Online Reliable Task Mapping for Embedded Multi-Core Systems. ACM Trans. Model. Perform. Evaluation Comput. Syst. Alireza Namazi, Saeed Safari, Siamak Mohammadi, Meisam Abdollahi
2018	J	`jnl`	A Majority-Based Reliability-Aware Task Mapping in High-Performance Homogenous NoC Architectures. ACM Trans. Embed. Comput. Syst. Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi
2018	—	`conf`	LRTM: Life-time and Reliability-aware Task Mapping Approach for Heterogeneous Multi-core Systems. NoCArc@MICRO Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi, Masoud Daneshtalab
2018	J	`jnl`	Storage capacity for EDF-ASAP algorithm in energy-harvesting systems with periodic implicit deadline hard real-time tasks. J. Syst. Archit. Ehsan Ghadaksaz, Saeed Safari
2017	C	`conf`	LORAP: Low-Overhead Power and Reliability-Aware Task Mapping Based on Instruction Footprint for Real-Time Applications. DSD Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi
2016	C	`conf`	A Majority-Based Reliability-Aware Task-Mapping in High-Performance Homogenous NoC Architectures. DSD Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi
2016	J	`jnl`	An efficient medium access control protocol for WSN-UAV. Ad Hoc Networks Muhammad Amin Araghizadeh, Peyman Teymoori, Nasser Yazdani, Saeed Safari
2016	J	`jnl`	An efficient temperature dependent hot carrier injection reliability simulation flow. Microelectron. Reliab. Mehdi Kamal, Qing Xie, Massoud Pedram, Ali Afzali-Kusha, Saeed Safari
2016	J	`jnl`	Fast and accurate FPGA-based framework for processor architecture vulnerability analysis. Integr. Hoda Mahdiani, Saeed Safari, Mostafa E. Salehi
2016	J	`jnl`	Fast and accurate architectural vulnerability analysis for embedded processors using Instruction Vulnerability Factor. Microprocess. Microsystems Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie, Saeed Safari
2016	J	`jnl`	PVTA-aware approximate custom instruction extension technique: A cross-layer approach. Microelectron. Reliab. Bahareh J. Farahani, Saeed Safari, Nader Sehatbakhsh
2016	J	`jnl`	Reliability aware throughput management of chip multi-processor architecture via thread migration. J. Supercomput. Fatemeh Pouyan, Ali Azarpeyvand, Saeed Safari, Sied Mehdi Fakhraie
2016	—	`conf`	Reliability-Aware Task Scheduling using Clustered Replication for Multi-core Real-Time systems. NoCArc@MICRO Alireza Namazi, Meisam Abdollahi, Saeed Safari, Siamak Mohammadi, Masoud Daneshtalab
2016	A	`conf`	SEERAD: A high speed yet energy-efficient rounding-based approximate divider. DATE Reza Zendegani, Mehdi Kamal, Arash Fayyazi, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2016	J	`jnl`	Statistical analysis of asynchronous pipelines in presence of process variation using formal models. Integr. Mahdi Mosaffa, Siamak Mohammadi, Saeed Safari
2016	J	`jnl`	Yield and Speedup Improvements in Extensible Processors by Allocating Extra Cycles to Some Custom Instructions. ACM Trans. Design Autom. Electr. Syst. Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2015	J	`jnl`	A cross-layer SER analysis in the presence of PVTA variations. Microelectron. Reliab. Bahar J. Farahani, Seyedamin Habibi, Saeed Safari
2015	—	`conf`	A cross-layer approach to online adaptive reliability prediction of transient faults. DFTS Bahar J. Farahani, Saeed Safari
2015	J	`jnl`	Cross-layer custom instruction selection to address PVTA variations and soft error. Microelectron. Reliab. Bahareh J. Farahani, Saeed Safari
2015	J	`jnl`	Design of NBTI-resilient extensible processors. Integr. Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2015	J	`jnl`	OPLE: A Heuristic Custom Instruction Selection Algorithm Based on Partitioning and Local Exploration of Application Dataflow Graphs. ACM Trans. Embed. Comput. Syst. Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2015	J	`jnl`	Reliability-aware simultaneous multithreaded architecture using online architectural vulnerability factor estimation. IET Comput. Digit. Tech. Fatemeh Pouyan, Ali Azarpeyvand, Saeed Safari, Sied Mehdi Fakhraie
2014	—	`conf`	An instance-based SER analysis in the presence of PVTA variations. DFT Bahareh J. Farahani, Saeed Safari
2014	Misc	`conf`	Formal Verification and Debugging of Array Dividers with Auto-correction Mechanism. VLSID M. H. Haghbayan, Bijan Alizadeh, Payman Behnam, Saeed Safari
2014	J	`jnl`	Impact of Process Variations on Speedup and Maximum Achievable Frequency of Extensible Processors. ACM J. Emerg. Technol. Comput. Syst. Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2014	J	`jnl`	Implementation-aware selection of the custom instruction set for extensible processors. Microprocess. Microsystems Amir Yazdanbakhsh, Mehdi Kamal, Sied Mehdi Fakhraie, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2013	—	`conf`	Capturing and mitigating the NBTI effect during the design flow for extensible processors. DTIS Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram, Behzad Eghbalkhah
2013	J	`jnl`	Considering the effect of process variations during the ISA extension design flow. Microprocess. Microsystems Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2013	J	`jnl`	Fast implementation of dense stereo vision algorithms on a highly parallel SIMD architecture. J. Real Time Image Process. Fouzhan Hosseini, Amir Fijany, Saeed Safari, Jean-Guy Fontaine
2013	C	`conf`	Performance evaluation of normaly-off SiC JFET in matrix converter without antiparrallel diodes. IECON Saeed Safari, Alberto Castellazzi, Pat Wheeler
2013	C	`conf`	Reliability-aware cross-layer custom instruction screening. DDECS Bahareh J. Farahani, Ali Azarpeyvand, Saeed Safari, Seid Mehdi Fakhraie
2012	—	`conf`	A novel graceful degradable routing algorithm for 3D on-chip networks. INA-OCMC@HiPEAC Reza Nakhjavani, Ali Shahabi, Saeed Safari, Zainalabedin Navabi
2012	A	`conf`	An architecture-level approach for mitigating the impact of process variations on extensible processors. DATE Mehdi Kamal, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2012	C	`conf`	An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits. ICCD Mehdi Kamal, Qing Xie, Massoud Pedram, Ali Afzali-Kusha, Saeed Safari
2012	C	`conf`	Architectural vulnerability aware checkpoint placement in a multicore processor. IOLTS Atieh Lotfi, Arash Bayat, Saeed Safari
2012	—	`conf`	DEED: Dynamic energy efficient distributed cluster forming algorithm for Wireless Sensors Network. IST Muhammad Amin Araghizadeh, Nasser Yazdani, Saeed Safari, Alireza Hedayati
2012	C	`conf`	FPGA Implementation of Hodgkin-Huxley Neuron Model. IJCCI Safa Yaghini Bonabi, Hassan Asgharian, Reyhaneh Bakhtiari, Saeed Safari, Majid Nili Ahmadabadi
2012	—	`conf`	FPGA Implementation of a Cortical Network Based on the Hodgkin-Huxley Neuron Model. ICONIP (1) Safa Yaghini Bonabi, Hassan Asgharian, Reyhaneh Bakhtiari, Saeed Safari, Majid Nili Ahmadabadi
2012	C	`conf`	Power constraint testing for multi-clock domain SoCs using concurrent hybrid BIST. DDECS M. H. Haghbayan, Saeed Safari, Zainalabedin Navabi
2012	C	`conf`	Soft Error Analysis on Communication Channels in On-Chip Communication Networks. DSD Mohammadreza Najafi, Saeed Safari, Zainalabedin Navabi
2011	C	`conf`	Securing Embedded Processors against Power Analysis Based Side Channel Attacks Using Reconfigurable Architecture. EUC Sahar Abbaspour Seyyedi, Mehdi Kamal, Hamid Noori, Saeed Safari
2010	—	`conf`	Automatic selection of efficient observability points in combinational gate level circuits using particle swarm optimization. SoC Amirali Ghofrani, Fatemeh Javaheri, Saeed Safari, Zainalabedin Navabi
2010	—	`conf`	Fast Parallel Model Estimation on the Cell Broadband Engine. ISVC (2) Ali Khalili, Amir Fijany, Fouzhan Hosseini, Saeed Safari, Jean-Guy Fontaine
2010	J	`jnl`	Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization. Eng. Appl. Artif. Intell. Amin Farmahini Farahani, Shervin Vakili, Sied Mehdi Fakhraie, Saeed Safari, Caro Lucas
2010	—	`conf`	Reliability-Aware Dynamic Voltage and Frequency Scaling. ISVLSI Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie, Saeed Safari
2009	Misc	`conf`	A cost-error optimized architecture for 9/7 lifting based Discrete Wavelet Transform with balanced pipeline stages. ICASSP Alireza Aminlou, Fatemeh Refan, Mahmoud Reza Hashemi, Omid Fatemi, Saeed Safari
2009	Misc	`conf`	Forecasting-Based Dynamic Virtual Channels Allocation for Power Optimization of Network-on-Chips. VLSI Design Amir-Mohammad Rahmani, Masoud Daneshtalab, Ali Afzali-Kusha, Saeed Safari, Massoud Pedram
2009	Misc	`conf`	Negative Exponential Distribution Traffic Pattern for Power/Performance Analysis of Network on Chips. VLSI Design Amir-Mohammad Rahmani, I. Kamali, Pejman Lotfi-Kamran, Ali Afzali-Kusha, Saeed Safari
2009	—	`conf`	Real-Time Parallel Implementation of SSD Stereo Vision Algorithm on CSX SIMD Architecture. ISVC (1) Fouzhan Hosseini, Amir Fijany, Saeed Safari, Ryad Chellali, Jean-Guy Fontaine
2008	C	`conf`	A 65nm 10GHz pipelined MAC structure. ISCAS Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari
2008	C	`conf`	A Novel GA-Based High-Level Synthesis Technique to Enhance RT-Level Concurrent Testing. IOLTS Naghmeh Karimi, Soheil Aminzadeh, Saeed Safari, Zainalabedin Navabi
2008	C	`conf`	Co-evolutionary reliability-oriented high-level synthesis. ISCAS Saeed Safari
2008	J	`jnl`	Designing an ultra-high-speed multiply-accumulate structure. Microelectron. J. Fatemeh Kashfi, Sied Mehdi Fakhraie, Saeed Safari
2008	—	`conf`	Inherent reliability evaluation of Networks-on-Chip based on analytical models. SoC Mojtaba Valinataj, Siamak Mohammadi, Saeed Safari
2008	C	`conf`	Reliability in Application Specific Mesh-Based NoC Architectures. IOLTS Fatemeh Refan, Homa Alemzadeh, Saeed Safari, Paolo Prinetto, Zainalabedin Navabi
2008	A	`conf`	Scalable Architecture for on-Chip Neural Network Training using Swarm Intelligence. DATE Amin Farmahini Farahani, Seid Mehdi Fakhraie, Saeed Safari
2007	J	`jnl`	15GHz low-voltage-swing carry-lookahead adder. IEICE Electron. Express Fatemeh Kashfi, Amir Agah, Sied Mehdi Fakhraie, Saeed Safari
2007	C	`conf`	A HW/SW Architecture to Reduce the Effects of Soft-Errors in Real-Time Operating System Services. DDECS Mohammad Hossein Neishaburi, Mohammad Reza Kakoee, Masoud Daneshtalab, Saeed Safari, Zainalabedin Navabi
2007	—	`conf`	Assertion based design error diagnosis for core-based SoCs. SoCC Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Masoud Daneshtalab, Saeed Safari
2007	—	`conf`	Co-evolutionary high-level test synthesis. ACM Great Lakes Symposium on VLSI Soheil Aminzadeh, Saeed Safari
2007	—	`conf`	Fault Tolerant Arithmetic Operations with Multiple Error Detection and Correction. DFT Mojtaba Valinataj, Saeed Safari
2007	J	`jnl`	HW/SW architecture for soft-error cancellation in real-time operating system. IEICE Electron. Express Mohammad Hossein Neishaburi, Mohammad Reza Kakoee, Masoud Daneshtalab, Saeed Safari
2007	—	`conf`	HW/SW partitioning using discrete particle swarm. ACM Great Lakes Symposium on VLSI Amin Farmahini Farahani, Mehdi Kamal, Seid Mehdi Fakhraie, Saeed Safari
2007	C	`conf`	Improving Robustness of Real-Time Operating Systems (RTOS) Services Related to Soft-Errors. AICCSA Mohammad Hossein Neishaburi, Masoud Daneshtalab, Mohammad Reza Kakoee, Saeed Safari
2007	C	`conf`	On-Chip Verification of NoCs Using Assertion Processors. DSD Mohammad Reza Kakoee, Mohammad Hossein Neishaburi, Masoud Daneshtalab, Saeed Safari, Zainalabedin Navabi
2007	—	`conf`	SOPC-Based Architecture for Discrete Particle Swarm Optimization. ICECS Amin Farmahini Farahani, Sied Mehdi Fakhraie, Saeed Safari
2006	—	`conf`	A Novel Merged Multiplier-Accumulator Embedded in DSP Coprocessor. ICECS Hadi Parandeh-Afshar, Mohsen Ahmadvand, Saeed Safari
2006	J	`jnl`	A parameterized graph-based framework for high-level test synthesis. Integr. Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilzadeh
2006	—	`conf`	An Intelligent MLFQ Scheduling Algorithm (IMLFQ) with Fault Tolerant Mechanism. ISDA (3) MohammadReza EffatParvar, Karim Faez, Mehdi Effatparvar, Mehdi Zarei, Saeed Safari
2003	—	`conf`	A novel improvement technique for high-level test synthesis. ISCAS (5) Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jahangir
2003	—	`conf`	Testability Improvement During High-Level Synthesis. Asian Test Symposium Saeed Safari, Hadi Esmaeilzadeh, Amir-Hossein Jahangir