Saeed Saeedi

21 papers C 3Journal 13Unranked 5
YearRankTypeTitle / Venue / Authors
2026 J jnl
Time Interleaved Self-Synchronized Impulse-Radio Transceiver for Seamless Duplex Communication in Neural Implants.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mina Tayebi, Saeed Saeedi
2025 J jnl
A Scalable Delay-Expanding Technique for Low-Area On-Chip Power-On Reset Circuits.
Int. J. Circuit Theory Appl.
Hamid Sadat Mansoury, Saeed Saeedi, Mojtaba Atarodi
2025 J jnl
Low-Noise Modified-RGC Transimpedance Amplifier With Bandwidth Enhancement Using an Intrinsic Negative-RC Network.
IEEE Access
Behnam Abdollahi, Baset Mesgari, Saeed Saeedi, Zahra Sohrabi, Horst Zimmermann
2024 J jnl
Inductor-Less Low-Power Low-Voltage Cross-Coupled Regulated-Cascode Transimpedance Amplifier Circuit in CMOS Technology.
IEEE Access
Behnam Abdollahi, Baset Mesgari, Saeed Saeedi, Zahra Sohrabi, Bernhard Goll, Horst Zimmermann
2022 J jnl
Transconductance Boosting Technique for Bandwidth Extension in Low-Voltage and Low-Noise Optical TIAs.
IEEE Trans. Circuits Syst. II Express Briefs
Behnam Abdollahi, Baset Mesgari, Saeed Saeedi, Ehsan Roshanshomal, Abdolreza Nabavi, Horst Zimmermann
2020 J jnl
Cell Weighting and Gate Inductive Peaking Techniques for Wideband Noise Suppression in Distributed Amplifiers.
IEEE Trans. Circuits Syst.
Baset Mesgari, Saeed Saeedi, Abumoslem Jannesari
2019 J jnl
Analysis of Timing Accuracy and Sensitivity in a RF Correlation-Based Impulse Radio Receiver With Phase Interpolation for Data Synchronization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sudabeh Fotoohi Piraghaj, Saeed Saeedi
2018 J jnl
Design and analysis of a millimeter-wave injection locked frequency divider with transconductance boosting technique.
Int. J. Circuit Theory Appl.
Mahsa Abomaashzadeh, Abdolreza Nabavi, Saeed Saeedi
2018 J jnl
Stability analysis and compensation technique for low-voltage regulated cascode transimpedance amplifier.
Microelectron. J.
Behnam Abdollahi, Baset Mesgari, Saeed Saeedi, Abdolreza Nabavi
2017 J jnl
A single-bit continuous-time delta-sigma modulator using clock-jitter and inter-symbol-interference suppression technique.
Int. J. Circuit Theory Appl.
Vahid Sabouhi, Esmaeil Najafi Aghdam, Saeed Saeedi
2017 J jnl
Selectivity and sensitivity enhancement methods for high-data-rate super-regenerative receiver.
Int. J. Circuit Theory Appl.
Samaneh Mousavi, Saeed Saeedi
2012 J jnl
Noise Canceling Balun-LNA with Enhanced IIP2 and IIP3 for Digital TV Applications.
IEICE Trans. Electron.
Saeed Saeedi, Seyed Mojtaba Atarodi
2011 C conf
Low phase noise on-chip oscillator for implantable biomedical applications.
ISCAS
Fatemeh Aghlmand, Seyed Mojtaba Atarodi, Saeed Saeedi
2010 — conf
Modeling of DLL-based frequency multiplier in time and frequency domain with Matlab Simulink.
APCCAS
Mohammad Gholami, Mohammad Sharifkhani, Saeed Saeedi
2009 J jnl
Second and third-order distortion suppression technique for noise canceling CMOS LNAs.
IEICE Electron. Express
Saeed Saeedi, Mojtaba Atarodi
2008 — conf
A divide-by-3 frequency divider for I/Q generation in a multi-band frequency synthesizer.
APCCAS
Saeed Saeedi, Mojtaba Atarodi, Mehrdad Sharif Bakhtiar
2006 C conf
A compact low power mixed-signal equalizer for gigabit Ethernet applications.
ISCAS
Saeid Mehrmanesh, Behzad Eghbalkhah, Saeed Saeedi, Ali Afzali-Kusha, Seyed Mojtaba Atarodi
2006 C conf
A technique to suppress tail current flicker noise in CMOS LC VCOs.
ISCAS
Saeed Saeedi, Saeid Mehrmanesh, Armin Tajalli, Seyed Mojtaba Atarodi
2004 — conf
A 1-V 400MS/s 14bit self-calibrated CMOS DAC with enhanced dynamic linearity.
ISCAS (1)
Saeed Saeedi, Saeid Mehrmanesh, Seyed Mojtaba Atarodi, Hesam Amir Aslanzadeh
2004 — conf
A new full CMOS 2.5 V two-stage line driver with variable gain for ADSL applications.
ISCAS (4)
Saeid Mehrmanesh, Seyed Mojtaba Atarodi, Hesam Amir Aslanzadeh, Saeed Saeedi, Amin Quasem Safarian
2003 — conf
A 1.5-V 14-bit CMOS DAC with a new self-calibration technique for wireless communication systems.
ICECS
Saeed Saeedi, Saeid Mehrmanesh, Hesam Amir Aslanzadeh, Mojtaba Atarodi