Sachhidh Kannan

12 papers A* 1A 1C 3Misc 2Journal 5
YearRankTypeTitle / Venue / Authors
2023 J jnl
SCANN: Side Channel Analysis of Spiking Neural Networks.
Cryptogr.
Karthikeyan Nagarajan, Rupshali Roy, Rasit Onur Topaloglu, Sachhidh Kannan, Swaroop Ghosh
2022 A conf
Analysis of Power-Oriented Fault Injection Attacks on Spiking Neural Networks.
DATE
Karthikeyan Nagarajan, Junde Li, Sina Sayyah Ensan, Mohammad Nasim Imtiaz Khan, Sachhidh Kannan, Swaroop Ghosh
2022 J jnl
Analysis of Power-Oriented Fault Injection Attacks on Spiking Neural Networks.
CoRR
Karthikeyan Nagarajan, Junde Li, Sina Sayyah Ensan, Mohammad Nasim Imtiaz Khan, Sachhidh Kannan, Swaroop Ghosh
2015 J jnl
Modeling, Detection, and Diagnosis of Faults in Multilevel Memristor Memories.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sachhidh Kannan, Naghmeh Karimi, Ramesh Karri, Ozgur Sinanoglu
2015 J jnl
Security Vulnerabilities of Emerging Nonvolatile Main Memories and Countermeasures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Sachhidh Kannan, Naghmeh Karimi, Ozgur Sinanoglu, Ramesh Karri
2014 Misc conf
Detection, diagnosis, and repair of faults in memristor-based memories.
VTS
Sachhidh Kannan, Naghmeh Karimi, Ramesh Karri, Ozgur Sinanoglu
2014 A* conf
Secure Memristor-based Main Memory.
DAC
Sachhidh Kannan, Naghmeh Karimi, Ozgur Sinanoglu
2013 C conf
Sneak path testing and fault modeling for multilevel memristor-based memories.
ICCD
Sachhidh Kannan, Ramesh Karri, Ozgur Sinanoglu
2013 Misc conf
Sneak-path Testing of Memristor-based Memories.
VLSI Design
Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu
2012 C conf
Engineering crossbar based emerging memory technologies.
ICCD
Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu
2011 J jnl
3D NOC for many-core processors.
Microelectron. J.
Aamir Zia, Sachhidh Kannan, H. Jonathan Chao, Garrett S. Rose
2011 C conf
A hierarchical 3-D floorplanning algorithm for many-core CMP networks.
ISCAS
Sachhidh Kannan, Garrett S. Rose