S. Rekha

22 papers A 1B 1Misc 1Journal 15Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
Investigations on a compact self-isolated flag-shaped slotted MIMO antenna for triple-band applications.
Int. J. Commun. Syst.
S. Rekha, G. Shine Let, S. Radha, P. Lavanya, T. Rajasekhar, S. Ravi Chand
2024 J jnl
Optimization Techniques in Cooperative and Distributed MAC Protocols: A Survey.
Int. J. Intell. Inf. Technol.
Subramanyam Radha, S. Rekha, P. Nagabushanam, Sai Krishna Kondoju
2021 J jnl
A fully differential switched-capacitor integrator based programmable resolution hybrid ADC architecture for biomedical applications.
IET Circuits Devices Syst.
Sreenivasulu Polineni, S. Rekha, M. S. Bhat
2021 J jnl
Low mismatch high-speed charge pump for high bandwidth phase locked loops.
Microelectron. J.
H. Lad Kirankumar, S. Rekha, Tonse Laxminidhi
2020 J jnl
A 0.3-V, 2.4-nW, and 100-Hz fourth-order LPF for ECG signal processing.
Int. J. Circuit Theory Appl.
G. Hanumantha Rao, Sreenivasulu Polineni, S. Rekha, M. S. Bhat
2020 J jnl
A Dead-Zone-Free Zero Blind-Zone High-Speed Phase Frequency Detector for Charge-Pump PLL.
Circuits Syst. Signal Process.
H. Lad Kirankumar, S. Rekha, Tonse Laxminidhi
2020 J jnl
A Switched Capacitor-Based SAR ADC Employing a Passive Reference Charge Sharing and Charge Accumulation Technique.
Circuits Syst. Signal Process.
Sreenivasulu Polineni, M. S. Bhat, S. Rekha
2020 J jnl
An area-efficient, large time-constant log-domain filter for low-frequency applications.
Int. J. Circuit Theory Appl.
G. Hanumanta Rao, S. Rekha
2020 J jnl
Time Constant Enhancement Technique for Low-Frequency Filters.
Circuits Syst. Signal Process.
G. Hanumanta Rao, S. Rekha
2019 J jnl
A 0.3 V, 56 dB DR, 100 Hz fourth order low-pass filter for ECG acquisition system.
Microelectron. J.
Sreenivasulu Polineni, G. Hanumanta Rao, S. Rekha, M. S. Bhat
2019 J jnl
Fast start crystal oscillator design with negative resistance control.
Integr.
Puneeth Kumar, S. Rekha
2019 J jnl
Ultra-low voltage, power efficient continuous-time filters in 180 nm CMOS technology.
IET Circuits Devices Syst.
S. Rekha, Vasantha Moodabettu Harishchandra, Tonse Laxminidhi
2018 J jnl
Low Voltage, Low Power
J. Low Power Electron.
G. Hanumanta Rao, S. Rekha
2017 — conf
Low Voltage, Low Power Transconductor for Low Frequency G_m -C Filters.
VDAT
G. Hanumanta Rao, S. Rekha
2016 J jnl
Common Mode Feedback Circuits for Low Voltage Fully-Differential Amplifiers.
J. Circuits Syst. Comput.
S. Rekha, Tonse Laxminidhi
2013 J jnl
Low voltage, Low Power Chebyshev filter in 0.18 μM CMOS Technology.
J. Circuits Syst. Comput.
S. Rekha, Tonse Laxminidhi
2012 — conf
Effect of Finite Gain and Bandwidth of Feed-Forward Compensated OTA on Active-RC Integrators: A Case Study.
ISED
S. Rekha, Laxminidhi Tonse
2012 B conf
Group Recommender Model for Boosting and Optimizing Customer Purchases.
ASONAM
M. Saravanan, Garigipati Prasad, M. Jagadeesan, Revathy Raman, S. Rekha
2006 Misc conf
Extrinsic Analog Synthesis Using Piecewise Linear Current-Mode Circuits.
VLSI Design
M. S. Bhat, S. Rekha, H. S. Jamadagni
2005 A conf
A New Moments based Skew Estimation Technique using Pixels in the Word for Binary Document Images.
ICDAR
P. Shivakumara, G. Hemantha Kumar, H. S. Varsha, S. Rekha, M. R. Rashmi Nayaka
2005 — conf
An Extrinsic Method for the Synthesis of Analog Functions using Non-Linear Current-Mode Circuits.
IICAI
M. S. Bhat, S. Rekha, H. S. Jamadagni
2005 — conf
An Extrinsic Method of Evolutionary Synthesis of Multiple-Valued Arithmetic Functions using Genetic Algorithms.
IICAI
M. S. Bhat, S. Rekha, H. S. Jamadagni