Róbert Lórencz

50 papers A 1C 22Misc 1Journal 15Unranked 11

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	Attacking a Segmented CFB Mode with a Predictable IV. ICISSP (2) Vojtech Novák, Josef Kokes, Róbert Lórencz
2026	—	`conf`	Malware Detection through System Call Vectorization and Neural Network Classification. ICISSP (1) Ales Répás, Simona Fornusek, Róbert Lórencz
2025	C	`conf`	Algebraic Cryptanalysis of Small-Scale Variants of the Bluetooth Stream Cipher E0. DSD Jan Dolejs, Martin Jurecek, Róbert Lórencz
2025	—	`conf`	Profiling Side-Channel Attack on HQC Polynomial Multiplication Using Machine Learning Methods. CASCADE Tomás Rabas, Jirí Bucek, Vincent Grosso, Karolína Zenknerová, Róbert Lórencz
2025	—	`conf`	X-Ray Radiation Effects on SRAM-Based TRNG and PUF. ICISSP (2) Martin Holec, Jan Belohoubek, Pavel Rous, Tomás Pokorný, Róbert Lórencz, Frantisek Steiner
2024	J	`jnl`	Classification and online clustering of zero-day malware. J. Comput. Virol. Hacking Tech. Olha Jurecková, Martin Jurecek, Mark Stamp, Fabio Di Troia, Róbert Lórencz
2024	C	`conf`	Counter Power Leakage for Frequency Extraction of Ring Oscillators in ROPUF. DSD Ondrej Stanícek, Filip Kodýtek, Róbert Lórencz
2024	J	`jnl`	Single-Trace Side-Channel Attacks on NTRU Implementation. SN Comput. Sci. Tomás Rabas, Jirí Bucek, Róbert Lórencz
2023	J	`jnl`	Classification and Online Clustering of Zero-Day Malware. CoRR Olha Jurecková, Martin Jurecek, Róbert Lórencz
2023	C	`conf`	On the Use of Multiple Approximations in the Linear Cryptanalysis of Baby Rijndael. ICISSP Josef Kokes, Róbert Lórencz
2023	C	`conf`	SPA Attack on NTRU Protected Implementation with Sparse Representation of Private Key. ICISSP Tomás Rabas, Jirí Bucek, Róbert Lórencz
2023	C	`conf`	Single-Trace Attack on NTRU Decryption with Machine Learning and Template Profiling. DSD Tomás Rabas, Jirí Bucek, Róbert Lórencz
2022	J	`jnl`	Automatic Detection and Decryption of AES Using Dynamic Analysis. SN Comput. Sci. Josef Kokes, Jonatan Matejka, Róbert Lórencz
2022	J	`jnl`	Three counter value based ROPUFs on FPGA and their properties. Microprocess. Microsystems Filip Kodýtek, Róbert Lórencz, Jirí Bucek
2022	C	`conf`	Verification of PUF-based IoT Protocols with AVISPA and Scyther. SECRYPT Tomás Rabas, Róbert Lórencz, Jirí Bucek
2022	C	`conf`	Yet Another Algebraic Cryptanalysis of Small Scale Variants of AES. SECRYPT Marek Bielik, Martin Jurecek, Olha Jurecková, Róbert Lórencz
2022	J	`jnl`	Yet Another Algebraic Cryptanalysis of Small Scale Variants of AES. IACR Cryptol. ePrint Arch. Marek Bielik, Martin Jurecek, Olha Jurecková, Róbert Lórencz
2021	C	`conf`	Active Directory Kerberoasting Attack: Detection using Machine Learning Techniques. ICISSP Lukás Kotlaba, Simona Buchovecká, Róbert Lórencz
2021	J	`jnl`	Application of Distance Metric Learning to Automated Malware Detection. IEEE Access Martin Jurecek, Róbert Lórencz
2021	C	`conf`	Automatic Detection and Decryption of AES by Monitoring S-Box Access. ICISSP Josef Kokes, Jonatan Matejka, Róbert Lórencz
2021	C	`conf`	Improving Classification of Malware Families using Learning a Distance Metric. ICISSP Martin Jurecek, Olha Jurecková, Róbert Lórencz
2020	C	`conf`	Active Directory Kerberoasting Attack: Monitoring and Detection Techniques. ICISSP Lukás Kotlaba, Simona Buchovecká, Róbert Lórencz
2020	C	`conf`	Comparison of three counter value based ROPUFs on FPGA. DSD Filip Kodýtek, Róbert Lórencz, Jirí Bucek
2020	C	`conf`	Distance Metric Learning using Particle Swarm Optimization to Improve Static Malware Detection. ICISSP Martin Jurecek, Róbert Lórencz
2020	C	`conf`	Lightweight Authentication and Secure Communication Suitable for IoT Devices. ICISSP Simona Buchovecká, Róbert Lórencz, Jirí Bucek, Filip Kodýtek
2020	—	`conf`	Symmetric and Asymmetric Schemes for Lightweight Secure Communication. ICISSP (Revised Selected Papers) Simona Buchovecká, Róbert Lórencz, Jirí Bucek, Filip Kodýtek
2019	C	`conf`	Side-Channel Attack on the A5/1 Stream Cipher. DSD Martin Jurecek, Jirí Bucek, Róbert Lórencz
2018	J	`jnl`	Malware Detection Using a Heterogeneous Distance Function. Comput. Informatics Martin Jurecek, Róbert Lórencz
2017	J	`jnl`	Design of a Residue Number System Based Linear System Solver in Hardware. J. Signal Process. Syst. Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický
2017	J	`jnl`	True random number generator based on ring oscillator PUF circuit. Microprocess. Microsystems Simona Buchovecká, Róbert Lórencz, Filip Kodýtek, Jirí Bucek
2016	J	`jnl`	Improved ring oscillator PUF on FPGA and its properties. Microprocess. Microsystems Filip Kodýtek, Róbert Lórencz, Jirí Bucek
2016	J	`jnl`	Parallel Solver of Large Systems of Linear Inequalities Using Fourier-Motzkin Elimination. Comput. Informatics Ivan Simecek, Richard Fritsch, Daniel Langr, Róbert Lórencz
2016	J	`jnl`	Proposal and Properties of Ring Oscillator-Based PUF on FPGA. J. Circuits Syst. Comput. Filip Kodýtek, Róbert Lórencz
2016	C	`conf`	Temperature Dependence of ROPUF on FPGA. DSD Filip Kodýtek, Róbert Lórencz, Jirí Bucek, Simona Buchovecká
2016	C	`conf`	True Random Number Generator Based on ROPUF Circuit. DSD Simona Buchovecká, Róbert Lórencz, Filip Kodýtek, Jirí Bucek
2015	C	`conf`	A Design of Ring Oscillator Based PUF on FPGA. DDECS Filip Kodýtek, Róbert Lórencz
2015	Misc	`conf`	GPU Solver for Systems of Linear Equations with Infinite Precision. SYNASC Jiri Khun, Ivan Simecek, Róbert Lórencz
2014	—	`conf`	An ASIC linear congruence solver synthesized with three cell libraries. ICECS Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický
2014	—	`conf`	System on chip design of a linear system solver. ISSoC Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický
2013	—	`conf`	Architecture of a Parallel MOSFET Parameter Extraction System. ARCS Tomás Zahradnický, Róbert Lórencz
2013	—	`conf`	Arithmetic Unit for Computations in GF(p) with the Left-Shifting Multiplicative Inverse Algorithm. ARCS Josef Hlavác, Róbert Lórencz
2013	C	`conf`	Comparison of FPGA and ASIC Implementation of a Linear Congruence Solver. DSD Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický
2013	J	`jnl`	Using Power-Up SRAM State of Atmel ATmega1284P Microcontrollers as Physical Unclonable Function for Key Generation and Chip Identification. Inf. Secur. J. A Glob. Perspect. Mikhail Platonov, Josef Hlavác, Róbert Lórencz
2012	—	`conf`	Dedicated hardware implementation of a linear congruence solver in FPGA. ICECS Jirí Bucek, Pavel Kubalík, Róbert Lórencz, Tomás Zahradnický
2008	C	`conf`	Making ProTools Accessible for Visually Impaired. ICCHP Tomás Zahradnický, Róbert Lórencz, Pavel Musil
2006	C	`conf`	Comparing Subtraction-Free and Traditional AMI. DDECS Jirí Bucek, Róbert Lórencz
2006	C	`conf`	Making Nonaccessible Applications Accessible for Visually Impaired. ICCHP Tomás Zahradnický, Róbert Lórencz
2005	J	`jnl`	Subtraction-free Almost Montgomery Inverse algorithm. Inf. Process. Lett. Róbert Lórencz, Josef Hlavác
2004	—	`conf`	MOSFET Mathematical Model Parameter Extraction. CCCT (1) Tomás Zahradnický, Róbert Lórencz
2002	A	`conf`	New Algorithm for Classical Modular Inverse. CHES Róbert Lórencz