Ryusuke Egawa - RankMe

110 papers A 1C 15Misc 3Journal 32Unranked 57

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	Anomaly Detection in HPC Systems using Time Difference Analysis of Reconstructed Data. CANDARW Seiya Yaguchi, Ryusuke Egawa
2025	J	`jnl`	Foreword. IEICE Trans. Electron. Ryusuke Egawa, Yasutaka Wada
2025	J	`jnl`	Special Issue on COOL Chips. IEEE Micro Ryusuke Egawa, Yasutaka Wada
2024	—	`conf`	A QA-Assisted Job Scheduler for Minimizing the Impact of Urgent Computing on HPC System Operation. CANDARW Tatsuyoshi Ohmura, Keichi Takahashi, Ryusuke Egawa, Hiroyuki Takizawa
2024	J	`jnl`	Conflict-aware workload co-execution on SX-aurora TSUBASA. CCF Trans. High Perform. Comput. Riku Nunokawa, Yoichi Shimomura, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
2024	J	`jnl`	Foreword. IEICE Trans. Electron. Ryusuke Egawa, Yasutaka Wada
2024	J	`jnl`	Reuse distance-based shared LLC management mechanism for heterogeneous CPU-GPU systems. IEICE Electron. Express Jiaheng Liu, Ryusuke Egawa, Keichi Takahashi, Yoichi Shimomura, Hiroyuki Takizawa
2024	J	`jnl`	Special Issue on COOL Chips. IEEE Micro Ryusuke Egawa, Yasutaka Wada
2023	J	`jnl`	Foreword. IEICE Trans. Electron. Ryusuke Egawa, Yasutaka Wada
2023	C	`ed.`	Parallel and Distributed Computing, Applications and Technologies - 23rd International Conference, PDCAT 2022, Sendai, Japan, December 7-9, 2022, Proceedings PDCAT Hiroyuki Takizawa, Hong Shen, Toshihiro Hanawa, Jong Hyuk Park, Hui Tian, Ryusuke Egawa
2023	C	`conf`	Performance Evaluation of a Next-Generation SX-Aurora TSUBASA Vector Supercomputer. ISC Keichi Takahashi, Soya Fujimoto, Satoru Nagase, Yoko Isobe, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
2023	J	`jnl`	Performance Evaluation of a Next-Generation SX-Aurora TSUBASA Vector Supercomputer. CoRR Keichi Takahashi, Soya Fujimoto, Satoru Nagase, Yoko Isobe, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
2023	J	`jnl`	Special Issue on Cool Chips. IEEE Micro Ryusuke Egawa, Yasutaka Wada
2022	J	`jnl`	A Conflict-Aware Capacity Control Mechanism for Deep Cache Hierarchy. IEICE Trans. Inf. Syst. Jiaheng Liu, Ryusuke Egawa, Hiroyuki Takizawa
2022	C	`conf`	A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders. PDCAT Masayuki Sato, Yuya Omori, Ryusuke Egawa, Ken Nakamura, Daisuke Kobayashi, Hiroe Iwasaki, Kazuhiko Komatsu, Hiroaki Kobayashi
2022	C	`conf`	Equivalence Checking of Code Transformation by Numerical and Symbolic Approaches. PDCAT Shunpei Sugawara, Keichi Takahashi, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
2022	C	`conf`	Toward Building a Digital Twin of Job Scheduling and Power Management on an HPC System. JSSPP Tatsuyoshi Ohmura, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
2021	J	`jnl`	OpenCL-like offloading with metaprogramming for SX-Aurora TSUBASA. Parallel Comput. Hiroyuki Takizawa, Shinji Shiotsuki, Naoki Ebata, Ryusuke Egawa
2021	—	`conf`	Portability of Vectorization-aware Performance Tuning Expertise across System Generations. MCSoC Shunpei Sugawara, Yoichi Shimomura, Ryusuke Egawa, Hiroyuki Takizawa
2021	J	`jnl`	Preemptive Parallel Job Scheduling for Heterogeneous Systems Supporting Urgent Computing. IEEE Access Mulya Agung, Yuta Watanabe, Henning Weber, Ryusuke Egawa, Hiroyuki Takizawa
2021	C	`conf`	Towards Conflict-Aware Workload Co-execution on SX-Aurora TSUBASA. PDCAT Riku Nunokawa, Yoichi Shimomura, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
2020	—	`conf`	A Conflict-Aware Capacity Control Mechanism for Last-Level Cache. CANDAR (Workshops) Jiaheng Liu, Ryusuke Egawa, Mulya Agung, Hiroyuki Takizawa
2020	—	`conf`	Automatically Avoiding Memory Access Conflicts on SX-Aurora TSUBASA. IPDPS Workshops Naoki Ebata, Ryusuke Egawa, Yoko Isobe, Ryoji Takaki, Hiroyuki Takizawa
2020	J	`jnl`	DeLoc: A Locality and Memory-Congestion-Aware Task Mapping Method for Modern NUMA Systems. IEEE Access Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
2020	J	`jnl`	Effects of Using a Memory Stalled Core for Handling MPI Communication Overlapping in the SOR Solver on SX-ACE and SX-Aurora TSUBASA. Supercomput. Front. Innov. Takashi Soga, Kenta Yamaguchi, Raghunandan Mathur, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
2020	—	`ch.`	ExaFSA: Parallel Fluid-Structure-Acoustic Simulation. Software for Exascale Computing Florian Lindner, Amin Totounferoush, Miriam Mehl, Benjamin Uekermann, Neda Ebrahimi Pour, Verena Krupp, Sabine Roller, Thorsten Reimann, Dörte C. Sternel, Ryusuke Egawa, Hiroyuki Takizawa, Frédéric Simonis
2020	—	`conf`	Exploiting the Potentials of the Second Generation SX-Aurora TSUBASA. PMBS@SC Ryusuke Egawa, Souya Fujimoto, Tsuyoshi Yamashita, Daisuke Sasaki, Yoko Isobe, Yoichi Shimomura, Hiroyuki Takizawa
2020	J	`jnl`	Improving Quantum Annealing Performance on Embedded Problems. Supercomput. Front. Innov. Michael R. Zielewski, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
2020	—	`conf`	Improving the Accuracy in SpMV Implementation Selection with Machine Learning. CANDAR (Workshops) Reo Furuhata, Minglu Zhao, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
2020	J	`jnl`	Online MPI Process Mapping for Coordinating Locality and Memory Congestion on NUMA Systems. Supercomput. Front. Innov. Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
2020	—	`conf`	Polymorphic Data Layout for SX-Aurora TSUBASA Vector Engines. CANDAR Naoki Ebata, Yoko Isobe, Ryusuke Egawa, Hiroyuki Takizawa
2020	—	`conf`	Task Priority Control for the HPX Runtime System. IPDPS Workshops Suhang Jiang, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
2020	J	`jnl`	Xevolver: A code transformation framework for separation of system-awareness from application codes. Concurr. Comput. Pract. Exp. Kazuhiko Komatsu, Ayumu Gomi, Ryusuke Egawa, Daisuke Takahashi, Reiji Suda, Hiroyuki Takizawa
2019	—	`conf`	A Design Scheme for 3-D Stacked CNN Accelerators. 3DIC Jubee Tada, Kazuto Takahashi, Ryusuke Egawa
2019	—	`conf`	A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism. HEART Ryusuke Egawa, Ryoma Saito, Masayuki Sato, Hiroaki Kobayashi
2019	—	`conf`	An Automatic MPI Process Mapping Method Considering Locality and Memory Congestion on NUMA Systems. MCSoC Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
2019	J	`jnl`	An Energy-aware Dynamic Data Allocation Mechanism for Many-channel Memory Systems. Supercomput. Front. Innov. Masayuki Sato, Takuya Toyoshima, Hikaru Takayashiki, Ryusuke Egawa, Hiroaki Kobayashi
2019	C	`conf`	An OpenCL-Like Offload Programming Framework for SX-Aurora TSUBASA. PDCAT Hiroyuki Takizawa, Shinji Shiotsuki, Naoki Ebata, Ryusuke Egawa
2019	—	`conf`	Peachy Parallel Assignments (EduHPC 2019). EduHPC@SC Mulya Agung, Allen D. Malony, Hiroyuki Takizawa, David P. Bunde, Muhammad Alfian Amrizal, Steven Bogaerts, Ryusuke Egawa, Daniel A. Ellsworth, Jorge Fernández-Fabeiro, Arturo González-Escribano, Sukhamay Kundu, Alina Lazar
2019	J	`jnl`	Performance Evaluation of Different Implementation Schemes of an Iterative Flow Solver on Modern Vector Machines. Supercomput. Front. Innov. Kenta Yamaguchi, Takashi Soga, Yoichi Shimomura, Thorsten Reimann, Kazuhiko Komatsu, Ryusuke Egawa, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
2019	—	`conf`	Performance Improvement of High-Speed File Transfer Over JHPCN. DASC/PiCom/DataCom/CyberSciTech Praphan Pavarangkoon, Takeshi Nanri, Ken T. Murata, Kazunori Yamamoto, Kazuya Muranaga, Takamichi Mizuhara, Keiichiro Fukazawa, Ryusuke Egawa, Takahiro Katagiri, Masao Ogino
2019	—	`conf`	The Impacts of Locality and Memory Congestion-aware Thread Mapping on Energy Consumption of Modern NUMA Systems. COOL CHIPS Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
2018	C	`conf`	A Failure Prediction-Based Adaptive Checkpointing Method with Less Reliance on Temperature Monitoring for HPC Applications. CLUSTER Muhammad Alfian Amrizal, Pei Li, Mulya Agung, Ryusuke Egawa, Hiroyuki Takizawa
2018	J	`jnl`	An Adjacent-Line-Merging Writeback Scheme for STT-RAM-Based Last-Level Caches. IEEE Trans. Multi Scale Comput. Syst. Masayuki Sato, Yoshiki Shoji, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi
2018	—	`conf`	An energy-aware set-level refreshing mechanism for eDRAM last-level caches. COOL CHIPS Masayuki Sato, Zehua Li, Ryusuke Egawa, Hiroaki Kobayashi
2018	—	`conf`	Automatic Hyperparameter Tuning of Machine Learning Models under Time Constraints. IEEE BigData Zhen Wang, Mulya Agung, Ryusuke Egawa, Reiji Suda, Hiroyuki Takizawa
2018	—	`conf`	Investigating the Effects of Dynamic Thread Team Size Adjustment for Irregular Applications. CANDAR Xiong Xiao, Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa, Hiroyuki Takizawa
2018	J	`jnl`	Risk Management of Heatstroke Based on Fast Computation of Temperature and Water Loss Using Weather Data for Exposure to Ambient Heat and Solar Radiation. IEEE Access Kazuya Kojima, Akimasa Hirata, Kazuma Hasegawa, Sachiko Kodera, Ilkka Laakso, Daisuke Sasaki, Takeshi Yamashita, Ryusuke Egawa, Yuka Horie, Nanako Yazaki, Saeri Kowata, Kenji Taguchi, Tatsuya Kashiwa
2018	—	`conf`	Use of Code Structural Features for Machine Learning to Predict Effective Optimizations. IPDPS Workshops Yuki Kawarabatake, Mulya Agung, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa
2017	J	`jnl`	A Directive Generation Approach to High Code-Maintainability for Various HPC Systems. Int. J. Netw. Comput. Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2017	Misc	`conf`	A Memory Congestion-Aware MPI Process Placement for Modern NUMA Systems. HiPC Mulya Agung, Muhammad Alfian Amrizal, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa
2017	—	`conf`	An Adaptive Demotion Policy for High-Associativity Caches. HEART Jubee Tada, Masayuki Sato, Ryusuke Egawa
2017	—	`conf`	An Adjacent-Line-Merging Writeback Scheme for STT-RAM last-level caches. COOL Chips Masayuki Sato, Zentaro Sakai, Ryusuke Egawa, Hiroaki Kobayashi
2017	—	`conf`	An Application-Level Incremental Checkpointing Mechanism with Automatic Parameter Tuning. CANDAR Hiroyuki Takizawa, Muhammad Alfian Amrizal, Kazuhiko Komatsu, Ryusuke Egawa
2017	—	`conf`	An application-adaptive data allocation method for multi-channel memory. COOL Chips Takuya Toyoshima, Masayuki Sato, Ryusuke Egawa, Hiroaki Kobayashi
2017	—	`conf`	Designing an Open Database of System-Aware Code Optimizations. CANDAR Ryusuke Egawa, Kazuhiko Komatsu, Hiroyuki Takizawa
2017	C	`conf`	Performance and Power Analysis of SX-ACE Using HP-X Benchmark Programs. CLUSTER Ryusuke Egawa, Kazuhiko Komatsu, Yoko Isobe, Toshihiro Kato, Souya Fujimoto, Hiroyuki Takizawa, Akihiro Musa, Hiroaki Kobayashi
2017	J	`jnl`	Potential of a modern vector supercomputer for practical applications: performance evaluation of SX-ACE. J. Supercomput. Ryusuke Egawa, Kazuhiko Komatsu, Shintaro Momose, Yoko Isobe, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
2017	C	`conf`	Vectorization-Aware Loop Optimization with User-Defined Code Transformations. CLUSTER Hiroyuki Takizawa, Thorsten Reimann, Kazuhiko Komatsu, Takashi Soga, Ryusuke Egawa, Akihiro Musa, Hiroaki Kobayashi
2016	—	`conf`	A Directive Generation Approach Using User-Defined Rules. CANDAR Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2016	J	`jnl`	A Memory-Efficient Implementation of a Plasmonics Simulation Application on SX-ACE. Int. J. Netw. Comput. Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
2016	—	`conf`	A cache partitioning mechanism to protect shared data for CMPs. COOL Chips Masayuki Sato, Shin Nishimura, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2016	—	`conf`	A power-aware LLC control mechanism for the 3D-stacked memory system. 3DIC Ryusuke Egawa, Wataru Uno, Masayuki Sato, Hiroaki Kobayashi, Jubee Tada
2016	J	`jnl`	Effects of Stacking Granularity on 3-D Stacked Floating-point Fused Multiply Add Units. SIGARCH Comput. Archit. News Jubee Tada, Maiki Hosokawa, Ryusuke Egawa, Hiroaki Kobayashi
2016	J	`jnl`	Translation of Large-Scale Simulation Codes for an OpenACC Platform Using the Xevolver Framework. Int. J. Netw. Comput. Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken'ichi Itakura, Hiroaki Kobayashi
2015	—	`conf`	A Case Study of Memory Optimization for Migration of a Plasmonics Simulation Application to SX-ACE. CANDAR Raghunandan Mathur, Hiroshi Matsuoka, Osamu Watanabe, Akihiro Musa, Ryusuke Egawa, Hiroaki Kobayashi
2015	—	`conf`	An energy-efficient dynamic memory address mapping mechanism. COOL Chips Masayuki Sato, Chengguang Han, Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2015	—	`conf`	Design of a 3-D stacked floating-point Goldschmidt divider. 3DIC Jubee Tada, Ryusuke Egawa, Hiroaki Kobayashi
2015	J	`jnl`	FLEXII: A Flexible Insertion Policy for Dynamic Cache Resizing Mechanisms. IEICE Trans. Electron. Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2015	—	`conf`	Migration of an Atmospheric Simulation Code to an OpenACC Platform Using the Xevolver Framework. CANDAR Kazuhiko Komatsu, Ryusuke Egawa, Shoichi Hirasawa, Hiroyuki Takizawa, Ken'ichi Itakura, Hiroaki Kobayashi
2014	C	`conf`	A Compiler-Assisted OpenMP Migration Method Based on Automatic Parallelizing Information. ISC Kazuhiko Komatsu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2014	—	`conf`	An energy optimization method for vector processing mechanisms. COOL Chips Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2014	—	`conf`	An impact of circuit scale on the performance of 3-D stacked arithmetic units. 3DIC Jubee Tada, Ryusuke Egawa, Hiroaki Kobayashi
2014	J	`jnl`	MVP-Cache: A Multi-Banked Cache Memory for Energy-Efficient Vector Processing of Multimedia Applications. IEICE Trans. Inf. Syst. Ye Gao, Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2014	—	`conf`	On-chip checkpointing with 3D-stacked memories. 3DIC Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2014	Misc	`conf`	Xevolver: An XML-based code translation framework for supporting HPC application migration. HiPC Hiroyuki Takizawa, Shoichi Hirasawa, Yasuharu Hayashi, Ryusuke Egawa, Hiroaki Kobayashi
2013	J	`jnl`	A Capacity-Aware Thread Scheduling Method Combined with Cache Partitioning to Reduce Inter-Thread Cache Conflicts. IEICE Trans. Inf. Syst. Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2013	—	`conf`	A flexible insertion policy for dynamic cache resizing mechanisms. COOL Chips Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2013	—	`conf`	Design and evaluation of a media-oriented vector processor with a multi-banked cache memory. ESTIMedia Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2013	—	`conf`	Design of a 3-D stacked floating-point adder. 3DIC Jubee Tada, Ryusuke Egawa, Hiroaki Kobayashi
2013	—	`conf`	Vertically integrated processor and memory module design for vector supercomputers. 3DIC Ryusuke Egawa, Masayuki Sato, Jubee Tada, Hiroaki Kobayashi
2012	—	`conf`	A capacity-efficient insertion policy for dynamic cache resizing mechanisms. Conf. Computing Frontiers Masayuki Sato, Yusuke Tobo, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2012	—	`conf`	A media-oriented vector architectural extension with a high bandwidth cache system. COOL Chips Ye Gao, Naoki Shoji, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2012	—	`conf`	Abstract: Exploring Design Space of a 3D Stacked Vector Cache. SC Companion Ryusuke Egawa, Jubee Tada, Yusuke Endo, Hiroyuki Takizawa, Hiroaki Kobayashi
2012	—	`conf`	An out-of-order vector processing mechanism for multimedia applications. Conf. Computing Frontiers Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2012	—	`conf`	Poster: Exploring Design Space of a 3D Stacked Vector Cache - Designing a 3D Stacked Vector Cache using Conventional EDA Tools. SC Companion Ryusuke Egawa, Jubee Tada, Yusuke Endo, Hiroyuki Takizawa, Hiroaki Kobayashi
2011	J	`jnl`	A Network Clustering Algorithm for Sybil-Attack Resisting. IEICE Trans. Inf. Syst. Ling Xu, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2011	—	`conf`	A middle-grain circuit partitioning strategy for 3-D integrated floating-point multipliers. 3DIC Jubee Tada, Ryusuke Egawa, Kazushige Kawai, Hiroaki Kobayashi, Gensuke Goto
2011	—	`conf`	Effects of 3-D stacked vector cache on energy consumption. 3DIC Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Yusuke Endo, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
2011	J	`jnl`	Power-Aware Dynamic Cache Partitioning for CMPs. Trans. High Perform. Embed. Archit. Compil. Isao Kotera, Kenta Abe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2010	J	`jnl`	A Fast Ray-Tracing Using Bounding Spheres and Frustum Rays for Dynamic Scene Rendering. IEICE Trans. Inf. Syst. Ken-Ichi Suzuki, Yoshiyuki Kaeriyama, Kazuhiko Komatsu, Ryusuke Egawa, Nobuyuki Ohba, Hiroaki Kobayashi
2010	—	`conf`	A History-Based Job Scheduling Mechanism for the Vector Computing Cloud. SAINT Yoshitomo Murata, Ryusuke Egawa, Manabu Higashida, Hiroaki Kobayashi
2010	C	`conf`	A Load-Forwarding Mechanism for the Vector Architecture in Multimedia Applications. DSD Ye Gao, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2010	—	`conf`	A Majority-Based Control Scheme for Way-Adaptable Caches. Facing the Multicore-Challenge Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2010	C	`conf`	A voting-based working set assessment scheme for dynamic cache resizing mechanisms. ICCD Masayuki Sato, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2010	—	`conf`	Cache partitioning strategies for 3-D stacked vector processors. 3DIC Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2010	—	`conf`	Design and early evaluation of a 3-D die stacked chip multi-vector processor. 3DIC Ryusuke Egawa, Yusuke Funaya, Ryu-ichi Nagaoka, Akihiro Musa, Hiroyuki Takizawa, Hiroaki Kobayashi
2009	—	`conf`	3D on-chip memory for the vector architecture. 3DIC Yusuke Funaya, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2009	—	`conf`	Evaluation of fine grain 3-D integrated arithmetic units. 3DIC Ryusuke Egawa, Jubee Tada, Hiroaki Kobayashi, Gensuke Goto
2009	A	`conf`	Performance evaluation of NEC SX-9 using real science and engineering applications. SC Takashi Soga, Akihiro Musa, Youichi Shimomura, Ryusuke Egawa, Ken'ichi Itakura, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
2009	—	`conf`	Performance tuning and analysis of future vector processors based on the roofline model. MEDEA@PACT Yoshiei Sato, Ryu-ichi Nagaoka, Akihiro Musa, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
2008	C	`conf`	A Utility-Based Double Auction Mechanism for Efficient Grid Resource Allocation. ISPA Chainan Satayapiwat, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2008	—	`conf`	A shared cache for a chip multi vector processor. MEDEA@PACT Akihiro Musa, Yoshiei Sato, Takashi Soga, Koki Okabe, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2008	C	`conf`	Effects of MSHR and Prefetch Mechanisms on an On-Chip Cache of the Vector Architecture. ISPA Akihiro Musa, Yoshiei Sato, Takashi Soga, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
2008	—	`ch.`	First Experiences with NEC SX-9. High Performance Computing on Vector Systems Hiroaki Kobayashi, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Akihiko Musa, Takashi Soga, Yoichi Shimomura
2008	—	`conf`	Modeling of cache access behavior based on Zipf's law. MEDEA@PACT Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2007	—	`conf`	A power-aware shared cache mechanism based on locality assessment of memory reference for CMPs. MEDEA@PACT Isao Kotera, Ryusuke Egawa, Hiroyuki Takizawa, Hiroaki Kobayashi
2007	—	`conf`	An on-chip cache design for vector processors. MEDEA@PACT Akihiro Musa, Yoshiei Sato, Ryusuke Egawa, Hiroyuki Takizawa, Koki Okabe, Hiroaki Kobayashi
2004	—	`conf`	A Systolic Memory Architecture for Fast Codebook Design based on MMPDCL Algorithm. ITCC (1) Kentaro Sano, Chiaki Takagi, Ryusuke Egawa, Ken-Ichi Suzuki, Tadao Nakamura
2001	Misc	`conf`	Scaling Up Of Wave Pipelines. VLSI Design Masa-Aki Fukase, Ryusuke Egawa, Tomoaki Sato, Tadao Nakamura