Ryszard Szplet

16 papers B 1Journal 6Unranked 9
YearRankTypeTitle / Venue / Authors
2021 — conf
A brief review of wave union TDCs.
EBCCSP
Pawel Kwiatkowski, Dominik Sondej, Ryszard Szplet
2020 J jnl
Efficient Implementation of Multiple Time Coding Lines-Based TDC in an FPGA Device.
IEEE Trans. Instrum. Meas.
Pawel Kwiatkowski, Ryszard Szplet
2020 — conf
Multisampling wave union time-to-digital converter.
EBCCSP
Pawel Kwiatkowski, Ryszard Szplet
2019 — conf
A 9 ps time interval digitizer based on pulse repetition and averaging.
I2MTC
Ryszard Szplet, Slawomir Jarzynski
2019 J jnl
Measurement Uncertainty of Precise Interpolating Time Counters.
IEEE Trans. Instrum. Meas.
Ryszard Szplet, Rafal Szymanowski, Dominik Sondej
2019 — conf
Time-to-Digital Converter with Pseudo-Segmented Delay Line.
I2MTC
Pawel Kwiatkowski, Ryszard Szplet
2018 — conf
Digital-to-time converter with pulse train generation capability.
I2MTC
Pawel Kwiatkowski, Ryszard Szplet
2017 — conf
Four-channel, precise, time-event recorder in programmable device.
EBCCSP
Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc
2016 — conf
A time digitizer based on multiphase clock implemented in FPGA device.
EBCCSP
Pawel Kwiatkowski, Ryszard Szplet, Zbigniew Jachna, Krzysztof Rozyc
2016 J jnl
An Eight-Channel 4.5-ps Precision Timestamps-Based Time Interval Counter in FPGA Chip.
IEEE Trans. Instrum. Meas.
Ryszard Szplet, Pawel Kwiatkowski, Zbigniew Jachna, Krzysztof Rozyc
2016 J jnl
High-Precision Time Digitizer Based on Multiedge Coding in Independent Coding Lines.
IEEE Trans. Instrum. Meas.
Ryszard Szplet, Dominik Sondej, Grzegorz Grzeda
2015 — conf
A comparison of methods for time-to-digital conversion based on independent coding lines and multi-edge coding.
MIXDES
Dominik Sondej, Ryszard Szplet
2014 B conf
A combination of multi-edge coding and independent coding lines for time-to-digital conversion.
FPL
Dominik Sondej, Ryszard Szplet
2014 — conf
Subpicosecond-resolution time-to-digital converter with multi-edge coding in independent coding lines.
I2MTC
Ryszard Szplet, Dominik Sondej, Grzegorz Grzeda
2010 J jnl
An FPGA-Integrated Time-to-Digital Converter Based on Two-Stage Pulse Shrinking.
IEEE Trans. Instrum. Meas.
Ryszard Szplet, Kamil Klepacki
2000 J jnl
Interpolating time counter with 100 ps resolution on a single FPGA device.
IEEE Trans. Instrum. Meas.
Ryszard Szplet, Józef Kalisz, Rafal Szymanowski