Ryan Kastner - RankMe

245 papers A* 19A 41B 17C 2Misc 15Journal 89Unranked 59

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	FireBridge: Cycle-Accurate Hardware + Firmware Co-Verification for Modern Accelerators. CoRR G. Abarajithan, Zhenghua Ma, Francesco Restuccia, Ryan Kastner
2026	J	`jnl`	Machine Learning on Heterogeneous, Edge, and Quantum Hardware for Particle Physics (ML-HEQUPP). CoRR Julia Gonski, Jenni Ott, Shiva Abbaszadeh, Sagar Addepalli, Matteo Cremonesi, Jennet Dickinson, Giuseppe Di Guglielmo, Erdem Yigit Ertorer, Lindsey Gray, Ryan Herbst, Christian Herwig, Tae Min Hong, Benedikt Maier, Maryam Bayat Makou, David Miller, Mark S. Neubauer, Cristián Peña, Dylan Rankin, Seon-Hee Seo, Giordon Stark, Alexander Tapper, Audrey Corbeil Therrien, Ioannis Xiotidis, Keisuke Yoshihara, G. Abarajithan, Nural Akchurin, Carlos Argüelles, Saptaparna Bhattacharya, Lorenzo Borella, Christian Boutan, Tom Braine, James Brau, Martin Breidenbach, Antonio Chahine, Talal Ahmed Chowdhury, Yuan-Tang Chou, Seokju Chung, Alberto Coppi, Mariarosaria D'Alfonso, Abhilasha Dave, Chance DeSmet, Angela Di Fulvio, Karri DiPetrillo, Javier Duarte, Auralee Edelen, Jan Eysermans, Yongbin Feng, Emmett Forrestel, Dolores Garcia, Loredana Gastaldo, Julián García Pardiñas, Lino Gerlach, Loukas Gouskos, Katya Govorkova, Carl Grace, Christopher Grant, Philip Harris, Ciaran Hasnip, Timon Heim, Abraham Holtermann, Gian Michele Innocenti, Koji Ishidoshiro, Miaochen Jin, Jyothisraj Johnson, Stephen Jones, Andreas Jung, Georgia Karagiorgi, Ryan Kastner, Nicholas Kamp, Doojin Kim, Kyoungchul Kong, Katie Kudela, Jelena Lalic, Bo-Cheng Lai, Yun-Tsung Lai, Tommy Lam, Jeffrey Lazar, Aobo Li, Zepeng Li, Haoyun Liu, Vladimir Loncar, Luca Macchiarulo, Christopher Madrid, Zhenghua Ma, Prashansa Mukim, Victoria Nguyen, Sungbin Oh, Isobel Ojalvo, Hideyoshi Ozaki, Simone Pagan Griso, Myeonghun Park, Christoph Paus, Santosh Parajuli, Benjamin Parpillon, Sara Pozzi, Ema Puljak
2026	—	`conf`	PrioriFI: More Informed Fault Injection for Edge Neural Networks. ASPLOS (2) Olivia Weng, Andres Meza, Nhan Tran, Ryan Kastner
2026	J	`jnl`	Studying domain shifts in bioacoustic recording style between focal and soundscape recordings with acoustic indices. Ecol. Informatics Sean Perry, Tianqi Zhang, Siya Kamboj, Anu Jajodia, Dhruv Tomar, Ryan Kastner
2025	J	`jnl`	BASTION: A Framework for Secure Third-Party IP Integration in NoC-based SoC Platforms. IACR Trans. Cryptogr. Hardw. Embed. Syst. Francesco Restuccia, Zhenghua Ma, Joseph Zuckerman, Andres Meza, Biruk B. Seyoum, Luca P. Carloni, Ryan Kastner
2025	A*	`conf`	FastPath: A Hybrid Approach for Efficient Hardware Security Verification. DAC Lucas Deutschmann, Andres Meza, Dominik Stoffel, Wolfgang Kunz, Ryan Kastner
2025	A	`conf`	Greater than the Sum of its LUTs: Scaling Up LUT-based Neural Networks with AmigoLUT. FPGA Olivia Weng, Marta Andronic, Danial Zuberi, Jiaqing Chen, Caleb Geniesse, George A. Constantinides, Nhan Tran, Nicholas J. Fraser, Javier Mauricio Duarte, Ryan Kastner
2025	J	`jnl`	Loss Landscape Analysis for Reliable Quantized ML Models for Scientific Sensing. CoRR Tommaso Baldi, Javier Campos, Olivia Weng, Caleb Geniesse, Nhan Tran, Ryan Kastner, Alessandro Biondi
2024	J	`jnl`	Architectural Implications of Neural Network Inference for High Data-Rate, Low-Latency Scientific Applications. CoRR Olivia Weng, Alexander Redding, Nhan Tran, Javier Mauricio Duarte, Ryan Kastner
2024	J	`jnl`	CGRA4ML: A Framework to Implement Modern Neural Networks for Scientific Edge Computing. CoRR G. Abarajithan, Zhenghua Ma, Zepeng Li, Shrideep Koparkar, Ravidu Munasinghe, Francesco Restuccia, Ryan Kastner
2024	—	`conf`	Pentimento: Data Remanence in Cloud FPGAs. ASPLOS (2) Colin Drewes, Olivia Weng, Andres Meza, Alric Althoff, David Kohlbrenner, Ryan Kastner, Dustin Richmond
2024	—	`conf`	Reducing the Carbon Footprint of EdTech with Repurposed Devices. IGSC Jennifer Switzer, Subash Katel, Jaemok Christian Lee, Ashwin Rohit Alagiri Rajan, Ryan Kastner, Pat Pannuto
2024	Misc	`conf`	Reliable edge machine learning hardware for scientific applications. VTS Tommaso Baldi, Javier Campos, Benjamin Hawks, Jennifer Ngadiuba, Nhan Tran, Daniel Diaz, Javier M. Duarte, Ryan Kastner, Andres Meza, Melissa Quinnan, Olivia Weng, Caleb Geniesse, Amir Gholami, Michael W. Mahoney, Vladimir Loncar, Philip C. Harris, Joshua Agar, Shuyu Qin
2024	J	`jnl`	Reliable edge machine learning hardware for scientific applications. CoRR Tommaso Baldi, Javier Campos, Benjamin Hawks, Jennifer Ngadiuba, Nhan Tran, Daniel Diaz, Javier M. Duarte, Ryan Kastner, Andres Meza, Melissa Quinnan, Olivia Weng, Caleb Geniesse, Amir Gholami, Michael W. Mahoney, Vladimir Loncar, Philip C. Harris, Joshua Agar, Shuyu Qin
2024	J	`jnl`	TOP: Towards Open & Predictable Heterogeneous SoCs. CoRR Luca Valente, Francesco Restuccia, Davide Rossi, Ryan Kastner, Luca Benini
2024	J	`jnl`	TOP: Towards Open & Predictable Heterogeneous SoCs. IEEE Trans. Computers Luca Valente, Francesco Restuccia, Davide Rossi, Ryan Kastner, Luca Benini
2024	J	`jnl`	Tailor: Altering Skip Connections for Resource-Efficient Inference. ACM Trans. Reconfigurable Technol. Syst. Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, G. Abarajithan, Nojan Sheybani, Andres Meza, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner
2024	J	`jnl`	Turn on, Tune in, and Listen up: Maximizing Side-Channel Recovery in Cross-Platform Time-to-Digital Converters. ACM Trans. Reconfigurable Technol. Syst. Colin Drewes, Tyler Sheaves, Olivia Weng, Keegan Ryan, Bill Hunter, Christopher McCarty, Ryan Kastner, Dustin Richmond
2024	A	`conf`	eXpect: On the Security Implications of Violations in AXI Implementations. ICCAD Melisande Zonta-Roudes, Andres Meza, Nora Hinderling, Lucas Deutschmann, Francesco Restuccia, Ryan Kastner, Shweta Shinde
2023	J	`jnl`	A Framework for Design, Verification, and Management of SoC Access Control Systems. IEEE Trans. Computers Francesco Restuccia, Andres Meza, Ryan Kastner, Jason Oberg
2023	A	`conf`	Adapting Skip Connections for Resource-Efficient FPGA Inference. FPGA Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, Nojan Sheybani, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner
2023	—	`conf`	Automated Generation, Verification, and Ranking of Secure SoC Access Control Policies. CPS-IoT Week Workshops Andres Meza, Ryan Kastner
2023	J	`jnl`	Information Flow Coverage Metrics for Hardware Security Verification. CoRR Andres Meza, Ryan Kastner
2023	J	`jnl`	Isadora: automated information-flow property generation for hardware security verification. J. Cryptogr. Eng. Calvin Deutschbein, Andres Meza, Francesco Restuccia, Ryan Kastner, Cynthia Sturton
2023	—	`conf`	Junkyard Computing: Repurposing Discarded Smartphones to Minimize Carbon. ASPLOS (2) Jennifer Switzer, Gabriel Marcano, Ryan Kastner, Pat Pannuto
2023	J	`jnl`	Pentimento: Data Remanence in Cloud FPGAs. CoRR Colin Drewes, Olivia Weng, Andres Meza, Alric Althoff, David Kohlbrenner, Ryan Kastner, Dustin Richmond
2023	J	`jnl`	Security Verification of the OpenTitan Hardware Root of Trust. IEEE Secur. Priv. Andres Meza, Francesco Restuccia, Jason Oberg, Dominic Rizzo, Ryan Kastner
2023	Misc	`conf`	Special Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance. VTS Sohrab Aftabjahani, Mark Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein
2023	J	`jnl`	Tailor: Altering Skip Connections for Resource-Efficient Inference. CoRR Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, Nojan Sheybani, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner
2023	A	`conf`	Turn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters. FPGA Colin Drewes, Olivia Weng, Keegan Ryan, Bill Hunter, Christopher McCarty, Ryan Kastner, Dustin Richmond
2023	—	`conf`	Within-Camera Multilayer Perceptron DVS Denoising. CVPR Workshops Antonio Rios-Navarro, S. Guo, G. Abarajithan, K. Vijayakumar, Alejandro Linares-Barranco, Thea Aarrestad, Ryan Kastner, Tobi Delbruck
2023	J	`jnl`	Within-Camera Multilayer Perceptron DVS Denoising. CoRR Antonio Rios-Navarro, S. Guo, G. Abarajithan, K. Vijayakumar, Alejandro Linares-Barranco, Thea Aarrestad, Ryan Kastner, Tobi Delbruck
2022	J	`jnl`	A Remote Control System for Emergency Ventilators During SARS-CoV-2. IEEE Embed. Syst. Lett. Michael Barrow, Francesco Restuccia, Mustafa S. Gobulukoglu, Enrico Rossi, Ryan Kastner
2022	J	`jnl`	ARTe: Providing real-time multitasking to Arduino. J. Syst. Softw. Francesco Restuccia, Marco Pagani, Agostino Mascitti, Michael Barrow, Mauro Marinoni, Alessandro Biondi, Giorgio C. Buttazzo, Ryan Kastner
2022	A*	`conf`	Automating hardware security property generation: invited. DAC Ryan Kastner, Francesco Restuccia, Andres Meza, Sayak Ray, Jason M. Fung, Cynthia Sturton
2022	J	`jnl`	Cut and Forward: Safe and Secure Communication for FPGA System on Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Francesco Restuccia, Ryan Kastner
2022	J	`jnl`	Hardware Information Flow Tracking. ACM Comput. Surv. Wei Hu, Armaiti Ardeshiricham, Ryan Kastner
2022	—	`ch.`	Integrating Information Flow Tracking into High-Level Synthesis Design Flow. Behavioral Synthesis for Hardware Security Wei Hu, Armaiti Ardeshiricham, Lingjuan Wu, Ryan Kastner
2022	J	`jnl`	Open-source FPGA-ML codesign for the MLPerf Tiny Benchmark. CoRR Hendrik Borras, Giuseppe Di Guglielmo, Javier M. Duarte, Nicolò Ghielmetti, Benjamin Hawks, Scott Hauck, Shih-Chieh Hsu, Ryan Kastner, Jason Liang, Andres Meza, Jules Muhizi, Tai Nguyen, Rushil Roy, Nhan Tran, Yaman Umuroglu, Olivia Weng, Aidan Yokuda, Michaela Blott
2022	J	`jnl`	Renée: New Life for Old Phones. IEEE Embed. Syst. Lett. Jennifer Switzer, Eric Siu, Subhash Ramesh, Ruohan Hu, Emanoel Zadorian, Ryan Kastner
2022	J	`jnl`	Sherlock: A Multi-Objective Design Space Exploration Framework. ACM Trans. Design Autom. Electr. Syst. Quentin Gautier, Alric Althoff, Christopher L. Crutchfield, Ryan Kastner
2022	J	`jnl`	Toward Hardware Security Property Generation at Scale. IEEE Secur. Priv. Calvin Deutschbein, Andres Meza, Francesco Restuccia, Matthew Gregoire, Ryan Kastner, Cynthia Sturton
2022	—	`conf`	Underwater Depth Calibration Using a Commercial Depth Camera. WUWNet Emily Wong, Isabella Humphrey, Scott Switzer, Christopher L. Crutchfield, Nathan T. Hui, Curt Schurgers, Ryan Kastner
2021	J	`jnl`	$O(N)$O(N)-Space Spatiotemporal Filter for Reducing Noise in Neuromorphic Vision Sensors. IEEE Trans. Emerg. Top. Comput. Alireza Khodamoradi, Ryan Kastner
2021	J	`jnl`	A Methodology For Creating Information Flow Specifications of Hardware Designs. CoRR Calvin Deutschbein, Andres Meza, Francesco Restuccia, Ryan Kastner, Cynthia Sturton
2021	Misc	`conf`	A Tunable Dual-Edge Time-to-Digital Converter. FCCM Colin Drewes, Steven Harris, Winnie Wang, Richard Appen, Olivia Weng, Ryan Kastner, William Hunter, Christopher McCarty, Dustin Richmond
2021	J	`jnl`	A more precise way to localize animals using drones. J. Field Robotics Nathan T. Hui, Eric K. Lo, Jen B. Moss, Glenn P. Gerber, Mark E. Welch, Ryan Kastner, Curt Schurgers
2021	J	`jnl`	AKER: A Design and Verification Framework for Safe andSecure SoC Access Control. CoRR Francesco Restuccia, Andres Meza, Ryan Kastner
2021	B	`conf`	ASLR: An Adaptive Scheduler for Learning Rate. IJCNN Alireza Khodamoradi, Kristof Denolf, Kees A. Vissers, Ryan Kastner
2021	A	`conf`	Aker: A Design and Verification Framework for Safe and Secure SoC Access Control. ICCAD Francesco Restuccia, Andres Meza, Ryan Kastner
2021	J	`jnl`	An Overview of Hardware Security and Trust: Threats, Countermeasures, and Design Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wei Hu, Chip-Hong Chang, Anirban Sengupta, Swarup Bhunia, Ryan Kastner, Hai Li
2021	J	`jnl`	Applications and Techniques for Fast Machine Learning in Science. CoRR Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Thomas K. Warburton, Maria Acosta Flechas, Anthony Aportela, Thomas Calvet, Leonardo Cristella, Daniel Diaz, Caterina Doglioni, Maria Domenica Galati, Elham E Khoda, Farah Fahim, Davide Giri, Benjamin Hawks, Duc Hoang, Burt Holzman, Shih-Chieh Hsu, Sergo Jindariani, Iris Johnson, Raghav Kansal, Ryan Kastner, Erik Katsavounidis, Jeffrey D. Krupa, Pan Li, Sandeep Madireddy, Ethan Marx, Patrick McCormack, Andres Meza, Jovan Mitrevski, Mohammed Attia Mohammed, Farouk Mokhtar, Eric A. Moreno, Srishti Nagu, Rohin Narayan, Noah Palladino, Zhiqiang Que, Sang Eon Park, Subramanian Ramamoorthy, Dylan S. Rankin, Simon Rothman, Ashish Sharma, Sioni Summers, Pietro Vischia, Jean-Roch Vlimant, Olivia Weng
2021	J	`jnl`	Architecture of a Junkyard Datacenter. CoRR Jennifer Switzer, Ryan Kastner, Pat Pannuto
2021	A*	`conf`	Classifying Computations on Multi-Tenant FPGAs. DAC Mustafa S. Gobulukoglu, Colin Drewes, William Hunter, Ryan Kastner, Dustin Richmond
2021	A	`conf`	Classifying Computations on Multi-Tenant FPGAs. FPGA Mustafa S. Gobulukoglu, Colin Drewes, Bill Hunter, Dustin Richmond, Ryan Kastner
2021	J	`jnl`	Hardware-efficient Residual Networks for FPGAs. CoRR Olivia Weng, Alireza Khodamoradi, Ryan Kastner
2021	—	`conf`	Isadora: Automated Information Flow Property Generation for Hardware Designs. ASHES@CCS Calvin Deutschbein, Andres Meza, Francesco Restuccia, Ryan Kastner, Cynthia Sturton
2021	B	`conf`	Pyrenote: a Web-based, Manual Annotation Tool for Passive Acoustic Monitoring. MASS Sean Perry, Vaibhav Tiwari, Nishant Balaji, Erika Joun, Jacob Ayers, Mathias Tobler, Ian Ingram, Ryan Kastner, Curt Schurgers
2021	A	`conf`	S2N2: A FPGA Accelerator for Streaming Spiking Neural Networks. FPGA Alireza Khodamoradi, Kristof Denolf, Ryan Kastner
2021	Misc	`conf`	Special Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions. VTS Sohrab Aftabjahani, Ryan Kastner, Mark Tehranipoor, Farimah Farahmandi, Jason Oberg, Anders Nordstrom, Nicole Fern, Alric Althoff
2021	A	`conf`	iSTELLAR: intermittent Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing. ICCAD Jeremy Blackstone, Debayan Das, Alric Althoff, Shreyas Sen, Ryan Kastner
2020	J	`jnl`	A Unified Model for Gate Level Propagation Analysis. CoRR Jeremy Blackstone, Wei Hu, Alric Althoff, Armaiti Ardeshiricham, Lu Zhang, Ryan Kastner
2020	J	`jnl`	FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA. CoRR Shehzeen Hussain, Mojan Javaheripi, Paarth Neekhara, Ryan Kastner, Farinaz Koushanfar
2020	J	`jnl`	Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Lu Zhang, Dejun Mu, Wei Hu, Yu Tai, Jeremy Blackstone, Ryan Kastner
2020	J	`jnl`	Patient Specific Biomechanics Are Clinically Significant In Accurate Computer Aided Surgical Image Guidance. CoRR Michael Barrow, Alice Chao, Qizhi He, Sonia Ramamoorthy, Claude B. Sirlin, Ryan Kastner
2020	—	`conf`	Real-time Automatic Modulation Classification using RFSoC. IPDPS Workshops Stephen Tridgell, David Boland, Philip H. W. Leong, Ryan Kastner, Alireza Khodamoradi, Siddhartha
2019	—	`conf`	Benchmarking Video with the Surgical Image Registration Generator (SIRGn) Baseline. ISVC (2) Michael Barrow, Nelson Ho, Alric Althoff, Peter Tueller, Ryan Kastner
2019	—	`conf`	D-SEA: The Underwater Depth Sensing Device for Standalone Time-Averaged Measurements. MASS Workshops Charmaine Beluso, Anfeng Xu, Eamon Patamasing, Brian Sebastian, Eric Lo, Curt Schurgers, Ryan Kastner, Liren Chen, Xuanyi Yu, Dan Sturm, Robert Barlow
2019	—	`conf`	FPGA Architectures for Real-time Dense SLAM. ASAP Quentin Gautier, Alric Althoff, Ryan Kastner
2019	A	`conf`	FastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA. ICCAD Shehzeen Hussain, Mojan Javaheripi, Paarth Neekhara, Ryan Kastner, Farinaz Koushanfar
2019	A	`conf`	Holistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric. ICCAD Alric Althoff, Jeremy Blackstone, Ryan Kastner
2019	J	`jnl`	Introduction to the Special Section on Security in FPGA-accelerated Cloud and Datacenters. ACM Trans. Reconfigurable Technol. Syst. Christophe Bobda, Russell Tessier, Ken Eguro, Ryan Kastner
2019	A*	`conf`	VeriSketch: Synthesizing Secure Hardware Designs with Timing-Sensitive Information Flow Properties. CCS Armaiti Ardeshiricham, Yoshiki Takashima, Sicun Gao, Ryan Kastner
2018	B	`conf`	A FPGA Accelerator for Real-Time 3D Non-rigid Registration Using Tree Reweighted Message Passing and Dynamic Markov Random Field Generation. FPL Michael Barrow, Steven M. Burns, Ryan Kastner
2018	J	`jnl`	A hardware accelerated system for high throughput cellular image analysis. J. Parallel Distributed Comput. Dajung Lee, Nirja Mehta, Alexandria Shearer, Ryan Kastner
2018	B	`conf`	Everyone's a Critic: A Tool for Exploring RISC-V Projects. FPL Dustin Richmond, Michael Barrow, Ryan Kastner
2018	A	`conf`	Examining the consequences of high-level synthesis optimizations on power side-channel. DATE Lu Zhang, Wei Hu, Armaiti Ardeshiricham, Yu Tai, Jeremy Blackstone, Dejun Mu, Ryan Kastner
2018	A*	`conf`	Hiding Intermittent Information Leakage with Architectural Support for Blinking. ISCA Alric Althoff, Joseph McMahan, Luis Vega, Scott Davidson, Timothy Sherwood, Michael B. Taylor, Ryan Kastner
2018	J	`jnl`	Parallel Programming for FPGAs. CoRR Ryan Kastner, Janarbek Matai, Stephen Neuendorffer
2018	A	`conf`	Property specific information flow analysis for hardware security verification. ICCAD Wei Hu, Armaiti Ardeshiricham, Mustafa S. Gobulukoglu, Xinmu Wang, Ryan Kastner
2018	—	`conf`	PynqCopter - An Open-source FPGA Overlay for UAVs. IEEE BigData Brennan Cain, Zain Merchant, Indira Avendano, Dustin Richmond, Ryan Kastner
2018	J	`jnl`	Quantitative Analysis of Timing Channel Security in Cryptographic Hardware Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Yu Tai, Dejun Mu, Timothy Sherwood, Ryan Kastner
2018	J	`jnl`	Self-Localization of a Deforming Swarm of Underwater Vehicles Using Impulsive Sound Sources of Opportunity. IEEE Access Perry Naughton, Philippe Roux, Curt Schurgers, Ryan Kastner, Jules S. Jaffe, Paul L. D. Roberts
2018	J	`jnl`	Symbolic execution based test-patterns generation algorithm for hardware Trojan detection. Comput. Secur. Lixiang Shen, Dejun Mu, Guo Cao, Maoyuan Qin, Jeremy Blackstone, Ryan Kastner
2018	J	`jnl`	Synthesizable Higher-Order Functions for C++. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Dustin Richmond, Alric Althoff, Ryan Kastner
2017	—	`conf`	A message from the general chair and program chair. ASAP Ken Eguro, Ryan Kastner
2017	A	`conf`	A streaming clustering approach using a heterogeneous system for big data analysis. ICCAD Dajung Lee, Alric Althoff, Dustin Richmond, Ryan Kastner
2017	A*	`conf`	An Architecture for Learning Stream Distributions with Application to RNG Testing. DAC Alric Althoff, Ryan Kastner
2017	A*	`conf`	Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking. DAC Andrew Becker, Wei Hu, Yu Tai, Philip Brisk, Ryan Kastner, Paolo Ienne
2017	A	`conf`	Clepsydra: Modeling timing flows in hardware designs. ICCAD Armaiti Ardeshiricham, Wei Hu, Ryan Kastner
2017	—	`conf`	Identifying and Measuring Security Critical Path for Uncovering Circuit Vulnerabilities. MTV Wei Hu, Armaiti Ardeshiricham, Ryan Kastner
2017	Misc	`conf`	Radio receiver design for Unmanned Aerial wildlife tracking. ICNC Daniel Webber, Nathan T. Hui, Ryan Kastner, Curt Schurgers
2017	A	`conf`	Register transfer level information flow tracking for provably secure hardware design. DATE Armaiti Ardeshiricham, Wei Hu, Joshua Marxen, Ryan Kastner
2017	A	`conf`	Why you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans. ICCAD Wei Hu, Lu Zhang, Armaiti Ardeshiricham, Jeremy Blackstone, Bochuan Hou, Yu Tai, Ryan Kastner
2016	—	`ed.`	2016 IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2016, McLean, VA, USA, May 3-5, 2016 HOST William H. Robinson, Swarup Bhunia, Ryan Kastner
2016	A	`conf`	Adaptive Threshold Non-Pareto Elimination: Re-thinking machine learning for system level design space exploration on FPGAs. DATE Pingfan Meng, Alric Althoff, Quentin Gautier, Ryan Kastner
2016	—	`conf`	Autonomous acoustic trigger for distributed underwater visual monitoring systems. WUWNet Antonella Wilby, Ethan Slattery, Andrew Hostler, Ryan Kastner
2016	A	`conf`	Composable, parameterizable templates for high-level synthesis. DATE Janarbek Matai, Dajung Lee, Alric Althoff, Ryan Kastner
2016	J	`jnl`	Detecting Hardware Trojans with Gate-Level Information-Flow Tracking. Computer Wei Hu, Baolei Mao, Jason Oberg, Ryan Kastner
2016	—	`conf`	Detection and time-of-arrival estimation of underwater acoustic signals. SPAWC Roee Diamant, Ryan Kastner, Michele Zorzi
2016	A	`conf`	Imprecise security: quality and complexity tradeoffs for hardware information flow tracking. ICCAD Wei Hu, Andrew Becker, Armita Ardeshiricham, Yu Tai, Paolo Ienne, Dejun Mu, Ryan Kastner
2016	A	`conf`	Quantifying hardware security using joint information flow analysis. DATE Ryan Kastner, Wei Hu, Alric Althoff
2016	A	`conf`	Resolve: Generation of High-Performance Sorting Architectures from High-Level Synthesis. FPGA Janarbek Matai, Dustin Richmond, Dajung Lee, Zac Blair, Qiongzhi Wu, Amin Abazari, Ryan Kastner
2016	—	`conf`	Spector: An OpenCL FPGA benchmark suite. FPT Quentin Gautier, Alric Althoff, Pingfan Meng, Ryan Kastner
2016	Misc	`conf`	Tinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler. FCCM Dustin Richmond, Jeremy Blackstone, Matthew Hogains, Kevin Thai, Ryan Kastner
2016	—	`conf`	Towards Property Driven Hardware Security. MTV Wei Hu, Alric Althoff, Armita Ardeshiricham, Ryan Kastner
2015	B	`conf`	A scalable FPGA architecture for nonnegative least squares problems. FPL Alric Althoff, Ryan Kastner
2015	A	`conf`	Quantifying Timing-Based Information Flow in Cryptographic Hardware. ICCAD Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Jason Oberg, Dejun Mu, Timothy Sherwood, Ryan Kastner
2015	J	`jnl`	RIFFA 2.1: A Reusable Integration Framework for FPGA Accelerators. ACM Trans. Reconfigurable Technol. Syst. Matthew Jacobsen, Dustin Richmond, Matthew Hogains, Ryan Kastner
2015	J	`jnl`	Real-time collaborative tracking for underwater networked systems. Ad Hoc Networks Diba Mirza, Perry Naughton, Curt Schurgers, Ryan Kastner
2015	—	`conf`	Scaling the Annotation of Subtidal Marine Habitats. WUWNet Perry Naughton, Clinton Edwards, Vid Petrovic, Ryan Kastner, Falko Kuester, Stuart Sandin
2015	J	`jnl`	ToA-TS: Time of arrival based joint time synchronization and tracking for mobile underwater systems. Ad Hoc Networks Jinwang Yi, Diba Mirza, Ryan Kastner, Curt Schurgers, Paul L. D. Roberts, Jules S. Jaffe
2014	J	`jnl`	Enabling FPGAs for the Masses. CoRR Janarbek Matai, Dustin Richmond, Dajung Lee, Ryan Kastner
2014	—	`conf`	Energy efficient canonical huffman encoding. ASAP Janarbek Matai, Joo-Young Kim, Ryan Kastner
2014	Misc	`conf`	FPGA Accelerated Online Boosting for Multi-target Tracking. FCCM Matthew Jacobsen, Pingfan Meng, Siddarth Sampangi, Ryan Kastner
2014	J	`jnl`	Gate-Level Information Flow Tracking for Security Lattices. ACM Trans. Design Autom. Electr. Syst. Wei Hu, Dejun Mu, Jason Oberg, Baolei Mao, Mohit Tiwari, Timothy Sherwood, Ryan Kastner
2014	B	`conf`	Hardware accelerated novel optical de novo assembly for large-scale genomes. FPL Pingfan Meng, Matthew Jacobsen, Motoki Kimura, Vladimir Dergachev, Thomas Anantharaman, Michael Requa, Ryan Kastner
2014	B	`conf`	High throughput channel tracking for JTRS wireless channel emulation. FPL Dajung Lee, Janarbek Matai, Brad T. Weals, Ryan Kastner
2014	B	`conf`	Improving FPGA accelerated tracking with multiple online trained classifiers. FPL Matthew Jacobsen, Siddarth Sampangi, Yoav Freund, Ryan Kastner
2014	J	`jnl`	Leveraging Gate-Level Properties to Identify Hardware Timing Channels. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jason Oberg, Sarah Meiklejohn, Timothy Sherwood, Ryan Kastner
2014	J	`jnl`	Networks on Chip with Provable Security Properties. IEEE Micro Hassan M. G. Wassel, Ying Gao, Jason K. Oberg, Ted Huffmire, Ryan Kastner, Frederic T. Chong, Timothy Sherwood
2014	—	`conf`	Real-time 3D reconstruction for FPGAs: A case study for evaluating the performance, area, and programmability trade-offs of the Altera OpenCL SDK. FPT Quentin Gautier, Alexandria Shearer, Janarbek Matai, Dustin Richmond, Pingfan Meng, Ryan Kastner
2014	A*	`conf`	Sapper: a language for hardware-level security policy enforcement. ASPLOS Xun Li, Vineeth Kashyap, Jason K. Oberg, Mohit Tiwari, Vasanth Ram Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, Frederic T. Chong
2014	B	`conf`	Small Unmanned Aerial Vehicle System for Wildlife Radio Collar Tracking. MASS Gilberto Antonio Marcon dos Santos, Zachary Barnes, Eric Lo, Bryan Ritoper, Lauren Nishizaki, Xavier Tejeda, Alex Ke, Han Lin, Curt Schurgers, Albert Lin, Ryan Kastner
2013	J	`jnl`	A 3-D Split Manufacturing Approach to Trustworthy System Development. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Jonathan Valamehr, Timothy Sherwood, Ryan Kastner, David Marangoni-Simonsen, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin
2013	B	`conf`	A FPGA design for high speed feature extraction from a compressed measurement stream. FPL Dustin Richmond, Ryan Kastner, Ali Irturk, John McGarry
2013	B	`conf`	A hardware accelerated approach for imaging flow cytometry. FPL Dajung Lee, Pingfan Meng, Matthew Jacobsen, Henry Tse, Dino Di Carlo, Ryan Kastner
2013	—	`conf`	A low-power Adaboost-based object detection processor using Haar-like features. ICCE-Berlin Motoki Kimura, Janarbek Matai, Matthew Jacobsen, Ryan Kastner
2013	A	`conf`	A practical testing framework for isolating hardware timing channels. DATE Jason Oberg, Sarah Meiklejohn, Timothy Sherwood, Ryan Kastner
2013	J	`jnl`	A software-based dynamic-warp scheduling approach for load-balancing the Viola-Jones face detection algorithm on GPUs. J. Parallel Distributed Comput. Tan Nguyen, Daniel Hefenbrock, Jason Oberg, Ryan Kastner, Scott B. Baden
2013	—	`ed.`	Conference on Underwater Networks and Systems, WUWNet 2013, Kaohsiung, Taiwan, November 11-13, 2013 WUWNet T. C. Yang, David H. C. Du, Jianguo Huang, Payman Arabshahi, Ryan Kastner, Wen Xu
2013	J	`jnl`	Design of a Reconfigurable Acoustic Modem for Underwater Sensor Networks. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Lingjuan Wu, Ryan Kastner, Bo Gu, Dunshan Yu
2013	J	`jnl`	Eliminating Timing Information Flows in a Mix-Trusted System-on-Chip. IEEE Des. Test Jason Oberg, Timothy Sherwood, Ryan Kastner
2013	J	`jnl`	Expanding Gate Level Information Flow Tracking for Multilevel Security. IEEE Embed. Syst. Lett. Wei Hu, Jason Oberg, Janet Barrientos, Dejun Mu, Ryan Kastner
2013	—	`conf`	Joint time synchronization and tracking for mobile underwater systems. WUWNet Jinwang Yi, Diba Mirza, Curt Schurgers, Ryan Kastner
2013	—	`conf`	Position paper: Sapper - a language for provable hardware policy enforcement. PLAS Xun Li, Vineeth Kashyap, Jason K. Oberg, Mohit Tiwari, Vasanth Ram Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, Frederic T. Chong
2013	B	`conf`	RIFFA 2.0: A reusable integration framework for FPGA accelerators. FPL Matthew Jacobsen, Ryan Kastner
2013	A*	`conf`	SurfNoC: a low latency and provably non-interfering approach to secure networks-on-chip. ISCA Hassan M. G. Wassel, Ying Gao, Jason Oberg, Ted Huffmire, Ryan Kastner, Frederic T. Chong, Timothy Sherwood
2012	—	`conf`	A Qualitative Security Analysis of a New Class of 3-D Integrated Crypto Co-processors. Cryptography and Security Jonathan Valamehr, Ted Huffmire, Cynthia E. Irvine, Ryan Kastner, Çetin Kaya Koç, Timothy E. Levin, Timothy Sherwood
2012	—	`conf`	Circuit Primitives for Monitoring Information Flow and Enabling Redundancy. Haifa Verification Conference Ryan Kastner
2012	—	`conf`	Designing a hardware in the loop wireless digital channel emulator for software defined radio. FPT Janarbek Matai, Pingfan Meng, Lingjuan Wu, Brad T. Weals, Ryan Kastner
2012	J	`jnl`	Designing an Adaptive Acoustic Modem for Underwater Sensor Networks. IEEE Embed. Syst. Lett. Lingjuan Wu, Jennifer Trezzo, Diba Mirza, Paul L. D. Roberts, Jules S. Jaffe, Yangyuan Wang, Ryan Kastner
2012	—	`conf`	FPGA-GPU-CPU heterogenous architecture for real-time cardiac physiological optical mapping. FPT Pingfan Meng, Matthew Jacobsen, Ryan Kastner
2012	—	`conf`	GPU acceleration of optical mapping algorithm for cardiac electrophysiology. EMBC Pingfan Meng, Ali Irturk, Ryan Kastner, Andrew D. McCulloch, Jeffrey H. Omens, Adam Wright
2012	J	`jnl`	On the Complexity of Generating Gate Level Information Flow Tracking Logic. IEEE Trans. Inf. Forensics Secur. Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, Ryan Kastner
2012	Misc	`conf`	RIFFA: A Reusable Integration Framework for FPGA Accelerators. FCCM Matthew Jacobsen, Yoav Freund, Ryan Kastner
2012	—	`conf`	Real-time collaborative tracking for underwater networked systems. WUWNet Diba Mirza, Curt Schurgers, Ryan Kastner
2012	—	`conf`	Sensor platforms for multimodal underwater monitoring. IGCC Ryan Kastner, Albert Lin, Curt Schurgers, Jules S. Jaffe, Peter Franks, Brent S. Stewart
2012	A	`conf`	Simultaneous information flow security and circuit redundancy in Boolean gates. ICCAD Wei Hu, Jason Oberg, Dejun Mu, Ryan Kastner
2011	A*	`conf`	Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security. ISCA Mohit Tiwari, Jason Oberg, Xun Li, Jonathan Valamehr, Timothy E. Levin, Ben Hardekopf, Ryan Kastner, Frederic T. Chong, Timothy Sherwood
2011	Misc	`conf`	Design and Implementation of an FPGA-Based Real-Time Face Recognition System. FCCM Janarbek Matai, Ali Irturk, Ryan Kastner
2011	A*	`conf`	Information flow isolation in I2C and USB. DAC Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner
2011	J	`jnl`	Integrating Embedded Computing Systems Into High School and Early Undergraduate Education. IEEE Trans. Educ. Bridget Benson, Arash Arfaee, Choon Kim, Ryan Kastner, Rajesh K. Gupta
2011	—	`conf`	JBoost Optimization of Color Detectors for Autonomous Underwater Vehicle Navigation. CAIP (2) Christopher Barngrover, Serge J. Belongie, Ryan Kastner
2011	J	`jnl`	Simulate and Eliminate: A Top-to-Bottom Design Methodology for Automatic Generation of Application Specific Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ali Irturk, Janarbek Matai, Jason Oberg, Jeffrey Su, Ryan Kastner
2011	J	`jnl`	Theoretical Fundamentals of Gate Level Information Flow Tracking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wei Hu, Jason Oberg, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Dejun Mu, Ryan Kastner
2010	Misc	`conf`	Accelerating Viola-Jones Face Detection to FPGA-Level Using GPUs. FCCM Daniel Hefenbrock, Jason Oberg, Nhat Thanh, Ryan Kastner, Scott B. Baden
2010	—	`conf`	Channel Equalization Based on Data Reuse LMS Algorithm for Shallow Water Acoustic Communication. SUTC/UMC Feng Tong, Bridget Benson, Ying Li, Ryan Kastner
2010	J	`jnl`	Design of a Low-Cost Underwater Acoustic Modem. IEEE Embed. Syst. Lett. Bridget Benson, Ying Li, Brian Faunce, Kenneth Domond, Don Kimball, Curt Schurgers, Ryan Kastner
2010	B	`conf`	Field Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications. FPL Deborah Goshorn, Junguk Cho, Ryan Kastner, Shahnam Mirzaei
2010	J	`jnl`	GUSTO: An automatic generation and optimization tool for matrix inversion architectures. ACM Trans. Embed. Comput. Syst. Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner
2010	—	`conf`	Hardware Implementation of Symbol Synchronization for Underwater FSK. SUTC/UMC Ying Li, Xing Zhang, Bridget Benson, Ryan Kastner
2010	A	`conf`	Hardware assistance for trustworthy systems through 3-D integration. ACSAC Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin
2010	—	`conf`	Hardware trust implications of 3-D integration. WESS Ted Huffmire, Timothy E. Levin, Michael Bilzor, Cynthia E. Irvine, Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner
2010	Misc	`conf`	Increased Performace of FPGA-Based Color Classification System. FCCM Junguk Cho, Bridget Benson, Sunsern Cheamanunkul, Ryan Kastner
2010	J	`jnl`	Layout Aware Optimization of High Speed Fixed Coefficient FIR Filters for FPGAs. Int. J. Reconfigurable Comput. Shahnam Mirzaei, Ryan Kastner, Anup Hosangadi
2010	—	`conf`	R&D of a dual mode acoustic modem testbed for shallow water channels. WUWNet Feng Tong, Shengyong Zhou, Bridget Benson, Ryan Kastner
2010	J	`jnl`	Security Primitives for Reconfigurable Hardware-Based Systems. ACM Trans. Reconfigurable Technol. Syst. Ted Huffmire, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner
2010	A*	`conf`	Theoretical analysis of gate level information flow tracking. DAC Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner
2009	B	`conf`	Architectural optimization of decomposition algorithms for wireless communication systems. WCNC Ali Irturk, Bridget Benson, Nikolay Laptev, Ryan Kastner
2009	—	`conf`	Bit Error Rate, Power and Area Analysis of Multiple FPGA Implementations of Underwater FSK. ERSA Ying Li, Bridget Benson, Ryan Kastner, Xing Zhang
2009	A	`conf`	Energy benefits of reconfigurable hardware for use in underwater sensor nets. IPDPS Bridget Benson, Ali Irturk, Junguk Cho, Ryan Kastner
2009	A	`conf`	Fpga-based face detection system using Haar classifiers. FPGA Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kastner
2009	—	`conf`	Hardware acceleration of multi-view face detection. SASP Junguk Cho, Bridget Benson, Ryan Kastner
2009	—	`conf`	Integrating embedded computing systems into high school and early undergraduate education. MSE Bridget Benson, Arash Arfaee, Choon Kim, Ryan Kastner, Rajesh Gupta
2009	—	`conf`	Parallelized Architecture of Multiple Classifiers for Face Detection. ASAP Junguk Cho, Bridget Benson, Shahnam Mirzaei, Ryan Kastner
2009	A*	`conf`	Xquasher: a tool for efficient computation of multiple linear expressions. DAC Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan Fallah, Ryan Kastner
2008	—	`conf`	An FPGA Design Space Exploration Tool for Matrix Inversion Architectures. SASP Ali Irturk, Bridget Benson, Shahnam Mirzaei, Ryan Kastner
2008	—	`conf`	Automatic generation of decomposition based matrix inversion architectures. FPT Ali Irturk, Bridget Benson, Arash Arfaee, Ryan Kastner
2008	—	`conf`	Design space exploration of a cooperative MIMO receiver for reconfigurable architectures. ASAP Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T. Weals, Richard E. Cagley
2008	J	`jnl`	Designing secure systems on reconfigurable hardware. ACM Trans. Design Autom. Electr. Syst. Ted Huffmire, Brett Brotherton, Nick Callegari, Jonathan Valamehr, Jeff White, Ryan Kastner, Timothy Sherwood
2008	J	`jnl`	Enforcing memory policy specifications in reconfigurable hardware. Comput. Secur. Ted Huffmire, Timothy Sherwood, Ryan Kastner, Timothy E. Levin
2008	J	`jnl`	Managing Security in FPGA-Based Embedded Systems. IEEE Des. Test Comput. Ted Huffmire, Brett Brotherton, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine
2008	—	`conf`	Survey of hardware platforms for an energy efficient implementation of matching pursuits algorithm for shallow water networks. Underwater Networks Bridget Benson, Ali Irturk, Junguk Cho, Ryan Kastner
2008	—	`conf`	Threats and Challenges in Reconfigurable Hardware Security. ERSA Ryan Kastner, Ted Huffmire
2008	—	`conf`	Trustworthy System Security through 3-D Integrated Hardware. HOST Ted Huffmire, Jonathan Valamehr, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine
2007	—	`conf`	A pageable, defect-tolerant nanoscale memory system. NANOARCH Susmit Biswas, Frederic T. Chong, Tzvetan S. Metodi, Ryan Kastner
2007	J	`jnl`	Algebraic Methods for Optimizing Constant Multiplications in Linear Systems. J. VLSI Signal Process. Anup Hosangadi, Farzan Fallah, Ryan Kastner
2007	J	`jnl`	Ant Colony Optimizations for Resource- and Timing-Constrained Operation Scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner
2007	A	`conf`	Combining static and dynamic defect-tolerance techniques for nanoscale memory systems. ICCAD Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan Kastner, Frederic T. Chong
2007	J	`jnl`	Exploring time/resource trade-offs by solving dual scheduling problems with the ant colony optimization. ACM Trans. Design Autom. Electr. Syst. Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner
2007	B	`conf`	Implementation of the Alamouti OSTBC to a Distributed Set of Single-Antenna Wireless Nodes. WCNC Richard E. Cagley, Brad T. Weals, Scott A. McNally, Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner
2007	—	`conf`	Moats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems. S&P Ted Huffmire, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine
2006	J	`jnl`	Application partitioning on programmable platforms using the ant colony optimization. J. Embed. Comput. Gang Wang, Wenrui Gong, Ryan Kastner
2006	B	`conf`	Carrier Offset and Channel Estimation for Cooperative MIMO Sensor Networks. GLOBECOM Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner, Richard E. Cagley, Brad T. Weals
2006	Misc	`conf`	Defect-Tolerant Nanocomputing Using Bloom Filters. FCCM Gang Wang, Wenrui Gong, Ryan Kastner
2006	—	`conf`	Design of a low-cost acoustic modem for moored oceanographic applications. Underwater Networks Bridget Benson, Grace Chang, Derek Manov, Brian Graham, Ryan Kastner
2006	A*	`conf`	Design space exploration using time and resource duality with the ant colony optimization. DAC Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner
2006	C	`conf`	FPGA Implementation of High Speed FIR Filters Using Add and Shift Method. ICCD Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner
2006	A	`conf`	High speed FIR filter implementation using add and shift method. FPGA Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner
2006	A	`conf`	Layout driven data communication optimization for high level synthesis. DATE Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh
2006	A*	`conf`	Leakage power reduction of embedded memories on FPGAs through location assignment. DAC Yan Meng, Timothy Sherwood, Ryan Kastner
2006	A	`conf`	On the use of Bloom filters for defect maps in nanocomputing. ICCAD Gang Wang, Wenrui Gong, Ryan Kastner
2006	J	`jnl`	Optimizing Polynomial Expressions by Algebraic Factorization and Common Subexpression Elimination. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Anup Hosangadi, Farzan Fallah, Ryan Kastner
2006	A	`conf`	Optimizing high speed arithmetic circuits using three-term extraction. DATE Anup Hosangadi, Farzan Fallah, Ryan Kastner
2006	A	`conf`	Policy-Driven Memory Protection for Reconfigurable Hardware. ESORICS Ted Huffmire, Shreyas Prasad, Timothy Sherwood, Ryan Kastner
2006	J	`jnl`	Statistical Analysis and Design of HARP FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gang Wang, Satish Sivaswamy, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Elaheh Bozorgzadeh
2005	J	`jnl`	A scheduling algorithm for optimization and early planning in high-level synthesis. ACM Trans. Design Autom. Electr. Syst. Seda Ogrenci Memik, Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2005	J	`jnl`	Algorithm/Architecture Co-exploration for Designing Energy Efficient Wireless Channel Estimator. J. Low Power Electron. Yan Meng, Wenrui Gong, Ryan Kastner, Timothy Sherwood
2005	—	`conf`	Data Partitioning and Optimizations for Reconfigurable Architectures. ERSA Wenrui Gong, Yan Meng, Gang Wang, Ryan Kastner, Timothy Sherwood
2005	B	`conf`	Efficient distributed algorithms for data fusion and node localization in mobile ad-hoc networks. MASS Andrew P. Brown, Ronald A. Iltis, Ryan Kastner
2005	Misc	`conf`	Energy Efficient Hardware Synthesis of Polynomial Expressions. VLSI Design Anup Hosangadi, Farzan Fallah, Ryan Kastner
2005	J	`jnl`	Exploring the limits of leakage power reduction in caches. ACM Trans. Archit. Code Optim. Yan Meng, Timothy Sherwood, Ryan Kastner
2005	A	`conf`	HARP: hard-wired routing pattern FPGAs. FPGA Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Eli Bozorgzadeh
2005	—	`conf`	Instruction scheduling using ACM Great Lakes Symposium on VLSI Gang Wang, Wenrui Gong, Ryan Kastner
2005	A*	`conf`	MP core: algorithm and design techniques for efficient channel estimation in wireless applications. DAC Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timothy Sherwood, Hua Lee, Ryan Kastner
2005	A*	`conf`	On the Limits of Leakage Power Reduction in Caches. HPCA Yan Meng, Timothy Sherwood, Ryan Kastner
2005	—	`conf`	Reducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions. ASP-DAC Anup Hosangadi, Farzan Fallah, Ryan Kastner
2005	A	`conf`	Storage assignment during high-level synthesis for configurable architectures. ICCAD Wenrui Gong, Gang Wang, Ryan Kastner
2004	—	`conf`	A High Performance Application Representation for Reconfigurable Systems. ERSA Wenrui Gong, Gang Wang, Ryan Kastner
2004	—	`conf`	Common Subexpression Elimination Involving Multiple Variables for Linear DSP Synthesis. ASAP Anup Hosangadi, Farzan Fallah, Ryan Kastner
2004	A	`conf`	Factoring and eliminating common subexpressions in polynomial expressions. ICCAD Anup Hosangadi, Farzan Fallah, Ryan Kastner
2004	J	`jnl`	Timing driven gate duplication. IEEE Trans. Very Large Scale Integr. Syst. Ankur Srivastava, Ryan Kastner, Chunhong Chen, Majid Sarrafzadeh
2003	J	`jnl`	Congestion reduction during placement with provably good approximation bound. ACM Trans. Design Autom. Electr. Syst. Xiaojian Yang, Maogang Wang, Ryan Kastner, Soheil Ghiasi, Majid Sarrafzadeh
2003	J	`jnl`	Creating and exploiting flexibility in rectilinear Steiner trees. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh
2003	A*	`conf`	Data communication estimation and reduction for reconfigurable systems. DAC Adam Kaplan, Philip Brisk, Ryan Kastner
2002	J	`jnl`	Congestion estimation during top-down placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh
2002	Misc	`conf`	Instruction generation and regularity extraction for reconfigurable processors. CASES Philip Brisk, Adam Kaplan, Ryan Kastner, Majid Sarrafzadeh
2002	J	`jnl`	Instruction generation for hybrid reconfigurable systems. ACM Trans. Design Autom. Electr. Syst. Ryan Kastner, Adam Kaplan, Seda Ogrenci Memik, Elaheh Bozorgzadeh
2002	—	`conf`	On the Sensitivity of Incremental Algorithms for Combinatorial Auctions. WECWIS Ryan Kastner, Christina Hsieh, Miodrag Potkonjak, Majid Sarrafzadeh
2002	J	`jnl`	Pattern routing: use and theory for increasing predictability andavoiding coupling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2001	A	`conf`	A Super-Scheduler for Embedded Reconfigurable Systems. ICCAD Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh
2001	—	`conf`	An exact algorithm for coupling-free routing. ISPD Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2001	A	`conf`	Congestion Reduction During Placement Based on Integer Programming. ICCAD Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh
2001	—	`conf`	Congestion estimation during top-down placement. ISPD Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh
2001	A*	`conf`	Creating and Exploiting Flexibility in Steiner Trees. DAC Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh
2001	—	`conf`	Design and analysis of physical design algorithms. ISPD Majid Sarrafzadeh, Elaheh Bozorgzadeh, Ryan Kastner, Ankur Srivastava
2001	A	`conf`	Instruction Generation for Hybrid Reconfigurable Systems. ICCAD Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2001	J	`jnl`	On the complexity of gate duplication. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh
2000	J	`jnl`	3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. Des. Autom. Embed. Syst. Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh
2000	Misc	`conf`	A C to Hardware/Software Compiler. FCCM Kia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh
2000	J	`jnl`	Fast Template Placement for Reconfigurable Computing Systems. IEEE Des. Test Comput. Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh
2000	A	`conf`	Predictable Routing. ICCAD Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2000	A	`conf`	Timing Driven Gate Duplication: Complexity Issues and Algorithms. ICCAD Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh
1999	C	`conf`	3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems. IEEE International Workshop on Rapid System Prototyping Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh