Ryan Huang - RankMe

12 papers Journal 9Unranked 3

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Atomic Information Flow: A Network Flow Model for Tool Attributions in RAG Systems. CoRR James Gao, Josh Zhou, Qi Sun, Ryan Huang, Steven Yoo
2026	J	`jnl`	Resilient Infrastructures via Digital Unification. Commun. ACM Ang Chen, Sylvia Ratnasamy, Mohammad Alizadeh, Mosharaf Chowdhury, Seth D. Guikema, Ryan Huang, Suresh Jagannathan, Branko Kerkez, Edward A. Lee, Steven Low, Morley Mao, Johanna Mathieu, Michael K. Reiter, Xinyu Wang, Vinton G. Cerf
2020	J	`jnl`	Observations on Porting In-memory KV stores to Persistent Memory. CoRR Brian Choi, Parv Saxena, Ryan Huang, Randal C. Burns
2017	J	`jnl`	Dynamic Data-Dependent Reference to Improve Sense Margin and Speed of Magnetoresistive Random Access Memory. IEEE Trans. Circuits Syst. II Express Briefs Xiaoyong Xue, Yarong Fu, Yanqing Zhao, Juan Xu, Jianguo Yang, Yufeng Xie, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu
2016	J	`jnl`	A Logic Resistive Memory Chip for Embedded Key Storage With Physical Security. IEEE Trans. Circuits Syst. II Express Briefs Yufeng Xie, Xiaoyong Xue, Jianguo Yang, Yinyin Lin, Qingtian Zou, Ryan Huang, Jingang Wu
2016	J	`jnl`	A self-adaptive write driver with fast termination of step-up pulse for ReRAM. IEICE Electron. Express Jianguo Yang, Xiaoyong Xue, Juan Xu, Fan Ye, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu
2016	J	`jnl`	Low-Power Variation-Tolerant Nonvolatile Lookup Table Design. IEEE Trans. Very Large Scale Integr. Syst. Xiaoyong Xue, Jianguo Yang, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu
2015	—	`conf`	A low cost and high reliability true random number generator based on resistive random access memory. ASICON Jianguo Yang, Juan Xu, Bo Wang, Xiaoyong Xue, Ryan Huang, Qingtian Zou, Jingang Wu, Yinyin Lin
2013	J	`jnl`	A 0.13 µm 8 Mb Logic-Based Cu IEEE J. Solid State Circuits Xiaoyong Xue, Wenxiang Jian, Jianguo Yang, Fanjie Xiao, Gang Chen, Shuliu Xu, Yufeng Xie, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu
2013	—	`conf`	A 2Mb ReRAM with two bits error correction codes circuit for high reliability application. ASICON Jianguo Yang, Ying Meng, Xiaoyong Xue, Ryan Huang, Q. T. Zhou, J. G. Wu, Yinyin Lin
2013	—	`conf`	Novel operation scheme and technological optimization for 1T bulk capacitor-less DRAM. ASICON Hui Li, Wei Zhu, Ningxi Liu, Cunlin Dong, Chao Meng, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu
2012	J	`jnl`	Variation-tolerant Cu IEICE Electron. Express Wenxiang Jian, Gang Jin, Na Yan, Zhongyu Bi, Hao Min, Yinyin Lin, Ryan Huang, Qingtian Zou, Jingang Wu