Russell Tessier

157 papers A* 5A 23B 14C 9Misc 15Journal 55Unranked 34
YearRankTypeTitle / Venue / Authors
2025 J jnl
Diwall: A Lightweight Host Intrusion Detection System Against Jamming and Packet Injection Attacks.
ACM Trans. Embed. Comput. Syst.
Mohamed El Bouazzati, Philippe A. Tanguy, Guy Gogniat, Russell Tessier
2025 — conf
Managing Computation Offloading from Edge Devices to a Reconfigurable Edge Cloud.
ASAP
Zhehang Zhang, Bharadwaj Madabhushi, Sandip Kundu, Russell Tessier
2024 C conf
First Results From a Dual Ku- and C-Band Airborne SAR for Snowpack Measurements.
IGARSS
Marc Closa Tarrés, Paul Siqueira, J. Max Adam, Eric Sutherland, Joseph Maloyan, Takuya Seaver, Russell Tessier, Leung Tsang, Firoh Borah, HP Marshall, Elias Deeb, Gordon Farquharson
2024 J jnl
On the Malicious Potential of Xilinx's Internal Configuration Access Port (ICAP).
ACM Trans. Reconfigurable Technol. Syst.
Nils Albartus, Maik Ender, Jan-Niklas Möller, Marc Fyrbiak, Christof Paar, Russell Tessier
2024 B conf
Reliability and Security of AI Hardware.
ETS
Dennis Gnad, Martin Gotthard, Jonas Krautter, Angeliki Kritikakou, Vincent Meyers, Paolo Rech, Josie E. Rodriguez Condia, Annachiara Ruospo, Ernesto Sánchez, Fernando Fernandes dos Santos, Olivier Sentieys, Mehdi B. Tahoori, Russell Tessier, Marcello Traiola
2024 C conf
SNOWWI: A Three-Frequency InSAR for Snow Science Applications.
IGARSS
Paul Siqueira, Marc Closa Tarrés, Max Adam, Eric Sutherland, Joseph Maloyan, Takuya Seaver, Russell Tessier, Leung Tsang, Firoz Kanti Borah, H. P. Marshall, Elias Deeb, Gordon Farquharson
2024 — conf
Security Risks Due to Data Persistence in Cloud FPGA Platforms.
MWSCAS
Zhehang Zhang, Bharadwaj Madabhushi, Sandip Kundu, Russell Tessier
2024 J jnl
Security Risks Due to Data Persistence in Cloud FPGA Platforms.
CoRR
Zhehang Zhang, Bharadwaj Madabhushi, Sandip Kundu, Russell Tessier
2023 C conf
A Lightweight Intrusion Detection System against IoT Memory Corruption Attacks.
DDECS
Mohamed El Bouazzati, Russell Tessier, Philippe A. Tanguy, Guy Gogniat
2023 A conf
A Practical Remote Power Attack on Machine Learning Accelerators in Cloud FPGAs.
DATE
Shanquan Tian, Shayan Moini, Daniel E. Holcomb, Russell Tessier, Jakub Szefer
2023 J jnl
A Visionary Look at the Security of Reconfigurable Cloud Computing.
Proc. IEEE
Mirjana Stojilovic, Kasper Rasmussen, Francesco Regazzoni, Mehdi B. Tahoori, Russell Tessier
2023 — conf
Fault Recovery from Multi-Tenant FPGA Voltage Attacks.
ACM Great Lakes Symposium on VLSI
Shayan Moini, Dhruv Kansagara, Daniel E. Holcomb, Russell Tessier
2023 J jnl
Jitter-based Adaptive True Random Number Generation Circuits for FPGAs in the Cloud.
ACM Trans. Reconfigurable Technol. Syst.
Xiang Li, Peter Stanwicks, George Provelengios, Russell Tessier, Daniel E. Holcomb
2023 — conf
On the Malicious Potential of Xilinx' Internal Configuration Access Port (ICAP).
ICFPT
Nils Albartus, Maik Ender, Jan-Niklas Möller, Marc Fyrbiak, Christof Paar, Russell Tessier
2023 J jnl
Voltage Sensor Implementations for Remote Power Attacks on FPGAs.
ACM Trans. Reconfigurable Technol. Syst.
Shayan Moini, Aleksa Deric, Xiang Li, George Provelengios, Wayne P. Burleson, Russell Tessier, Daniel E. Holcomb
2022 Misc conf
Precise Fault Injection to Enable DFIA for Attacking AES in Remote FPGAs.
FCCM
Xiang Li, Russell Tessier, Daniel E. Holcomb
2022 J jnl
The Future of FPGA Acceleration in Datacenters and the Cloud.
ACM Trans. Reconfigurable Technol. Syst.
Christophe Bobda, Joel Mandebi Mbongue, Paul Chow, Mohammad Ewais, Naif Tarafdar, Juan Camilo Vega, Ken Eguro, Dirk Koch, Suranga Handagala, Miriam Leeser, Martin C. Herbordt, Hafsah Shahzad, H. Peter Hofstee, Burkhard Ringlein, Jakub Szefer, Ahmed Sanaullah, Russell Tessier
2021 J jnl
LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security.
IACR Cryptol. ePrint Arch.
Florian Stolz, Nils Albartus, Julian Speith, Simon Klix, Clemens Nasenberg, Aiden Gula, Marc Fyrbiak, Christof Paar, Tim Güneysu, Russell Tessier
2021 J jnl
LifeLine for FPGA Protection: Obfuscated Cryptography for Real-World Security.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Florian Stolz, Nils Albartus, Julian Speith, Simon Klix, Clemens Nasenberg, Aiden Gula, Marc Fyrbiak, Christof Paar, Tim Güneysu, Russell Tessier
2021 A* conf
On the Design and Misuse of Microcoded (Embedded) Processors - A Cautionary Note.
USENIX Security Symposium
Nils Albartus, Clemens Nasenberg, Florian Stolz, Marc Fyrbiak, Christof Paar, Russell Tessier
2021 J jnl
On the Design and Misuse of Microcoded (Embedded) Processors - A Cautionary Note.
IACR Cryptol. ePrint Arch.
Nils Albartus, Clemens Nasenberg, Florian Stolz, Marc Fyrbiak, Christof Paar, Russell Tessier
2021 J jnl
Power Side-Channel Attacks on BNN Accelerators in Remote FPGAs.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Shayan Moini, Shanquan Tian, Daniel E. Holcomb, Jakub Szefer, Russell Tessier
2021 Misc conf
Remote Power Attacks on the Versatile Tensor Accelerator in Multi-Tenant FPGAs.
FCCM
Shanquan Tian, Shayan Moini, Adam Wolnikowski, Daniel E. Holcomb, Russell Tessier, Jakub Szefer
2021 A conf
Remote Power Side-Channel Attacks on BNN Accelerators in FPGAs.
DATE
Shayan Moini, Shanquan Tian, Daniel E. Holcomb, Jakub Szefer, Russell Tessier
2020 J jnl
CoNFV: A Heterogeneous Platform for Scalable Network Function Virtualization.
ACM Trans. Reconfigurable Technol. Syst.
Xuzhi Zhang, Xiaozhe Shao, George Provelengios, Naveen Kumar Dumpala, Lixin Gao, Russell Tessier
2020 — conf
Jitter-based Adaptive True Random Number Generation for FPGAs in the Cloud.
FPT
Xiang Li, Peter Stanwicks, George Provelengios, Russell Tessier, Daniel E. Holcomb
2020 C conf
NestedNet: A Container-based Prototyping Tool for Hierarchical Software Defined Networks.
RSP
Xuzhi Zhang, Narendra Prabhu, Russell Tessier
2020 J jnl
Power Distribution Attacks in Multitenant FPGAs.
IEEE Trans. Very Large Scale Integr. Syst.
George Provelengios, Daniel E. Holcomb, Russell Tessier
2020 B conf
Power Wasting Circuits for Cloud FPGA Attacks.
FPL
George Provelengios, Daniel E. Holcomb, Russell Tessier
2020 J jnl
Remote Power Side-Channel Attacks on CNN Accelerators in FPGAs.
CoRR
Shayan Moini, Shanquan Tian, Jakub Szefer, Daniel E. Holcomb, Russell Tessier
2020 — conf
Service Chaining for Heterogeneous Middleboxes.
FPT
Xuzhi Zhang, Russell Tessier
2020 — conf
Understanding and Comparing the Capabilities of On-Chip Voltage Sensors against Remote Power Attacks on FPGAs.
MWSCAS
Shayan Moini, Xiang Li, Peter Stanwicks, George Provelengios, Wayne P. Burleson, Russell Tessier, Daniel E. Holcomb
2019 A conf
Characterization of Long Wire Data Leakage in Deep Submicron FPGAs.
FPGA
George Provelengios, Chethan Ramesh, Shivukumar B. Patil, Ken Eguro, Russell Tessier, Daniel E. Holcomb
2019 B conf
Characterizing Power Distribution Attacks in Multi-User FPGA Environments.
FPL
George Provelengios, Daniel E. Holcomb, Russell Tessier
2019 C conf
Closed-Loop Proportion-Derivative Control of Suppressing Seizures in a Neural Mass Model.
ISCAS
Lijuan Xia, Ahmed Soltan, Xuzhi Zhang, Andrew Jackson, Russell Tessier, Patrick Degenaar
2019 J jnl
Efficient PUF-Based Key Generation in FPGAs Using Per-Device Configuration.
IEEE Trans. Very Large Scale Integr. Syst.
Mohammad A. Usmani, Shahrzad Keshavarz, Eric Matthews, Lesley Shannon, Russell Tessier, Daniel E. Holcomb
2019 J jnl
HAL - The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion.
IEEE Trans. Dependable Secur. Comput.
Marc Fyrbiak, Sebastian Wallat, Pawel Swierczynski, Max Hoffmann, Sebastian Hoppach, Matthias Wilhelm, Tobias Weidlich, Russell Tessier, Christof Paar
2019 J jnl
Introduction to the Special Section on Security in FPGA-accelerated Cloud and Datacenters.
ACM Trans. Reconfigurable Technol. Syst.
Christophe Bobda, Russell Tessier, Ken Eguro, Ryan Kastner
2019 J jnl
Loop Unrolling for Energy Efficiency in Low-Cost Field-Programmable Gate Arrays.
ACM Trans. Reconfigurable Technol. Syst.
Naveen Kumar Dumpala, Shivukumar B. Patil, Daniel E. Holcomb, Russell Tessier
2019 J jnl
On the Difficulty of FSM-based Hardware Obfuscation.
IACR Cryptol. ePrint Arch.
Marc Fyrbiak, Sebastian Wallat, Jonathan Déchelotte, Nils Albartus, Sinan Böcker, Russell Tessier, Christof Paar
2018 Misc conf
A Bandwidth-Optimized Routing Algorithm for Hybrid FPGA Networks-on-Chip.
FCCM
Shivukumar B. Patil, Tianqi Liu, Russell Tessier
2018 — conf
A Hardware Monitor to Protect Linux System Calls.
ISVLSI
George Provelengios, Arman Pouraghily, Russell Tessier, Tilman Wolf
2018 Misc conf
FPGA Side Channel Attacks without Physical Access.
FCCM
Chethan Ramesh, Shivukumar B. Patil, Siva Nishok Dhanuskodi, George Provelengios, Sébastien Pillement, Daniel E. Holcomb, Russell Tessier
2018 J jnl
Hybrid Obfuscation to Protect Against Disclosure Attacks on Embedded Microprocessors.
IEEE Trans. Computers
Marc Fyrbiak, Simon Rokicki, Nicolai Bissantz, Russell Tessier, Christof Paar
2018 B conf
Lynq: A Lightweight Software Layer for Rapid SoC FPGA Prototyping.
FPL
Jonathan Déchelotte, Russell Tessier, Dominique Dallet, Jérémie Crenne
2018 J jnl
On the Difficulty of FSM-based Hardware Obfuscation.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Marc Fyrbiak, Sebastian Wallat, Jonathan Déchelotte, Nils Albartus, Sinan Böcker, Russell Tessier, Christof Paar
2017 J jnl
A High-Speed Accelerator for Homomorphic Encryption using the Karatsuba Algorithm.
ACM Trans. Embed. Comput. Syst.
Vincent Migliore, Cédric Seguin, Maria Mendez Real, Vianney Lapotre, Arnaud Tisserand, Caroline Fontaine, Guy Gogniat, Russell Tessier
2017 Misc conf
Energy Efficient Loop Unrolling for Low-Cost FPGAs.
FCCM
Naveen Kumar Dumpala, Shivukumar B. Patil, Daniel E. Holcomb, Russell Tessier
2017 J jnl
HAL- The Missing Piece of the Puzzle for Hardware Reverse Engineering, Trojan Detection and Insertion.
IACR Cryptol. ePrint Arch.
Marc Fyrbiak, Sebastian Wallat, Pawel Swierczynski, Max Hoffmann, Sebastian Hoppach, Matthias Wilhelm, Tobias Weidlich, Russell Tessier, Christof Paar
2017 — conf
Hardware support for embedded operating system security.
ASAP
Arman Pouraghily, Tilman Wolf, Russell Tessier
2017 Misc conf
Scalable Network Function Virtualization for Heterogeneous Middleboxes.
FCCM
Xuzhi Zhang, Xiaozhe Shao, George Provelengios, Naveen Kumar Dumpala, Lixin Gao, Russell Tessier
2016 J jnl
Dynamic Hardware Monitors for Network Processor Protection.
IEEE Trans. Computers
Kekai Hu, Harikrishnan Kumarapillai Chandrikakutty, Zachary Goodman, Russell Tessier, Tilman Wolf
2016 B conf
Effects of I/O routing through column interfaces in embedded FPGA fabrics.
FPL
Christophe Huriaux, Olivier Sentieys, Russell Tessier
2016 — conf
Hybrid hard NoCs for efficient FPGA communication.
FPT
Tianqi Liu, Naveen Kumar Dumpala, Russell Tessier
2016 B conf
Improving the efficiency of PUF-based key generation in FPGAs using variation-aware placement.
FPL
Shrikant Vyas, Naveen Kumar Dumpala, Russell Tessier, Daniel E. Holcomb
2016 J jnl
Soft GPGPUs for Embedded FPGAs: An Architectural Evaluation.
CoRR
Kevin Andryc, Tedy Thomas, Russell Tessier
2015 B conf
Adaptive MRAM-based CGRAs.
FPL
Xiaobin Liu, Tedy Thomas, Alan Boguslawski, Russell Tessier
2015 A conf
Hardware-assisted code obfuscation for FPGA soft microprocessors.
DATE
Meha Kainth, Lekshmi Krishnan, Chaitra Narayana, Sandesh Gubbi Virupaksha, Russell Tessier
2015 — conf
Multi-task support for security-enabled embedded processors.
ASAP
Tedy Thomas, Arman Pouraghily, Kekai Hu, Russell Tessier, Tilman Wolf
2015 Misc conf
Protecting against Cryptographic Trojans in FPGAs.
FCCM
Pawel Swierczynski, Marc Fyrbiak, Christof Paar, Christophe Huriaux, Russell Tessier
2015 J jnl
Reconfigurable Computing Architectures.
Proc. IEEE
Russell Tessier, Kenneth L. Pocek, André DeHon
2015 — conf
Reinforcement Learning for Thermal-aware Many-core Task Allocation.
ACM Great Lakes Symposium on VLSI
Shiting (Justin) Lu, Russell Tessier, Wayne P. Burleson
2015 J jnl
Securing Network Processors with High-Performance Hardware Monitors.
IEEE Trans. Dependable Secur. Comput.
Tilman Wolf, Harikrishnan Kumarapillai Chandrikakutty, Kekai Hu, Deepak Unnikrishnan, Russell Tessier
2014 — conf
A Broadcast-Enabled Sensing System for Embedded Multi-core Processors.
ISVLSI
Jia Zhao, Shiting (Justin) Lu, Wayne P. Burleson, Russell Tessier
2014 J jnl
Dynamic On-Chip Thermal Sensor Calibration Using Performance Counters.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Shiting (Justin) Lu, Russell Tessier, Wayne P. Burleson
2014 Misc conf
FPGA Architecture Enhancements to Support Heterogeneous Partially Reconfigurable Regions.
FCCM
Christophe Huriaux, Olivier Sentieys, Russell Tessier
2014 B conf
FPGA architecture support for heterogeneous, relocatable partial bitstreams.
FPL
Christophe Huriaux, Olivier Sentieys, Russell Tessier
2014 A* conf
System-Level Security for Network Processors with Hardware Monitors.
DAC
Kekai Hu, Tilman Wolf, Thiago Teixeira, Russell Tessier
2013 — conf
Accelerating iterative algorithms with asynchronous accumulative updates on FPGAs.
FPT
Deepak Unnikrishnan, Sandesh Gubbi Virupaksha, Lekshmi Krishnan, Lixin Gao, Russell Tessier
2013 — conf
An open-source SATA core for Virtex-4 FPGAs.
FPT
Cory Gorman, Paul Siqueira, Russell Tessier
2013 J jnl
Configurable memory security in embedded systems.
ACM Trans. Embed. Comput. Syst.
Jérémie Crenne, Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Russell Tessier, Deepak Unnikrishnan
2013 A conf
FPGA latency optimization using system-level transformations and DFG restructuring.
DATE
Daniel Gomez-Prado, Maciej J. Ciesielski, Russell Tessier
2013 — conf
FlexGrip: A soft GPGPU for FPGAs.
FPT
Kevin Andryc, Murtaza Merchant, Russell Tessier
2013 A* conf
High-performance hardware monitors to protect network processors from data plane attacks.
DAC
Harikrishnan Chandrikakutty, Deepak Unnikrishnan, Russell Tessier, Tilman Wolf
2013 J jnl
Real-Time Differential Signal Phase Estimation for Space-Based Systems using FPGAs.
IEEE Trans. Aerosp. Electron. Syst.
Shiting (Justin) Lu, Paul Siqueira, Vishwas Vijayendra, Harikrishnan Chandrikakutty, Russell Tessier
2013 J jnl
Reconfigurable Data Planes for Scalable Network Virtualization.
IEEE Trans. Computers
Deepak Unnikrishnan, Ramakrishna Vadlamani, Yong Liao, Jérémie Crenne, Lixin Gao, Russell Tessier
2013 A conf
Run-time probabilistic detection of miscalibrated thermal sensors in many-core systems.
DATE
Jia Zhao, Shiting (Justin) Lu, Wayne P. Burleson, Russell Tessier
2013 — conf
Scalable hardware monitors to protect network processors from data plane attacks.
CNS
Kekai Hu, Harikrishnan Chandrikakutty, Russell Tessier, Tilman Wolf
2012 A conf
Collaborative calibration of on-chip thermal sensors using performance counters.
ICCAD
Shiting (Justin) Lu, Russell Tessier, Wayne P. Burleson
2012 — conf
Distributed sensor data processing for many-cores.
ACM Great Lakes Symposium on VLSI
Jia Zhao, Russell Tessier, Wayne P. Burleson
2012 — conf
Saving energy and improving TCP throughput with rate adaptation in Ethernet.
ICC
Y. Sinan Hanay, Wei Li, Russell Tessier, Tilman Wolf
2011 — ed.
2011 International Conference on Field-Programmable Technology, FPT 2011, New Delhi, India, December 12-14, 2011
FPT
Russell Tessier
2011 J jnl
A Dedicated Monitoring Infrastructure for Multicore Processors.
IEEE Trans. Very Large Scale Integr. Syst.
Jia Zhao, Sailaja Madduri, Ramakrishna Vadlamani, Wayne P. Burleson, Russell Tessier
2011 B conf
A Dynamically-Reconfigurable Phased Array Radar Processing System.
FPL
Emmanuel Seguin, Russell Tessier, Eric J. Knapp, Robert W. Jackson
2011 J jnl
Customizing virtual networks with partial FPGA reconfiguration.
Comput. Commun. Rev.
Dong Yin, Deepak Unnikrishnan, Yong Liao, Lixin Gao, Russell Tessier
2011 — conf
Efficient key-dependent message authentication in reconfigurable hardware.
FPT
Jérémie Crenne, Pascal Cotret, Guy Gogniat, Russell Tessier, Jean-Philippe Diguet
2011 — conf
Evaluation of the Universal Geocast Scheme for VANETs.
VTC Fall
Ben Bovee, Mohammad Nekoui, Hossein Pishro-Nik, Russell Tessier
2011 — conf
ReClick - A Modular Dataplane Design Framework for FPGA-Based Network Virtualization.
ANCS
Deepak Unnikrishnan, Shiting (Justin) Lu, Lixin Gao, Russell Tessier
2011 — conf
Real-time estimates of differential signal phase for spaceborne systems using FPGAs.
AHS
Vishwas Vijayendra, Paul Siqueira, Harikrishnan Chandrikakutty, Akilesh Krishnamurthy, Russell Tessier
2011 J jnl
Securing the data path of next-generation router systems.
Comput. Commun.
Tilman Wolf, Russell Tessier, Gayatri Prabhu
2010 Misc ed.
18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2010, Charlotte, North Carolina, USA, 2-4 May 2010
FCCM
Ron Sass, Russell Tessier
2010 — conf
Customizing virtual networks with partial FPGA reconfiguration.
VISA@SIGCOMM
Dong Yin, Deepak Unnikrishnan, Yong Liao, Lixin Gao, Russell Tessier
2010 A conf
Multicore soft error rate stabilization using adaptive dual modular redundancy.
DATE
Ramakrishna Vadlamani, Jia Zhao, Wayne P. Burleson, Russell Tessier
2010 — conf
Reconfigurable Sparse Matrix-Vector Multiplication on FPGAs.
ERSA
Russell Tessier, Salma Mirza, J. Blair Perot
2010 A conf
Scalable network virtualization using FPGAs.
FPGA
Deepak Unnikrishnan, Ramakrishna Vadlamani, Yong Liao, Abhishek Dwaraki, Jérémie Crenne, Lixin Gao, Russell Tessier
2010 — conf
Thermal-aware voltage droop compensation for multi-core architectures.
ACM Great Lakes Symposium on VLSI
Jia Zhao, Basab Datta, Wayne P. Burleson, Russell Tessier
2009 A conf
A monitor interconnect and support subsystem for multicore processors.
DATE
Sailaja Madduri, Ramakrishna Vadlamani, Wayne P. Burleson, Russell Tessier
2009 J jnl
A security approach for off-chip memory in embedded microprocessor systems.
Microprocess. Microsystems
Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Eduardo Braulio Wanderley Netto, Russell Tessier, Wayne P. Burleson
2009 C conf
An Interactive Approach to Timing Accurate PCI-X Simulation.
IEEE International Workshop on Rapid System Prototyping
Kevin Andryc, Russell Tessier, Patrick Kelly
2009 Misc conf
Application Specific Customization and Scalability of Soft Multiprocessors.
FCCM
Deepak Unnikrishnan, Jia Zhao, Russell Tessier
2009 A conf
CMOS vs Nano: comrades or rivals?
FPGA
Deming Chen, Russell Tessier, Kaustav Banerjee, Mojy C. Chian, André DeHon, Shinobu Fujita, James Hutchby, Steve Trimberger
2009 B conf
Design of a Secure Router System for Next-Generation Networks.
NSS
Tilman Wolf, Russell Tessier
2009 J jnl
Tetris-XL: A performance-driven spill reduction technique for embedded VLIW processors.
ACM Trans. Archit. Code Optim.
Weifeng Xu, Russell Tessier
2008 — conf
Memory security management for reconfigurable embedded systems.
FPT
Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Russell Tessier, Deepak Unnikrishnan, Kris Gaj
2007 Misc conf
Establishing Chain of Trust in Reconfigurable Hardware.
FCCM
Thomas Eisenbarth, Tim Güneysu, Christof Paar, Ahmad-Reza Sadeghi, Marko Wolf, Russell Tessier
2007 J jnl
FPGA Architecture: Survey and Challenges.
Found. Trends Electron. Des. Autom.
Ian Kuon, Russell Tessier, Jonathan Rose
2007 — conf
High-efficiency protection solution for off-chip memory in embedded systems.
ERSA
Romain Vaslin, Guy Gogniat, Jean-Philippe Diguet, Russell Tessier, Wayne P. Burleson
2007 — conf
Low latency Solution for Confidentiality and Integrity Checking in Embedded Systems with Off-Chip Memory.
ReCoSoC
Romain Vaslin, Guy Gogniat, Eduardo Braulio Wanderley Netto, Russell Tessier, Wayne P. Burleson
2007 J jnl
Power-Efficient RAM Mapping Algorithms for FPGA Embedded Memory Blocks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Russell Tessier, Vaughn Betz, David Neto, Aaron Egier, Thiagaraja Gopalsamy
2007 A conf
Power-aware FPGA logic synthesis using binary decision diagrams.
FPGA
Kevin Oo Tinmaung, David Howland, Russell Tessier
2007 B conf
Tetris: a new register pressure control technique for VLIW processors.
LCTES
Weifeng Xu, Russell Tessier
2006 A conf
An adaptive Reed-Solomon errors-and-erasures decoder.
FPGA
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Russell Tessier
2006 J jnl
Design-specific path delay testing in lookup-table-based FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Premachandran R. Menon, Weifeng Xu, Russell Tessier
2006 J jnl
Field-Programmable Gate Arrays in Embedded Systems.
EURASIP J. Embed. Syst.
Miriam Leeser, Scott Hauck, Russell Tessier
2006 A conf
Power-aware RAM mapping for FPGA embedded memory blocks.
FPGA
Russell Tessier, Vaughn Betz, David Neto, Thiagaraja Gopalsamy
2005 J jnl
A reconfigurable, power-efficient adaptive Viterbi decoder.
IEEE Trans. Very Large Scale Integr. Syst.
Russell Tessier, Sriram Swaminathan, Ramaswamy Ramaswamy, Dennis Goeckel, Wayne P. Burleson
2005 J jnl
An energy-aware active smart card.
IEEE Trans. Very Large Scale Integr. Syst.
Russell Tessier, David Jasinski, Atul Maheshwari, Aiyappan Natarajan, Weifeng Xu, Wayne P. Burleson
2005 C conf
Salient features of radar nodes of the first generation NetRad System.
IGARSS
Francesc Junyent, Venkatachalam Chandrasekar, David J. McLaughlin, Stephen J. Frasier, Edin Insanic, Razi Ahmed, Nitin Bharadwaj, Eric J. Knapp, Luko Krnan, Russell Tessier
2004 Misc conf
A Dynamically-Reconfigurable, Power-Efficient Turbo Decoder.
FCCM
Jian Liang, Russell Tessier, Dennis Goeckel
2004 J jnl
A pod-based dual-beam SAR.
IEEE Geosci. Remote. Sens. Lett.
Gordon Farquharson, William N. Junek, Arun Ramanathan, Stephen J. Frasier, Russell Tessier, David J. McLaughlin, Mark A. Sletten, Jakov V. Toporkov
2004 J jnl
An architecture and compiler for scalable on-chip communication.
IEEE Trans. Very Large Scale Integr. Syst.
Jian Liang, Andrew Laffely, Sriram Srinivasan, Russell Tessier
2004 J jnl
Dynamically Parameterized Algorithms and Architectures to Exploit Signal Variations.
J. VLSI Signal Process.
Prashant Jain, Andrew Laffely, Wayne P. Burleson, Russell Tessier, Dennis Goeckel
2004 J jnl
Guest Editorial: Field Programmable Logic.
J. VLSI Signal Process.
Roger F. Woods, Russell Tessier
2004 A ed.
Proceedings of the ACM/SIGDA 12th International Symposium on Field Programmable Gate Arrays, FPGA 2004, Monterey, California, USA, February 22-24, 2004
FPGA
Russell Tessier, Herman Schmit
2004 J jnl
Trading off transient fault tolerance and power consumption in deep submicron (DSM) VLSI circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Atul Maheshwari, Wayne P. Burleson, Russell Tessier
2003 — conf
A hybrid adiabatic content addressable memory for ultra low-power applications.
ACM Great Lakes Symposium on VLSI
Aiyappan Natarajan, David Jasinski, Wayne P. Burleson, Russell Tessier
2003 Misc conf
Adaptive Fault Recovery for Networked Reconfigurable Systems.
FCCM
Weifeng Xu, Ramshankar Ramanarayanan, Russell Tessier
2003 — conf
Adaptive system on a chip (ASOC): a backbone for power-aware signal processing cores.
ICIP (3)
Andrew Laffely, Jian Liang, Russell Tessier, Wayne P. Burleson
2003 C conf
First observations with the UMass dual-beam InSAR.
IGARSS
William N. Junek, Arun Ramanathan, Gordon Farquharson, Stephen J. Frasier, Russell Tessier, David J. McLaughlin, Mark A. Sletten, Jakov V. Toporkov
2003 Misc conf
Floating Point Unit Generation and Evaluation for FPGAs.
FCCM
Jian Liang, Russell Tessier, Oskar Mencer
2003 A ed.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2003, Monterey, CA, USA, February 23-25, 2003
FPGA
Steve Trimberger, Russell Tessier
2003 J jnl
Technology mapping algorithms for hybrid FPGAs containing lookup tables and PLAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Srini Krishnamoorthy, Russell Tessier
2002 A conf
A dynamically reconfigurable adaptive viterbi decoder.
FPGA
Sriram Swaminathan, Russell Tessier, Dennis Goeckel, Wayne P. Burleson
2002 J jnl
BDD-based logic synthesis for LUT-based FPGAs.
ACM Trans. Design Autom. Electr. Syst.
Navin Vemuri, Priyank Kalla, Russell Tessier
2002 J jnl
Fast placement approaches for FPGAs.
ACM Trans. Design Autom. Electr. Syst.
Russell Tessier
2002 J jnl
Incremental compilation for parallel logic verification systems.
IEEE Trans. Very Large Scale Integr. Syst.
Russell Tessier, Snigdha Jana
2002 J jnl
Static scheduling of multidomain circuits for fast functional verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Murali Kudlugi, Russell Tessier
2002 J jnl
Testing and diagnosis of interconnect faults in cluster-based FPGA architectures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ian G. Harris, Russell Tessier
2002 B conf
The Integration of SystemC and Hardware-Assisted Verification.
FPL
Ramaswamy Ramaswamy, Russell Tessier
2002 — conf
Trading off Reliability and Power-Consumption in Ultra-low Power Systems.
ISQED
Atul Maheshwari, Wayne P. Burleson, Russell Tessier
2001 A conf
BIST-based delay path testing in FPGA architectures.
ITC
Ian G. Harris, Premachandran R. Menon, Russell Tessier
2001 Misc conf
Dynamically parameterized algorithms and architectures to exploit signal variations for improved performance and reduced power.
ICASSP
Wayne P. Burleson, Russell Tessier, Dennis Goeckel, Sriram Swaminathan, Prashant Jain, Jeongseon Euh, Subramanian Venkatraman, Vidhya Thyagarajan
2001 A ed.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2001, Monterey, CA, USA, February 11-13, 2001
FPGA
Scott Hauck, Martine D. F. Schlag, Russell Tessier
2001 J jnl
Reconfigurable Computing for Digital Signal Processing: A Survey.
J. VLSI Signal Process.
Russell Tessier, Wayne P. Burleson
2001 A conf
Static Scheduling of Multi-Domain Memories For Functional Verification.
ICCAD
Murali Kudlugi, Charles Selvidge, Russell Tessier
2001 A* conf
Static Scheduling of Multiple Asynchronous Domains For Functional Verification.
DAC
Murali Kudlugi, Charles Selvidge, Russell Tessier
2000 B conf
Area-Optimized Technology Mapping for Hybrid FPGAs.
FPL
Srini Krishnamoorthy, Sriram Swaminathan, Russell Tessier
2000 B conf
Balancing Logic Utilization and Area Efficiency in FPGAs.
FPL
Russell Tessier, Heather Giza
2000 A conf
Diagnosis of Interconnect Faults in Cluster-Based FPGA Architectures.
ICCAD
Ian G. Harris, Russell Tessier
2000 A* conf
Interconnect testing in cluster-based FPGA architectures.
DAC
Ian G. Harris, Russell Tessier
2000 A conf
Tolerating operational faults in cluster-based FPGAs.
FPGA
Vijay Lakamraju, Russell Tessier
2000 — conf
aSOC: A Scalable, Single-Chip Communications Architecture.
IEEE PACT
Jian Liang, Sriram Swaminathan, Russell Tessier
1999 — —
Fast place and route approaches for field-programmable gate arrays.
Russell Tessier
1999 — conf
Frontier: A Fast Placement System for FPGAs.
VLSI
Russell Tessier
1999 C conf
Incremental Compilation for Logic Emulation.
IEEE International Workshop on Rapid System Prototyping
Russell Tessier
1997 J jnl
Logic emulation with virtual wires.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Jonathan Babb, Russell Tessier, Matthew Dahl, Silvina Hanono, David M. Hoki, Anant Agarwal
1993 A conf
The NuMesh: A Modular, Scalable Communications Substrate.
International Conference on Supercomputing
Steve Ward, Karim Abdalla, Rajeev Dujari, Michael Fetterman, Frank Honoré, Ricardo Jenez, Philippe Laffont, Kenneth MacKenzie, Chris Metcalf, Milan Minsky, John Nguyen, John Pezaris, Gill A. Pratt, Russell Tessier