Russell P. Kraft

41 papers A 3B 4C 2Misc 2Journal 21Unranked 9

Year	Rank	Type	Title / Venue / Authors
2015	J	`jnl`	140 Gb/s Serializer Using Clock Doublers in 90 nm SiGe Technology. IEEE J. Solid State Circuits Ryan Clarke, Mitchell R. LeRoy, Srikumar Raman, Tuhin Guha Neogi, Russell P. Kraft, John F. McDonald
2015	J	`jnl`	Thermal Modeling of 3-D Stacked DRAM Over SiGe HBT BiCMOS CPU. IEEE Access Ryan Clarke, Philip Jacob, Okan Erdogan, Paul Belemijian, Srikumar Raman, Mitchell R. LeRoy, Tuhin Guha Neogi, Russell P. Kraft, Diana-Andra Borca-Tasciuc, John F. McDonald
2014	J	`jnl`	Design of BiCMOS SRAMs for high-speed SiGe applications. IET Circuits Devices Syst. Xuelian Liu, Mitchell R. LeRoy, Ryan Clarke, Michael Chu, H. O. Aquino, Srikumar Raman, Aamir Zia, Russell P. Kraft, John F. McDonald
2014	J	`jnl`	Design of High-Speed Register Files Using SiGe HBT BiCMOS Technology. IEEE Trans. Circuits Syst. II Express Briefs Xuelian Liu, Srikumar Raman, Ryan Clarke, Mitchell R. LeRoy, Okan Erdogan, Michael Chu, Alexey Gutin, Russell P. Kraft, John F. McDonald
2012	C	`conf`	A three-dimensional DRAM using floating body cell in FDSOI devices. DDECS Xuelian Liu, Aamir Zia, Mitchell R. LeRoy, Srikumar Raman, Ryan Clarke, Russell P. Kraft, John F. McDonald
2011	J	`jnl`	Carry Chains for Ultra High-Speed SiGe HBT Adders. IEEE Trans. Circuits Syst. I Regul. Pap. Alexey Gutin, Philip Jacob, Michael Chu, Paul M. Belemjian, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald
2011	J	`jnl`	Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications. IET Circuits Devices Syst. Jin Woo Kim, Michael Chu, Philip Jacob, Aamir Zia, Russell P. Kraft, John F. McDonald
2010	J	`jnl`	A 3-D Cache With Ultra-Wide Data Bus for 3-D Processor-Memory Integration. IEEE Trans. Very Large Scale Integr. Syst. Aamir Zia, Philip Jacob, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald
2010	J	`jnl`	A 40 Gs/s Time Interleaved ADC Using SiGe BiCMOS Technology. IEEE J. Solid State Circuits Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald
2010	J	`jnl`	Correction to "A 40 GS/s Time Interleaved ADC Using SiGe BiCMOS Technology". IEEE J. Solid State Circuits Michael Chu, Philip Jacob, Jin Woo Kim, Mitchell R. LeRoy, Russell P. Kraft, John F. McDonald
2009	J	`jnl`	Mitigating Memory Wall Effects in High-Clock-Rate and Multicore CMOS 3-D Processor Memory Stacks. Proc. IEEE Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald, Kerry Bernstein
2009	—	`conf`	Thermal analysis for a SiGe HBT 40 watt 32 GHz clock 3D memory processor chip stack using diamond heat spreader layers. 3DIC John F. McDonald, Okan Erdogan, Philip Jacob, Paul M. Belemjian, Alexey Gutin, Aamir Zia, Michael Chu, Jin Woo Kim, Ryan Clarke, Nate DeSimone, Sherry Liu, Russell P. Kraft
2007	J	`jnl`	52 Gb/s 16: 1 transmitter in 0.13 μm SiGe BiCMOS technology. IET Circuits Devices Syst. Young Uk Yim, Peter F. Curran, Michael Chu, John F. McDonald, Russell P. Kraft
2007	J	`jnl`	A 12-Gb/s DEMUX Implemented With SiGe High-Speed FPGA Circuits. IEEE Trans. Very Large Scale Integr. Syst. Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Bryan S. Goda, John F. McDonald
2007	C	`conf`	Amdahl's figure of merit, SiGe HBT BiCMOS, and 3D chip stacking. ICCD Philip Jacob, Aamir Zia, Okan Erdogan, Paul M. Belemjian, Peng Jin, Jin Woo Kim, Michael Chu, Russell P. Kraft, John F. McDonald
2007	J	`jnl`	Silicon germanium programmable circuits for gigahertz applications. IET Circuits Devices Syst. Jong-Ru Guo, Chao You, Mike Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Peng Jin, Russell P. Kraft, John F. McDonald
2005	—	`conf`	12-23 GHz Ultra Wide Tuning Range Voltage-Controlled Ring Oscillator with Hybrid Control Schemes. ISVLSI Young Uk Yim, John F. McDonald, Russell P. Kraft
2005	J	`jnl`	A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC. Integr. Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
2005	B	`conf`	A 11 GHz FPGA with Test Applications. FPL Chao You, Jong-Ru Guo, Michael Chu, Russell P. Kraft, Bryan S. Goda, John F. McDonald
2005	J	`jnl`	A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block. Microprocess. Microsystems Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Peter F. Curran, Kuan Zhou, Bryan S. Goda, John F. McDonald
2005	—	`conf`	A High Speed Reconfigurable Gate Array for Gigahertz Applications. ISVLSI Jong-Ru Guo, Chao You, Michael Chu, Okan Erdogan, Russell P. Kraft, John F. McDonald
2005	J	`jnl`	Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques. J. Circuits Syst. Comput. Kuan Zhou, Jong-Ru Guo, Chao You, John Mayega, Russell P. Kraft, T. Zhang, John F. McDonald, Bryan S. Goda
2005	J	`jnl`	Predicting the Performance of a 3D Processor-Memory Chip Stack. IEEE Des. Test Comput. Philip Jacob, Okan Erdogan, Aamir Zia, Paul M. Belemjian, Russell P. Kraft, John F. McDonald
2005	J	`jnl`	SiGe HBT Microprocessor Core Test Vehicle. Proc. IEEE Paul M. Belemjian, Okan Erdogan, Russell P. Kraft, John F. McDonald
2004	—	`conf`	The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. ACM Great Lakes Symposium on VLSI Jong-Ru Guo, Chao You, Peter F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald
2004	A	`conf`	The gigahertz FPGA: design consideration and applications. FPGA Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
2003	—	`conf`	3D direct vertical interconnect microprocessors test vehicle. ACM Great Lakes Symposium on VLSI John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan Zhou, John F. McDonald, Russell P. Kraft
2003	—	`conf`	A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology. ACM Great Lakes Symposium on VLSI Chao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald
2003	—	`conf`	A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA. Engineering of Reconfigurable Systems and Algorithms Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald
2003	A	`conf`	A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. FPGA Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda
2003	A	`conf`	A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology. FPGA Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, Russell P. Kraft, John F. McDonald
2003	B	`conf`	Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory. FPL Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald
2002	B	`conf`	Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques. FPL Channakeshav, Kuan Zhou, Jong-Ru Guo, Chao You, Bryan S. Goda, Russell P. Kraft, John F. McDonald
2002	—	`conf`	Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic. Evolvable Hardware Channakeshav, Kuan Zhou, Russell P. Kraft, John F. McDonald
2002	—	`conf`	Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes. FPT Kuan Zhou, Channakeshav, Michael Chu, Jong-Ru Guo, S.-C. Liu, Russell P. Kraft, Chao You, John F. McDonald
2001	B	`conf`	Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs. FPL Bryan S. Goda, Russell P. Kraft, Steven R. Carlough, Thomas W. Krawczyk Jr., John F. McDonald
2000	J	`jnl`	A 2-GHz clocked AlGaAs/GaAs HBT byte-slice datapath chip. IEEE J. Solid State Circuits Steven R. Carlough, Robert A. Philhower, Cliff A. Maier, Sam A. Steidl, Pete M. Campbell, Atul Garg, Kyung-Suc Nah, Matthew W. Ernest, James R. Loy, Thomas W. Krawczyk Jr., Peter F. Curran, Russell P. Kraft, Hans J. Greub, John F. McDonald
1999	J	`jnl`	Accurate high-speed performance prediction for full differential current-mode logic: the effect of dielectric anisotropy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Atul Garg, Y. L. Le Coz, Hans J. Greub, R. B. Iverson, Robert F. Philhower, Pete M. Campbell, Cliff A. Maier, Sam A. Steidl, Matthew W. Ernest, Russell P. Kraft, Steven R. Carlough, J. W. Perry, Thomas W. Krawczyk Jr., John F. McDonald
1998	J	`jnl`	A very wide bandwidth digital VCO using quadrature frequency multiplication and division implemented in AlGaAs/GaAs HBT's. IEEE Trans. Very Large Scale Integr. Syst. Pete M. Campbell, Hans J. Greub, Atul Garg, Sam A. Steidl, Steven R. Carlough, Matthew W. Ernest, Robert F. Philhower, Cliff A. Maier, Russell P. Kraft, John F. McDonald
1982	Misc	`conf`	Homomorphic signal dereverberation for a phased array imaging system. ICASSP Russell P. Kraft, John F. McDonald, J. Erkes
1979	Misc	`conf`	Minimax optimization of two-dimensional focused nonuniformly spaced arrays. ICASSP Russell P. Kraft, John F. McDonald, F. Ahlgren