Rui Policarpo Duarte

39 papers A 1B 5C 2Journal 18Unranked 13

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	The RISC-V FPGA (RVfpga) Teaching Package. IEEE Access Daniel Chaver, Sarah L. Harris, Luis Piñuel, Olof Kindgren, Zubair L. Kakakhel, Chris Owen, Roy Kravitz, José Ignacio Gómez Pérez, Fernando Castro, Katzalin Olcoz, Julio Villalba-Moreno, Alexander Grinshpun, Freddy Gabbay, Nicholas Luke Seed, Rui Policarpo Duarte, Manuel López, Óscar Alonso, Robert Owen
2025	J	`jnl`	Dual-Purpose Star Tracker and Space Debris Detector: Miniature Instrument for Small Satellites. J. Sens. Actuator Networks Beltran Arribas, João G. Maia, João P. Castanheira, Joel Filho, Rui Melício, Hugo Onderwater, Paulo Gordo, Rui Policarpo Duarte, André Silva
2025	—	`conf`	IoT Smart Door Lock with Wireless Key Sharing for Short Term Multi-Level Building Access. IOTSMS Bernardo Cabral Marques, Miguel L. Pardal, Rui Policarpo Duarte
2024	J	`jnl`	Teaching Experiences using the RVfpga Package. CoRR Daniel Chaver, Sarah L. Harris, Luis Piñuel, Olof Kindgren, Roy Kravitz, José Ignacio Gómez, Fernando Castro, Katzalin Olcoz, Julio Villalba, Alexander Grinshpun, Freddy Gabbay, Nicholas Luke Seed, Rui Policarpo Duarte, Manuel López, Óscar Alonso, Robert Owen
2023	J	`jnl`	Efficient Design of Low Bitwidth Convolutional Neural Networks on FPGA with Optimized Dot Product Units. ACM Trans. Reconfigurable Technol. Syst. Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
2023	J	`jnl`	Energy-Efficient and Real-Time Wearable for Wellbeing-Monitoring IoT System Based on SoC-FPGA. Algorithms Maria Inês Frutuoso, Horácio C. Neto, Mário P. Véstias, Rui Policarpo Duarte
2022	J	`jnl`	A Review of Synthetic-Aperture Radar Image Formation Algorithms and Implementations: A Computational Perspective. Remote. Sens. Helena Cruz, Mário P. Véstias, José Monteiro, Horácio C. Neto, Rui Policarpo Duarte
2022	J	`jnl`	Onboard Processing of Synthetic Aperture Radar Backprojection Algorithm in FPGA. IEEE J. Sel. Top. Appl. Earth Obs. Remote. Sens. David Mota, Helena Cruz, Pedro R. Miranda, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto, Mário P. Véstias
2021	J	`jnl`	A Full Featured Configurable Accelerator for Object Detection With YOLO. IEEE Access Daniel Pestana, Pedro R. Miranda, João D. Lopes, Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto, José T. de Sousa
2021	J	`jnl`	Configurable Hardware Core for IoT Object Detection. Future Internet Pedro R. Miranda, Daniel Pestana, João D. Lopes, Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto, José T. de Sousa
2020	J	`jnl`	A Configurable Architecture for Running Hybrid Convolutional Neural Networks in Low-Density FPGAs. IEEE Access Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
2020	J	`jnl`	A fast and scalable architecture to run convolutional neural networks in low density FPGAs. Microprocess. Microsystems Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
2020	J	`jnl`	Moving Deep Learning to the Edge. Algorithms Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
2020	—	`conf`	Reconfigurable Accelerator for On-Board SAR Imaging Using the Backprojection Algorithm. ARC Rui Policarpo Duarte, Helena Cruz, Horácio C. Neto
2019	J	`jnl`	Embedded Fault-Tolerant Accelerator Architecture for Synthetic-Aperture Radar Backprojection. J. Aerosp. Inf. Syst. Helena Cruz, Rui Policarpo Duarte, Horácio C. Neto
2019	—	`conf`	Fault-Tolerant Architecture for On-board Dual-Core Synthetic-Aperture Radar Imaging. ARC Helena Cruz, Rui Policarpo Duarte, Horácio C. Neto
2019	B	`conf`	Hybrid Dot-Product Calculation for Convolutional Neural Networks in FPGA. FPL Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
2019	C	`conf`	Low Energy Heterogeneous Computing with Multiple RISC-V and CGRA Cores. ISCAS Luís Fiolhais, Fernando M. Gonçalves, Rui Policarpo Duarte, Mário P. Véstias, José T. de Sousa
2019	J	`jnl`	kNN-STUFF: kNN STreaming Unit for Fpgas. IEEE Access João Vieira, Rui Policarpo Duarte, Horácio C. Neto
2018	—	`conf`	FPGA-based OpenCL Accelerator for Discovering Temporal Patterns in Gene Expression Data Using Biclustering. PBio@EuroMPI Rui Policarpo Duarte, Álvaro Simões, Rui Henriques, Horácio C. Neto
2018	B	`conf`	Lite-CNN: A High-Performance Architecture to Execute CNNs in Low Density FPGAs. FPL Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
2018	—	`conf`	Stochastic Processors on FPGAs to Compute Sensor Data Towards Fault-Tolerant IoT Systems. DSC Rui Policarpo Duarte, Horácio C. Neto
2017	J	`jnl`	Making data center computations fast, but not so furious. CoRR Daniel Porto, João Loff, Rui Policarpo Duarte, Luis Ceze, Rodrigo Rodrigues
2017	B	`conf`	Parallel dot-products for deep learning on FPGA. FPL Mário P. Véstias, Rui Policarpo Duarte, José T. de Sousa, Horácio C. Neto
2017	J	`jnl`	Transport Protocols for Large Bandwidth-Delay Product Networks - TCP Extensions and Alternative Transport Protocols. CoRR Rui Policarpo Duarte
2016	—	`conf`	A hybrid ASIC/FPGA fault-tolerant artificial pancreas. SAMOS Michail S. Vavouras, Rui Policarpo Duarte, Antonino Armato, Christos-Savvas Bouganis
2016	—	`conf`	Variation-Aware Optimisation for Reconfigurable Cyber-Physical Systems. DoCEIS Rui Policarpo Duarte, Christos-Savvas Bouganis
2016	—	`conf`	XtokaxtikoX: A stochastic computing-based autonomous cyber-physical system. ICRC Rui Policarpo Duarte, Horácio C. Neto, Mário P. Véstias
2015	J	`jnl`	ARC 2014 Over-Clocking KLT Designs on FPGAs under Process, Voltage, and Temperature Variation. ACM Trans. Reconfigurable Technol. Syst. Rui Policarpo Duarte, Christos-Savvas Bouganis
2015	—	`conf`	CardioWheel: ECG Biometrics on the Steering Wheel. ECML/PKDD (3) André Lourenço, Ana Priscila Alves, Carlos Carreiras, Rui Policarpo Duarte, Ana L. N. Fred
2015	J	`jnl`	Designing Hardware/Software Systems for Embedded High-Performance Computing. CoRR Mário P. Véstias, Rui Policarpo Duarte, Horácio C. Neto
2015	B	`conf`	Enhancing stochastic computations via process variation. FPL Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto
2014	—	`conf`	A Unified Framework for Over-Clocking Linear Projections on FPGAs under PVT Variation. ARC Rui Policarpo Duarte, Christos-Savvas Bouganis
2014	—	`conf`	Over-clocking of Linear Projection Designs through Device Specific Optimisations. IPDPS Workshops Rui Policarpo Duarte, Christos-Savvas Bouganis
2014	A	`conf`	Pushing the performance boundary of linear projection designs through device specific optimisations (abstract only). FPGA Rui Policarpo Duarte, Christos-Savvas Bouganis
2014	—	`conf`	Zero-latency datapath error correction framework for over-clocking DSP applications on FPGAs. ReConFig Rui Policarpo Duarte, Christos-Savvas Bouganis
2012	B	`conf`	High-level linear projection circuit design optimization framework for FPGAs under over-clocking. FPL Rui Policarpo Duarte, Christos-Savvas Bouganis
2009	C	`conf`	Double-precision Gauss-Jordan Algorithm with Partial Pivoting on FPGAs. DSD Rui Policarpo Duarte, Horácio C. Neto, Mário P. Véstias
2008	—	`conf`	Multiplier-based double precision floating point divider according to the IEEE-754 standard. ARC Vítor Silva, Rui Policarpo Duarte, Mário P. Véstias, Horácio C. Neto