Rui Paulo Martins

689 papers C 53Journal 357Unranked 276
YearRankTypeTitle / Venue / Authors
2026 — conf
16.1 PV Energy-Harvesting Interface Using Reconfigurable Self-Clamp CSCR Converter Achieving 3.83× High-Efficiency VCR Ratio and Open-Voltage-Sense-Free MPPT.
ISSCC
Ziyang Zhong, Rui Paulo Martins, Mo Huang
2026 — conf
16.6 A Parameter-Free Runtime-Energy-Loss Optimizer Achieving 2.15% Error in Energy-Recycling Duty-Cycled Systems.
ISSCC
Jianxin Yang, Rui Paulo Martins, Mo Huang
2026 — conf
16.8 A Battery Charger Based On Mesh-Connection 2×CF Continuously-Scalable-Conversion-Ratio Converter Achieving $\mathbf{3. 2 W} / \mathbf{m m}^{\mathbf{3}}$ Power Density.
ISSCC
Yuanfei Wang, Zhiyuan Zhang, Yihan Zhang, Rui Paulo Martins, Mo Huang
2026 — conf
26.1 Coupled-OSC-Based Converters Achieving 89.5% Peak Efficiency at 61MHz, 1.82W/mm
ISSCC
Jianxin Yang, Fuyao Zhang, Rui Paulo Martins, Mo Huang
2026 — conf
27.5 A $17.9-\text{to}-22.4 \text{GHz} 195.6 \pm 1.3 \text{dBc} / \text{Hz}$ FoM Quad-Core Class-F Class-F
ISSCC
Yue Wu, Yatao Peng, Jiawei Li, Fengen Yuan, Jinge Li, Jun Yin, Rui Paulo Martins, Pui-In Mak
2026 — conf
A 0.068mm
ISSCC
Xincheng Du, Xiangxun Zhan, Tincheng Ou, Zaize Chen, Jinge Li, Haoran Li, Zhizhan Yang, Zhuo Xu, Pui-In Mak, Rui Paulo Martins, Jun Yin
2026 J jnl
A 0.5-V Ultra-Low Voltage Relaxation Oscillator With Identical Asymmetric Swing-Boosted RC Network and Feedback-Based Amplifier Achieving 390-ppm RMS Period Jitter for Self-Powered Devices.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mikki How-Wen Loo, Harikrishnan Ramiah, Dan Shi, Chee-Cheow Lim, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026 — conf
A 0.6V 9.4µW 1,892µm
ISSCC
Haihua Li, Dan Shi, Qi Zhou, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026 — conf
A 103.9dB-SFDR 83.8dB-SNDR 3MHz-BW Multi-Bit Quadratic-Exponential Noise-Coupled IDSM with High Tolerance to DAC Non-Linearity.
ISSCC
Zhensheng Li, Biao Wang, Mingqiang Guo, Rui Paulo Martins, Sai-Weng Sin
2026 J jnl
A 3.51 TOPS/mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2026 J jnl
A 4100-μm
IEEE J. Solid State Circuits
Dan Shi, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026 J jnl
A Chip-Based Miniature MRI Platform With Integrated Frontend Probe for In-Situ 3D Cell Culture Monitoring.
IEEE Trans. Biomed. Circuits Syst.
Qi Zhou, Shuhao Fan, Yingying Liu, Rui Paulo Martins, Pui-In Mak, Yanwei Jia, Ka-Meng Lei
2026 J jnl
A Hierarchical-Hybrid Floating-Point Compute-in-Memory Macro Using FP-DAC and FP-ADC for Edge-AI Devices.
IEEE J. Solid State Circuits
Yuanzhe Zhao, Yang Wang, Rui Paulo Martins, Chi-Hang Chan, Shouyi Yin, Minglei Zhang
2026 J jnl
A Hybrid SCVR With 4 × C
IEEE J. Solid State Circuits
Yuanfei Wang, Zhiyuan Zhang, Ziyang Zhong, Fuyao Zhang, Yihan Zhang, Rui Paulo Martins, Mo Huang
2026 J jnl
A Low Phase Noise and High-Efficiency Biharmonic Class-F
IEEE J. Solid State Circuits
Yue Wu, Yatao Peng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2026 J jnl
A Low-Voltage-CMOS AC-DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT.
IEEE J. Solid State Circuits
Jiahao Shi, Xuchu Mu, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2026 — conf
A Multi-Phase Hybrid Converter with Q Samplers Enabling Simultaneous IL Auto-Balance and Arbitrary Phase Count.
ISSCC
Jiacheng Yang, Zihao Tang, Rui Paulo Martins, Mo Huang
2026 J jnl
A Single-Channel 1-3 MASH SAR-Assisted Pipeline ADC With Residue Amplifier Error Shaping.
IEEE J. Solid State Circuits
Yanbo Zhang, Guolong Fu, Junyan Hao, Shubin Liu, Zhangming Zhu, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2026 — conf
An Integrated Voltage and Current Reference Together Achieving 5.7 and 9.1ppm/°C from -40 to 125°C.
ISSCC
Lele Fang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2026 J jnl
Design and Analysis of Small-TX Large-RX Coupler in Wireless Charging System for Mobile Devices.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zanfeng Fang, Shousheng Han, Mo Huang, Rui Paulo Martins, Yan Lu
2026 J jnl
Magnetic Positioning System With CMOS Receiver for Calibrating Motion Artifacts During MRI Experiments.
IEEE Trans. Biomed. Circuits Syst.
Boyang Cao, Qi Zhou, Shuhao Fan, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026 J jnl
Phase-Scalable CF-Cross-Connected-Based Hybrid DC-DC Converter With Auto VCF Balancing and Inactive CF Charging.
IEEE J. Solid State Circuits
Jiacheng Yang, Tingxu Hu, Yan Lu, Xin Ming, Rui Paulo Martins, Mo Huang
2026 — book
Resistor-Based Temperature Sensors in Deep-Submicron CMOS Technology
Dan Shi, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026 — conf
VoxCAD: A 0.82-to-81.0mW Intelligent 3D-Perception dToF SoC with Sector-Wise Voxelization and High-Density Tri-Mode eDRAM CIM Macro.
ISSCC
Haoyang Sang, Zhao Wang, Longzhen He, Guangshu Zhao, Wenao Xie, Bo Wang, Rui Paulo Martins, Man-Kay Law
2025 — conf
19.7 A 27GHz Fractional-N Sub-Sampling PLL Achieving 57.9fs
ISSCC
Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025 — conf
21.3 A Segmented-Interlacing Multi-Phase Hybrid Converter with Inherently Auto-Balanced ILs and Boosted IL Slew Rate During Load Transients.
ISSCC
Jiacheng Yang, Rui Paulo Martins, Mo Huang
2025 — conf
21.9 A 20MHz & 1MHz Dual-Loop Non-Uniform-Multi-Inductor Hybrid DC-DC Converter with Specified Inductor Current Allocation and Fast Transient Response.
ISSCC
Junwei Huang, Xiangyu Mao, Zhiguo Tong, Zhewen Yu, Wenjie Yang, Chi-Seng Lam, Rui Paulo Martins, Yan Lu
2025 — conf
24.3: A PVT-Robust 2× Interleaved 2.2GS/s ADC with Gated-CCRO-Based Quantizer Shared Across Channels and Steps Achieving >4.5GHz ERBW.
ISSCC
Junlin Zhong, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 — conf
24.4 A 10b 3GS/s Time-Domain ADC with Mutually Exclusive Metastability Correction and Wide Common-Mode Input.
ISSCC
Zijian Liu, Minglei Zhang, Wei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 — conf
24.5 A 72GS/s 9b Time-Interleaved Pipeline-SAR ADC Achieving 55.3/49.3dB SFDR at 20GHz/Nyquist Inputs in 16nm FinFET.
ISSCC
Yannan Zhang, Minglei Zhang, Zehang Wu, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 — conf
25-nA Modified Hybrid Ladder Converter with Efficient Output-Capacitor Charge Recycling and 90% Battery Lifetime Extension.
CICC
Jianxin Yang, Rui Paulo Martins, Mo Huang
2025 — conf
27.5: A 4, 100µm
ISSCC
Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 — conf
31.4 A 91.25% Peak Power-Conversion-Efficiency Capacitive Power-Management IC Supporting up to 5.68mJ Burst Energy Delivery Using a Single External Capacitor for mm-Scale IoT Applications.
ISSCC
Qishen Fang, Feiyu Li, Rui Paulo Martins, Man-Kay Law
2025 — conf
32.1 A 180MHz 45.3%-Peak-Efficiency Isolated Converter Using Q-Downsize Class-D Power Amplifier with Inherent Shoot-Through Current Blocking and High Tolerance for Efficiency Despite Frequency Misalignments.
ISSCC
Tian Xia, Qiujin Chen, Shujing Wang, Rui Paulo Martins, Mo Huang
2025 J jnl
A 0.35-0.5-V 0.0136-mm² 12 -MHz Digital Frequency-Locked Loop With 1.06%/V Line Sensitivity in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 C conf
A 0.4V Relaxation Oscillator featuring Double Capacitor-Charging Headroom in CMOS 65nm.
ISCAS
Kanghong Yu, Mingrui Wang, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A 0.5-V 6.14- μW Trimming-Free Single-XO Dual-Output Frequency Reference With [5.1-nJ, 120- μs] XO Start-Up and [8.1-nJ, 200- μs] Successive-Approximation-Based RTC Calibration.
IEEE J. Solid State Circuits
Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 C conf
A 0.6V Digital-intensive Pulse Injection 32-kHz Crystal Oscillator Using Stacked Logic Gates.
ISCAS
Zhizhan Yang, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A 1.52-W Capacitor-Drop Sigma-Floating-SC AC/DC Converter for Grid Power to IoT Devices.
IEEE J. Solid State Circuits
Fei Song, Shousheng Han, Rui Paulo Martins, Yan Lu
2025 J jnl
A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM.
IEEE J. Solid State Circuits
Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2025 — conf
A 12.5GS/s 14.7mW 4×TI Pipelined Hybrid TD-SAR ADC with Residual Time-Voltage Amplification.
CICC
Haoyu Li, Boyang Wang, Hongjiang Chen, Sai-Weng Sin, Yutao Peng, Xizhu Peng, He Tang, Chao Fan, Liang Qi, Rui Paulo Martins, Mingqiang Guo
2025 C conf
A 12V-Input 1.8V-0.8V-Output Multiple-Output Hybrid Buck DC-DC Converter with a Shared Flying Capacitor.
ISCAS
Fucong Luo, Junwei Huang, Mo Huang, Rui Paulo Martins, Yan Lu
2025 J jnl
A 160-MHz BW 68-dB SNDR 36.2 mW Continuous-Time Pipelined ΔΣ ADC With DAC Image Prefiltering.
IEEE J. Solid State Circuits
Ke Li, Haoyu Gong, Xianyu Congzhou, Zhensheng Li, Liang Qi, Mingqiang Guo, Rui Paulo Martins, Sai-Weng Sin
2025 J jnl
A 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by a DC-DC Converter.
IEEE Trans. Circuits Syst. I Regul. Pap.
Haoyu Gong, Ke Li, Wen-Liang Zeng, Mingqiang Guo, Chi-Seng Lam, Shulin Zhao, Rui Paulo Martins, Sai-Weng Sin
2025 — conf
A 22.4-25.6GHz Ping-Pong Sub-Sampling PLL Featuring Unified Supply Voltage and Balanced 2
CICC
Yunbo Huang, Zunsong Yang, Hongyu Ren, Rui Paulo Martins, Yan Lu, Nan Sun, Nan Qi, Yong Chen
2025 J jnl
A 28-nm 3.32-nJ/Frame Compute-in-Memory CNN Processor With Layer Fusion for Always-on Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yuanzhe Zhao, Pengyu He, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang
2025 J jnl
A 28-nm MFCC-Free Keyword Switchable Keyword Spotting (KWS) System With Transferred Training Algorithm.
IEEE Trans. Circuits Syst. II Express Briefs
Fei Tan, Yujia Wang, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2025 — conf
A 28nm Value-Wise Hybrid-Domain Compute-in-Memory Macro with Heterogeneous Memory Fabric and Asynchronous Sparsity Manager.
CICC
Yuanzhe Zhao, Yang Wang, Yuheng Wang, Heng Xie, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Shouyi Yin, Minglei Zhang
2025 — conf
A 30-110V Resonant Buck-Boost Power-Bus Charger Achieving 50-A Peak Laser-Current Pulse Generation in 2ns for MHz-Frequency Automotive LiDAR Transmitter.
CICC
Hangxiao Ma, Qiaobo Ma, Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2025 — conf
A 300-kHz 3-Level Flyback Converter Achieving 93% Peak Efficiency and 50% Reduction in Transformer Size.
CICC
Yuanzhuo Wu, Rui Paulo Martins, Mo Huang
2025 J jnl
A 320-MHz NS TD-ADC-Assisted C/DT Hybrid Pipelined ADC With Single OTA Second-Order RAF.
IEEE J. Solid State Circuits
Kai Xing, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 J jnl
A 362-TOPS/W Mixed-Signal MAC Macro With Sampling-Weight-Nonlinearity Cancellation and Dynamic-Amplified Accumulation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ran Zhang, Xueru Cen, Ka-Fai Un, Mingqiang Guo, Liang Qi, Rui Paulo Martins, Sai-Weng Sin
2025 C conf
A 4-Phase Adaptive On-Time Controlled Buck Converter With Auto-Synchronized Dynamic Frequency and Transient-Enhancement Techniques.
ISCAS
Zhiming He, Sai-Weng Sin, Rui Paulo Martins, Yan Lu
2025 — conf
A 48x OSR 105.4-dB SNDR 24-kHz BW CT Zoom ADC with Reset Tri-level DWA and On-chip Negative-R Calibration.
CICC
Yuyu Lin, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 C conf
A 5V-to-0.8V Inductor-First 2L2C Multi-Path Hybrid DC-DC Converter.
ISCAS
Yasi Hu, Junwei Huang, Chi-Seng Lam, Mo Huang, Rui Paulo Martins, Yan Lu
2025 J jnl
A 72-GS/s 9b Time-Interleaved Pipeline-SAR ADC Achieving 55.3/49.3-dB SFDR at 20-GHz/Nyquist Inputs in 16-nm FinFET.
IEEE J. Solid State Circuits
Yannan Zhang, Minglei Zhang, Zehang Wu, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 J jnl
A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell.
IEEE J. Solid State Circuits
Haochen Zhang, Wei-Han Yu, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025 — conf
A 94.8nW Battery-Free Intelligent Silicon Platform Enabling Distributed, Adaptive, and Event-Driven Multimodal Sensing at the Edge.
ISSCC
Haochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A 97.8 GOPS/W FPGA-Based Residual-Block-Aware CNN Accelerator Featuring Multi-Clock PW
IEEE Trans. Circuits Syst. I Regul. Pap.
Jixuan Li, Ke Li, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2025 — conf
A 98.5% Peak Efficiency 2/3-Phase Buck-or-Boost Converter With VCR-Independent Loss Optimization and Unconditional RHP Zero Elimination Achieving 2.76A/mm
CICC
Xiongjie Zhang, Xinman Li, Yang Jiang, Zhangming Zhu, Rui Paulo Martins, Pui-In Mak
2025 — conf
A Bi-Directional Dual-Path Boost-48V-Buck Hybrid Converter for High-Voltage Power-Transmission Cable in Light-Weight Humanoid Robots.
ISSCC
Wenjie Yang, Zhiguo Tong, Junwei Huang, Rui Paulo Martins, Yan Lu
2025 J jnl
A Bi-Directional Dual-Path Boost-Buck Hybrid Converter for High-Voltage Power Transmission Delivery Cable in Humanoid Robots.
IEEE J. Solid State Circuits
Wenjie Yang, Zhiguo Tong, Junwei Huang, Rui Paulo Martins, Yan Lu
2025 J jnl
A Bidirectional USB Power Delivery Voltage-Regulating Cable.
IEEE J. Solid State Circuits
Zhiguo Tong, Junwei Huang, Xiangyu Mao, Rui Paulo Martins, Yan Lu
2025 J jnl
A Capacitorless Flipped-Voltage-Follower-Based Low-Dropout Regulator Incorporating Adaptive-Compensation Buffer.
IEEE Trans. Very Large Scale Integr. Syst.
Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Chee-Cheow Lim, Rui Paulo Martins, Pui-In Mak, Yong Chen
2025 C conf
A Chip-based Miniature MRI Platform with Integrated PDMS-PCB Coil Frontend for Microlitre-volume Sample Analysis.
ISCAS
Qi Zhou, Shuhao Fan, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A Compact Low-Power 16 b SAR ADC Using Reservoir-Charge-Redistributed DAC and Configurable FIA-Based Comparator.
IEEE J. Solid State Circuits
Chenxi Yuan, Xianghui Pan, Zihao Zheng, Yan Song, Rui Paulo Martins, Yan Zhu, Chi-Hang Chan
2025 J jnl
A Cryo-CMOS Wideband Mode-Switching Class-F VCO With Harmonic-Resonance Self-Alignment.
IEEE J. Solid State Circuits
Yue Wu, Yatao Peng, Andrea Ruffino, Jad Benserhir, Jun Yin, Rui Paulo Martins, Pui-In Mak, Edoardo Charbon
2025 J jnl
A Double Pulse Overlapping Laser Diode Driver With Minimum 100-ps Pulse for LiDAR System.
IEEE J. Solid State Circuits
Zhiguo Tong, Junwei Huang, Xiangyu Mao, Rui Paulo Martins, Yan Lu
2025 J jnl
A Dual-Inductor Quad-Path Hybrid Buck (2L4PHB) Converter With Reduced Inductor Current.
IEEE J. Solid State Circuits
Wen-Liang Zeng, Guigang Cai, Yan Lu, Sai-Weng Sin, Rui Paulo Martins, Chi-Seng Lam
2025 — conf
A Fast-transient Buck Converter with One-Cycle-Balancing Control for Single and Consecutive Load Steps.
CICC
Zihao Tang, Rui Paulo Martins, Mo Huang
2025 J jnl
A GaN Driver IC With Asymmetrical dV/dt Current Clamping Level Shifter and Logic-Based Adaptive Deadtime Control.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dajun Zhou, Tianqi Liu, Zhongyao Zhu, Sai-Weng Sin, Rui Paulo Martins, Yan Lu
2025 — conf
A Keyword-Spotting(KWS) Chip Featuring a Bio-Inspired Neuron Model in 65-nm CMOS.
CNIOT
Yantong Liu, Fei Tan, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2025 C conf
A Linear-Regression-Assisted Trimming Scheme for CMOS Voltage Reference.
ISCAS
Chengyu Che, Yao Jiang, Xinfei Guo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A Miniature Multinuclei NMR/MRI Platform With a High-Voltage SOI ASIC.
IEEE J. Solid State Circuits
Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A Multi-Path Inductor-First Inductor-on-Ground Switched-Capacitor Hybrid DC-DC Converter.
IEEE J. Solid State Circuits
Junwei Huang, Zhiguo Tong, Chi-Seng Lam, Xiangyu Mao, Rui Paulo Martins, Yan Lu
2025 J jnl
A Multi-Step ADC With Lightweight Input Buffer Distortion, Sub-Stage Coarse-Fine Gain, and Sampling Skew Background Calibrations.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xianghui Pan, Buhui Rui, Yuefeng Cao, Rui Paulo Martins, Yan Zhu, Chi-Hang Chan
2025 — conf
A One-Shot Floating-Point Compute-in-Memory Macro Featuring PVT Robustness and Mismatch Tolerance for Edge LLMs.
CICC
Yuanzhe Zhao, Heng Xie, Zijian Wang, Chunlin Tian, Li Li, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang
2025 — conf
A PVT-Robust 5.5GHz Fractional-N Cascaded RO-Based Digital PLL with Voltage-Domain Feedforward Noise Cancellation.
ISSCC
Yu Duan, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 — conf
A Reconfigurable 0.69-1.02nJ/Classification Biomedical AI Processor for Intelligent Health Monitoring Devices.
CICC
Yuanzhe Zhao, Yuheng Wang, Zijian Wang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang
2025 J jnl
A Resonant Switched-Capacitor Parallel Inductor Hybrid Buck Converter.
IEEE Trans. Circuits Syst. I Regul. Pap.
Guigang Cai, Rui Paulo Martins, Yan Lu
2025 J jnl
A Series-LC-Assisted Oscillator Achieving -140.2 dBc/Hz Phase Noise and 187.5 dBc/Hz FoM at 10 MHz Offset From 10.7 GHz.
IEEE Trans. Circuits Syst. II Express Briefs
Xiangxun Zhan, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A Shoot-Through-Free 180-MHz Isolated Converter With PG-Downsized PA for Low EMI.
IEEE J. Solid State Circuits
Tian Xia, Qiujin Chen, Jiacheng Yang, Shujing Wang, Tingxu Hu, Rui Paulo Martins, Mo Huang
2025 J jnl
A Single-Channel 12-b 2-GS/s PVT-Robust Pipelined ADC With Sturdy Ring Amplifier and Time-Domain Quantizer.
IEEE J. Solid State Circuits
Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 J jnl
A Single-Input RF Energy-Harvesting Interface With Compensated-CEPE Control and 3-D Hill-Climbing MPPT Achieving -28.5-dBm Sensitivity.
IEEE J. Solid State Circuits
Qiujin Chen, Tian Xia, Tingxu Hu, Yuanfei Wang, Yan Lu, Rui Paulo Martins, Mo Huang
2025 J jnl
A Single-XO Dual-Output Frequency Reference Featuring Adaptive RTC Calibration Achieving 0.63 ppm/°C Temperature Coefficient From -40 °C to 125 °C.
IEEE Trans. Circuits Syst. II Express Briefs
Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chen Deng, Sai Wu, Chengcheng Liu, Yatao Peng, Man-Kay Law, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025 J jnl
A VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio Switched- Capacitor Converter.
IEEE J. Solid State Circuits
Yuanfei Wang, Mo Huang, Qiujin Chen, Rui Paulo Martins, Yan Lu
2025 J jnl
An 800-MHz 8.17-TOPS/W 0.63-TOPS/mm
IEEE J. Solid State Circuits
Jixuan Li, Ke Li, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2025 J jnl
An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhizhan Yang, Haochen Zhang, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025 — conf
An 85-to-230VAC to 3.3-to-4.6VDc 1.52W Capacitor-Drop Sigma-Floating-SC AC-DC Converter with 81.3% Peak Efficiency.
ISSCC
Fei Song, Shousheng Han, Rui Paulo Martins, Yan Lu
2025 C conf
An Always Dual-Path Hybrid DC-DC Converter with Multiphase Interleaving Switched-Capacitor Cell Obtaining 45% Output Ripple Reduction.
ISCAS
Zhewen Yu, Junwei Huang, Zhiguo Tong, Mo Huang, Rui Paulo Martins, Yan Lu
2025 J jnl
An Emulated Curve Assisted Fast-Transient Buck Converter With One-Cycle Charge Balance.
IEEE J. Solid State Circuits
Zihao Tang, Yan Lu, Rui Paulo Martins, Mo Huang
2025 J jnl
An Intrinsically PVT Robust 10-bit 2.6-GS/s Dynamic Pipelined ADC With Dual-Path Time-Assisted Residue Generation Scheme.
IEEE J. Solid State Circuits
Junyan Hao, Minglei Zhang, Zijian Liu, Yanbo Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2025 J jnl
An Inverter-Based Sampling Front-End Achieving >46-dB SFDR at 50-GHz Input.
IEEE Solid State Circuits Lett.
Zehang Wu, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins, Minglei Zhang
2025 J jnl
An Isolated DC-DC Converter With Full-Duplex Communication Using a Single Pair of Transformers.
IEEE J. Solid State Circuits
Tingxu Hu, Yan Lu, Rui Paulo Martins, Mo Huang
2025 — conf
An SC-first Hybrid SCVR with 4xCF Continuously Scalable-Conversion Ratio SC Achieving 92.5% Peak Efficiency.
CICC
Yuanfei Wang, Zhiyuan Zhang, Ziyang Zhong, Yihan Zhang, Rui Paulo Martins, Mo Huang
2025 J jnl
Analysis and Design of a Type-II Reference-Sampling PLL Using Gain-Boosting Phase Detector With Sampling Capacitor Reduction.
IEEE Trans. Circuits Syst. II Express Briefs
Tailong Xu, Haoran Li, Xi Meng, Xiangxun Zhan, Yatao Peng, Jun Yin, Shiheng Yang, Chao Fan, Zhixiang Huang, Rui Paulo Martins, Pui-In Mak
2025 J jnl
Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal-oxide-semiconductor.
Int. J. Circuit Theory Appl.
Chaowei Yang, Yong Chen, Kai Cheng, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak
2025 J jnl
Design and Analysis of a Type-II Sampling PLL With Automatic Frequency and Phase Calibrations Achieving 0.62-μs Locking Time.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Rui Paulo Martins, Pui-In Mak, Quan Pan
2025 — book
Fully-Integrated Low-Dropout Regulators
Xiangyu Mao, Yan Lu, Rui Paulo Martins
2025 J jnl
GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible Dataflow.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2025 — conf
HOOP: A Scalable Hybrid DC-DC Converter Ring for High-Performance Computing.
ISSCC
Zhiguo Tong, Zhewen Yu, Junwei Huang, Xiangyu Mao, Bernhard Wicht, Rui Paulo Martins, Yan Lu
2025 — conf
On the Usage of Genetic Algorithms, Reinforcement Learning and Bayesian Optimisation for RF IC Design Automation.
SMACD
Margarida Lourenço, Bingbing Zhao, Junde Li, Marcelino B. Santos, Pui-In Mak, Rui Paulo Martins, Wei-Han Yu, Fábio Passos
2025 — book
Revealing Hybrid DC-DC Converters
Mo Huang, Rui Paulo Martins
2024 J jnl
0.4-V Supply, 12-nW Reverse Bandgap Voltage Reference With Single BJT and Indirect Curvature Compensation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chon-Fai Lee, Chi-Wa U, Rui Paulo Martins, Chi-Seng Lam
2024 — conf
10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment.
ISSCC
Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2024 — conf
17.2 A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103μm
ISSCC
Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024 — conf
17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM.
ISSCC
Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024 — conf
22.1 A 12GS/s 12b 4× Time-Interleaved Pipelined ADC with Comprehensive Calibration of TI Errors and Linearized Input Buffer.
ISSCC
Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2024 — conf
23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCO.
ISSCC
Haijun Shao, Rui Paulo Martins, Pui-In Mak
2024 — conf
27.1 A Differential Hybrid Class-ED Power Amplifier with 27W Maximum Power and 82% Peak E2E Efficiency for Wireless Fast Charging To-Go.
ISSCC
Fangyu Mao, Rui Paulo Martins, Yan Lu
2024 — conf
28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output.
ISSCC
Qiaobo Ma, Yang Jiang, Huihua Li, Xiongjie Zhang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024 — conf
3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC Calibration.
ISSCC
Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024 — conf
31.5 A 750mW, 37% Peak Efficiency Isolated DC-DC Converter with 54/18Mb/s Full-Duplex Communication Using a Single Pair of Transformers.
ISSCC
Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu
2024 — conf
31.6 A SIDO/DISO VCF-Step-Reconfigurable Continuously Scalable-Conversion-Ratio SC Converter Achieving 91.4%/92.6% Peak Efficiency and Almost-lossless Channel Switching.
ISSCC
Yuanfei Wang, Mo Huang, Rui Paulo Martins, Yan Lu
2024 — conf
6.8 A 256×192-Pixel 30fps Automotive Direct Time-of-Flight LiDAR Using 8× Current-Integrating-Based TIA, Hybrid Pulse Position/Width Converter, and Intensity/CNN-Guided 3D Inpainting.
ISSCC
Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang
2024 — conf
7.4 A 0.027mm
ISSCC
Yunbo Huang, Yong Chen, Zunsong Yang, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A 0.012-mm
Int. J. Circuit Theory Appl.
Kai Cheng, Yong Chen, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Xin Lu, Jiangchao Wu, Zhao Wang, Yifei Xiang, Liyuan Liu, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024 J jnl
A 0.05-mm
IEEE J. Solid State Circuits
Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024 — conf
A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS.
CICC
Jiangchao Wu, Ke Hu, Xuanlin Chen, Pui-In Mak, Rui Paulo Martins, Man Kay Law
2024 — conf
A 1.58-nA CEPE-Based Hill-Climbing MPPT Technique with Compensated Ton Achieving 67.3% Efficiency at 10-nA Lload and > 97% MPPT Efficiency at VCR from 2 to 6.
CICC
Qiujin Chen, Tian Xia, Tingxu Hu, Yuanfei Wang, Mo Huang, Rui Paulo Martins, Yan Lu
2024 J jnl
A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time.
IEEE J. Solid State Circuits
Haihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A 12-GS/s 12-b 4× Time-Interleaved ADC Using Input-Independent Timing Skew Calibration With Global Dither Injection and Linearized Input Buffer.
IEEE J. Solid State Circuits
Yuefeng Cao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2024 J jnl
A 12V-to-1V Outphase-Interleaved SC Hybrid Converter With Enhanced Inductor De-Energizing Slew Rate and Adaptive Deadtime Control.
IEEE Trans. Circuits Syst. II Express Briefs
Xiongjie Zhang, Xinman Li, Anyang Zhao, Yang Jiang, Weihang Zhang, Jincheng Zhang, Rui Paulo Martins, Pui-In Mak
2024 — conf
A 12V-to-PoL CCC-Based Easy-Scalable Multiple-Phase Hybrid Converter with Auto VCF Balancing and Inactive CF Charging.
CICC
Jiacheng Yang, Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu
2024 — conf
A 160MHz-BW 68dB-SNDR 30.8mW Continuous-Time Pipeline DSM with Correlative Passive Low-Pass Filters and DAC Image Pre-Filtering.
CICC
Ke Li, Xianyu Congzhou, Liang Qi, Mingqiang Guo, Rui Paulo Martins, Sai-Weng Sin
2024 J jnl
A 167- μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double- Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO.
IEEE J. Solid State Circuits
Haijun Shao, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment.
IEEE J. Solid State Circuits
Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics.
IEEE J. Solid State Circuits
Xiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A 256 × 192 -Pixel Direct Time-of-Flight LiDAR Receiver With a Current-Integrating-Based AFE Supporting 240-m-Range Imaging.
IEEE J. Solid State Circuits
Chaorui Zou, Yaozhong Ou, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang
2024 J jnl
A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh.
IEEE J. Solid State Circuits
Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024 — conf
A 28nm 314.6TLFOPS/W Reconfigurable Floating-Point Analog Compute-In-Memory Macro with Exponent Approximation and Two-Stage Sharing TD-ADC.
CICC
Pengyu He, Yuanzhe Zhao, Heng Xie, Yang Wang, Shouyi Yin, Li Li, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan, Minglei Zhang
2024 — conf
A 320MHz BW NS TD-ADC Assisted C/DT Hybrid Pipelined ADC with SAB-based Residue Amplifying Filter.
A-SSCC
Kai Xing, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2024 J jnl
A 512-nW 0.003-mm² Forward-Forward Closed Box Trainer for an Analog Voice Activity Detector in 28-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Junde Li, Guoqiang Xin, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024 — conf
A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform Quantization.
MWSCAS
Guoqiang Xin, Fei Tan, Junde Li, Junren Chen, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024 — conf
A 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62μs Locking Time in 28nm CMOS.
CICC
Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Pui-In Mak, Rui Paulo Martins, Quan Pan
2024 — conf
A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from -25 to 85°C.
CICC
Guangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang, Milin Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024 — conf
A 75dB-SNDR 10MHz-BW 2-Channel Time-Interleaved Noise-Shaping SAR ADC Directly Powered by an On-Chip DC-DC Converter.
CICC
Haoyu Gong, Wen-Liang Zeng, Mingqiang Guo, Chi-Seng Lam, Shulin Zhao, Rui Paulo Martins, Sai-Weng Sin
2024 J jnl
A 93.4% Peak Efficiency C
IEEE J. Solid State Circuits
Feiyu Li, Qishen Fang, Jiangchao Wu, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024 — conf
A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT Augmentation.
CICC
Huihua Li, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024 — conf
A Compact Low-power 16b SAR ADC using Reservoir-Charge-Redistributed DAC and Configurable Floating-Inverter-Based Comparator.
A-SSCC
Chenxi Yuan, Xianghui Pan, Zihao Zheng, Yan Song, Rui Paulo Martins, Yan Zhu, Chi-Hang Chan
2024 J jnl
A Complementary Drain-Grounded VCO-PA Improving Transmit Efficiency Over a Wide EIRP Range.
IEEE Trans. Circuits Syst. II Express Briefs
Zhizhan Yang, Jun Yin, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A Constant-Power and Optimal-Transfer-Efficiency Wireless Inductive Power Transfer Converter for Battery Charger.
IEEE Trans. Ind. Electron.
Io-Wa Iam, Chio-Kuan Choi, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins
2024 J jnl
A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction.
IEEE J. Solid State Circuits
Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024 C conf
A Delta-Sigma-Based Computing-In-Memory Macro Targeting Edge Computation.
ISCAS
Ran Zhang, Ka-Fai Un, Mingqiang Guo, Liang Qi, Dengke Xu, Weibing Zhao, Rui Paulo Martins, Franco Maloberti, Sai-Weng Sin
2024 J jnl
A Fast Startup 38.4-MHz Crystal Oscillator Achieving 99-nJ Startup Energy With Adaptive Chirping.
IEEE Access
Abdolraouf Rahmani, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2024 — conf
A Fast-Slow Two-Module DC-DC Solution with Transient and Efficiency Improvements for 2.5D/3D Integration.
CICC
Junwei Huang, Zhiguo Tong, Xiangyu Mao, Chi-Seng Lam, Rui Paulo Martins, Yan Lu
2024 — conf
A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm
VLSI Technology and Circuits
Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024 J jnl
A Fully Synthesizable All-Digital Dual-Loop Distributed Low-Dropout Regulator.
IEEE J. Solid State Circuits
Xiangyu Mao, Yan Lu, Rui Paulo Martins
2024 — conf
A Miniaturized MRI Scanner Featuring a HighVoltage SOI ASIC for Non-Invasive Object Reconstruction and Flow Analysis.
BioCAS
Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024 — conf
A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm
CICC
Qiaobo Ma, Huihua Li, Jiahao Shi, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024 — conf
A PVT-Robust 8b 20GS/s Time-Interleaved SAR ADC with Quantization-Embedded Current-Mode Buffer and Differ-Based Dither Timing Skew Calibration.
CICC
Wei Zhang, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2024 — conf
A Quad-Output Hybrid Buck Converter with 8-Inductor Helping One Spot from All Quarters for Multi-Core XPUs.
CICC
Xiangyu Mao, Junwei Huang, Zhiguo Tong, Rui Paulo Martins, Yan Lu
2024 J jnl
A Radio-Frequency Cross-Connected Rectifier With LC Source Degeneration.
IEEE Trans. Circuits Syst. I Regul. Pap.
Qiujin Chen, Mo Huang, Tian Xia, Jun Yin, Haiwen Liu, Rui Paulo Martins, Yan Lu
2024 J jnl
A Single-Inductor Multiple-Output DC-DC Converter With Fixed-Frequency Victim-Last Charge Control for Reduced Cross Regulation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yang Li, Mo Huang, Rui Paulo Martins, Yan Lu
2024 J jnl
A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna-TRX Interface.
IEEE J. Solid State Circuits
Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Rui Paulo Martins, Pui-In Mak
2024 J jnl
An ELDC-Free 4th-Order CT SDM Facilitated by 2nd-Order NS CT-SAR and AC-Coupled Negative-R.
IEEE J. Solid State Circuits
Zixuan Xu, Kai Xing, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2024 — conf
An Emulated Peak/Valley Curve Assisted Fast-Transient Buck Converter Achieving Precise One-Cycle Charge Balance with One-Parameter Calibration.
CICC
Zihao Tang, Mo Huang, Rui Paulo Martins, Yan Lu
2024 J jnl
An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Rujian Cao, Zhongyu Zhao, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2024 J jnl
An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and C
IEEE J. Solid State Circuits
Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Anyang Zhao, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024 J jnl
CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yuzhao Fu, Jixuan Li, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins, Pui-In Mak
2024 J jnl
Extended Power Dynamic Range and Enhanced Power Conversion Efficiency of a Switched-Capacitor DC-DC Converter: A Tutorial.
IEEE Trans. Circuits Syst. II Express Briefs
Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Pui-In Mak, Rui Paulo Martins
2024 J jnl
FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm
IEEE J. Solid State Circuits
Yuzhao Fu, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Minglei Zhang, Rui Paulo Martins, Pui-In Mak
2024 J jnl
Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks.
IEEE Trans. Inf. Forensics Secur.
Chongyao Xu, Litao Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024 — conf
Invited Paper: A Multi-Phase Multi-Ratio Resonant Switched-Capacitor DC-DC Converter with Improved Power Density.
ICTA
Jiyuan Liu, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024 — conf
Invited Paper: A Ping-Pong Analog Delta Generator for Delt-Sigma Computing-In-Memory SRAM Macro for Edge AI Processing.
ICTA
Ran Zhang, Ka-Fai Un, Zhensheng Li, Mingqiang Guo, Liang Qi, Rui Paulo Martins, Sai-Weng Sin
2024 J jnl
Miniature Magnetic Resonance Imaging System for in situ Monitoring of Bacterial Growth and Biofilm Formation.
IEEE Trans. Biomed. Circuits Syst.
Qi Zhou, Shuhao Fan, Ka-Meng Lei, Donhee Ham, Rui Paulo Martins, Pui-In Mak
2024 — conf
Model Predictive Control with Fixed Switching Frequency for Thyristor-Controlled LC-Coupling Hybrid Active Power Filter.
ISIE
Wai-Kit Sou, Rui Paulo Martins, Chi-Seng Lam
2024 J jnl
One-Cycle-Startup Relaxation Oscillator Using Ratiometric Threshold-Referenced and Self-Synchronized Power Gating Techniques.
IEEE Trans. Circuits Syst. II Express Briefs
Guangshu Zhao, Zhiming Xiao, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024 J jnl
Sub-μW Auto-Calibration Bandgap Voltage Reference With 1σ Inaccuracy of ± 0.12% Within - 40°C to 120°C.
IEEE J. Solid State Circuits
Chi-Wa U, Man-Kay Law, Rui Paulo Martins, Chi-Seng Lam
2024 — conf
The Race for the Extra Pico Second without Losing the Decibel: A Partial-Review of Single-Channel Energy-Efficient High-Speed Nyquist ADCs.
CICC
Chi-Hang Chan, Minglei Zhang, Yuefeng Cao, Honazhi Zhao, Rui Paulo Martins, Yan Zhu
2023 J jnl
A 0.016mm
IEEE Trans. Circuits Syst. II Express Briefs
Junlin Zhong, Xiaofeng Yang, Rui Paulo Martins, Yan Zhu, Chi-Hang Chan
2023 — conf
A 0.05-to-3.1A 585mA/mm
VLSI Technology and Circuits
Xiongjie Zhang, Qiaobo Ma, Anyang Zhao, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A 0.4-V 0.0294-mm
IEEE J. Solid State Circuits
Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2023 J jnl
A 0.4-V 8400-μm
IEEE Trans. Circuits Syst. II Express Briefs
Chengyu Che, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2023 J jnl
A 0.5V 22.5ppm/°C Bandgap Voltage Reference With Leakage Current Injection for Curvature Correction.
IEEE Trans. Circuits Syst. II Express Briefs
Chon-Fai Lee, Chi-Wa U, Rui Paulo Martins, Chi-Seng Lam
2023 J jnl
A 1-A Switching LDO With 40-mV Dropout Voltage and Fast DVS.
IEEE Trans. Circuits Syst. II Express Briefs
Xiangyu Mao, Yan Lu, Rui Paulo Martins
2023 J jnl
A 10.5 W, 93% Efficient Dual-Path Hybrid (DPH)-Based DC-DC Converter Incorporating a Continuous-Current-Input Switched-Capacitor Stage and Enhanced I
IEEE Trans. Circuits Syst. I Regul. Pap.
Qiaobo Ma, Xiongjie Zhang, Anyang Zhao, Huihua Li, Yang Jiang, Man-Kay Law, Makoto Takamiya, Rui Paulo Martins, Pui-In Mak
2023 J jnl
A 10.8-to-37.4 Gb/s Reference-Less FD-Less Single-Loop Quarter-Rate Bang-Bang Clock and Data Recovery Employing Deliberate-Current- Mismatch Wide-Frequency-Acquisition Technique.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2023 J jnl
A 10b 700 MS/s Single-Channel 1b/Cycle SAR ADC Using a Monotonic-Specific Feedback SAR Logic With Power-Delay-Optimized Unbalanced N/P-MOS Sizing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Mingqiang Guo, Liang Qi, Weibing Zhao, Gang Xiao, Rui Paulo Martins, Sai-Weng Sin
2023 J jnl
A 12-bit 1GS/s ADC With Background Distortion and Split-ADC-Like Gain Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lai Wei, Zihao Zheng, Nereo Markulic, Jorge Lagos, Ewout Martens, Rui Paulo Martins, Yan Zhu, Jan Craninckx, Chi-Hang Chan
2023 J jnl
A 12-to-1 Flying Capacitor Cross-Connected Buck Converter With Inserted D > 0.5 Control for Fast Transient Response.
IEEE J. Solid State Circuits
Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu
2023 J jnl
A 12-to-1 V Quad-Output Switched-Capacitor Buck Converter With Shared DC Capacitors.
IEEE J. Solid State Circuits
Tingxu Hu, Mo Huang, Rui Paulo Martins, Yan Lu
2023 — conf
A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8μs Startup Time.
ISSCC
Haihua Li, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2023 — conf
A 12V-lnput 1V-1.8V-Output 93.7% Peak Efficiency Dual-Inductor Quad-Path Hybrid DC-DC Converter.
ISSCC
Wen-Liang Zeng, Guigang Cai, Chon-Fai Lee, Chi-Seng Lam, Yan Lu, Sai-Weng Sin, Rui Paulo Martins
2023 — conf
A 12V-to-1V Quad-Output Switched-Capacitor Buck Converter with Shared DC Capacitors Achieving 90.4% Peak Efficiency and 48mA/mm
ISSCC
Tingxu Hu, Mo Huang, Yan Lu, Rui Paulo Martins
2023 — conf
A 12b 1GS/s ADC with Lightweight Input Buffer Distortion Background Calibration Achieving >75dB SFDR over PVT.
CICC
Xiang-Hui Pan, Buhui Rui, Yuefeng Cao, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 J jnl
A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier.
IEEE J. Solid State Circuits
Wenning Jiang, Yan Zhu, Chixiao Chen, Hao Xu, Qi Liu, Ming Liu, Rui Paulo Martins, Chi-Hang Chan
2023 — conf
A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz.
ISSCC
Xiangxun Zhan, Jun Yin, Pui-In Mak, Rui Paulo Martins
2023 — conf
A 23-nA Quiescent Current Output-Capacitorless LDO Regulator for IoT Devices.
ASICON
Shengnan Zhou, Xiangyu Mao, Cheng Huang, Rui Paulo Martins, Yan Lu
2023 — conf
A 25MHz-BW 77.2dB-SNDR 2
ISSCC
Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 J jnl
A 27-dBm, 0.92-GHz CMOS Power Amplifier With Mode Switching and a High-Q Compact Inductor (HQCI) Achieving a 30% Back-Off PAE.
IEEE Trans. Circuits Syst. II Express Briefs
Arvind Singh Rawat, Jagadheswaran Rajendran, Selvakumar Mariappan, Narendra Kumar, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A 28-nm 368-fJ/Cycle, 0.43%/V Supply-Sensitivity, FLL-Based RC Oscillator Featuring Positive-TC-Only Resistors and ΔΣM-Based Trimming.
IEEE Trans. Circuits Syst. II Express Briefs
Yunbo Huang, Yong Chen, Kaiyuan Yang, Paolo Crovetti, Pui-In Mak, Rui Paulo Martins
2023 — conf
A 2x-lnterleaved 9b 2.8G8S/s 5b/cycle SAR ADC with Linearized Configurable V2T Buffer Achieving >50dB SNDR at 3GHz Input.
ISSCC
Hongzhi Zhao, Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 J jnl
A 3.07 mW 30 MHz-BW 73.2 dB-SNDR Time- Interleaved Noise-Shaping SAR ADC With Self-Coupling Second-Order Error-Feedforward.
IEEE J. Solid State Circuits
Shulin Zhao, Mingqiang Guo, Liang Qi, Dengke Xu, Guoxing Wang, Rui Paulo Martins, Sai-Weng Sin
2023 J jnl
A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fs
IEEE Trans. Very Large Scale Integr. Syst.
Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A 3.78-GHz Type-I Sampling PLL With a Fully Passive K
IEEE Trans. Circuits Syst. I Regul. Pap.
Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins
2023 — conf
A 42W Reconfigurable Bidirectional Power Delivery Voltage-Regulating Cable.
ISSCC
Zhiguo Tong, Junwei Huang, Yan Lu, Rui Paulo Martins
2023 J jnl
A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM.
IEEE J. Solid State Circuits
Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2023 — conf
A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier.
ISSCC
Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A 52.5-dB 2× Time-Interleaved 2.8-GS/s SAR ADC With 5-bit/Cycle Time-Domain Quantization and a Compact Signal DAC.
IEEE J. Solid State Circuits
Hongzhi Zhao, Minglei Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2023 — conf
A 5V-to-0.5V Inductor-First Inductor-on-Ground Switched Capacitor Multi-Path Hybrid DC-DC Converter.
CICC
Junwei Huang, Zhiguo Tong, Yan Lu, Chi-Seng Lam, Rui Paulo Martins
2023 J jnl
A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation.
Int. J. Circuit Theory Appl.
Lin Wang, Yong Chen, Chaowei Yang, Xionghui Zhou, Mei Han, Paolo Stefano Crovetti, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A 6.78-MHz Wireless Power Transfer System With Inherent Wireless Phase Shift Control Without Feedback Data Sensing Coil.
IEEE J. Solid State Circuits
Xianglong Bai, Yan Lu, Chenchang Zhan, Rui Paulo Martins
2023 — conf
A 79.5dB-SNDR Pipelined-SAR ADC with a Linearity-Shifting 32× Dynamic Amplifier and Mounted-Over-Die Bypass Capacitors.
VLSI Technology and Circuits
Minglei Zhang, Yuefeng Cao, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 C conf
A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2
ISCAS
Yunbo Huang, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A 95% Peak Efficiency Modified KY Converter With Improved Flying Capacitor Charging in DCM for IoT Applications.
IEEE J. Solid State Circuits
Caolei Pan, Wen-Liang Zeng, Chi-Seng Lam, Sai-Weng Sin, Chenchang Zhan, Rui Paulo Martins
2023 — conf
A Compact 12V-to-1V 91.8% Peak Efficiency Hybrid Resonant Switched-Capacitor Parallel Inductor (ReSC-PL) Buck Converter.
ISSCC
Guigang Cai, Yan Lu, Rui Paulo Martins
2023 J jnl
A Continuous-Output-Current Buck-Boost Converter Without Right-Half-Plane-Zero (RHPZ).
IEEE Trans. Circuits Syst. I Regul. Pap.
Caolei Pan, Chenchang Zhan, Rui Paulo Martins, Chi-Seng Lam
2023 — conf
A Continuously Scalable-Conversion-Ratio SC Converter with Reconfigurable VCF Step for High Efficiency over an Extended VCR Range.
ISSCC
Yuanfei Wang, Mo Huang, Yan Lu, Rui Paulo Martins
2023 — conf
A Cross-Coupled Hybrid SC Converter with Extended VCR Range and Intrinsic Loss Balance Achieving 90% Average Efficiency with 1.5% Variation Over Full Li-ion Battery Input Range and 0.95A/mm
A-SSCC
Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2023 — conf
A Double-Mode Sparse Compute-In-Memory Macro with Reconfigurable Single and Dual Layer Computation.
CICC
Yuanzhe Zhao, Minglei Zhang, Pengyu He, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 J jnl
A Flexible Rooftop Photovoltaic-Inductive Wireless Power Transfer System for Low-Voltage DC Grid.
IEEE Access
Io-Wa Iam, Zhaoyi Ding, Zhicong Huang, Chi-Seng Lam, Rui Paulo Martins, Pui-In Mak
2023 J jnl
A Fully Integrated CMOS Tri-Band Ambient RF Energy Harvesting System for IoT Devices.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jack Kee Yong, Wen Xun Lian, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A Fully-Integrated CMOS Dual-Band RF Energy Harvesting Front-End Employing Adaptive Frequency Selection.
IEEE Access
Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A High-Current Scalable Parallel LDO Scheme With Analog-Digital Merged Control for Small Current-Sharing Mismatch.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiangyu Mao, Yan Lu, Chuang Wang, Rui Paulo Martins
2023 J jnl
A High-PCE Range-Extension CMOS Rectifier Employing Advanced Topology Amalgamation Technique for Ambient RF Energy Harvesting.
IEEE Trans. Circuits Syst. II Express Briefs
Alexander Choo Chia Chun, Yi Chen Lee, Harikrishnan Ramiah, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A High-Performance Dual-Topology CMOS Rectifier With 19.5-dB Power Dynamic Range for RF-Based Hybrid Energy Harvesting.
IEEE Trans. Very Large Scale Integr. Syst.
Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A Hybrid Single-Inductor Bipolar Triple-Output DC-DC Converter With High-Quality Positive Outputs for AMOLED Displays.
IEEE Trans. Circuits Syst. I Regul. Pap.
Fangyu Mao, Yan Lu, Franco Maloberti, Rui Paulo Martins
2023 J jnl
A Level Shifter With Almost Full Immunity to Positive dv/dt for Buck Converters.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yunzhe Yang, Mo Huang, Sijun Du, Rui Paulo Martins, Yan Lu
2023 J jnl
A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm
IEEE J. Solid State Circuits
Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A Reconfigurable CMOS Stack Rectifier With 22.8-dB Dynamic Range Achieving 47.91% Peak PCE for IoT/WSN Application.
IEEE Trans. Very Large Scale Integr. Syst.
Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Alexander Choo Chia Chun, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 J jnl
A Second-Order NS Pipelined SAR ADC With Quantization-Prediction-Unrolled Gain Error Shaping and Fully Passive Integrator.
IEEE J. Solid State Circuits
Hongshuai Zhang, Yan Zhu, Rui Paulo Martins, Chi-Hang Chan
2023 — conf
A Single-Channel 12b 2GS/s PVT-Robust Pipelined ADC with Critically Damped Ring Amplifier and Time-Domain Quantizer.
ISSCC
Yuefeng Cao, Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 — conf
A Single-Channel 2.6GS/s 10b Dynamic Pipelined ADC with Time-Assisted Residue Generation Scheme Achieving Intrinsic PVT Robustness.
ISSCC
Junyan Hao, Minglei Zhang, Yanbo Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 — conf
A Single-Channel 70dB-SNDR 100MHz-BW 4
ISSCC
Yanbo Zhang, Junyan Hao, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 J jnl
A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting Application.
IEEE Access
Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 — conf
A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power.
ISSCC
Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, Rui Paulo Martins
2023 J jnl
All Rivers Flow to the Sea: A High-Density Wireless Power Receiver With Split-Dual-Path and Hybrid-Quad-Path Step-Down Rectifying Conversion.
IEEE J. Solid State Circuits
Zixiao Lin, Yan Lu, Fangyu Mao, Chuang Wang, Rui Paulo Martins
2023 J jnl
An 1 V Supply, 740 nW, 8.7 ppm/°C Bandgap Voltage Reference With Segmented Curvature Compensation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chi-Wa U, Cong Liu, Rui Paulo Martins, Chi-Seng Lam
2023 — conf
An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $\text{FoM}_{\mathrm{T}}$.
ISSCC
Hao Guo, Yong Chen, Yunbo Huang, Pui-In Mak, Rui Paulo Martins
2023 — conf
An ELDC-Free 2.78mW 20MHz-BW 75.5dB-SNDR 4th- Order CTSDM Facilitated by 2nd-Order CT NS-SAR and AC-Coupled Negative-R.
CICC
Zixuan Xu, Kai Xing, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2023 J jnl
An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2023 J jnl
An SC-Parallel-Inductor Hybrid Buck Converter With Reduced Inductor Voltage and Current.
IEEE J. Solid State Circuits
Guigang Cai, Yan Lu, Rui Paulo Martins
2023 J jnl
An Ultra-Low-Voltage Single-Crystal Oscillator-Timer (XO-Timer) Delivering 16-MHz and 32.258-kHz Clocks for Sub-0.5-V Energy-Harvesting BLE Radios in 28-nm CMOS.
IEEE Open J. Circuits Syst.
Liwen Lin, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2023 — conf
Analog and Mixed-Signal CMOS Circuits: The emergence and leadership of a Lab, a reference Book and the future at the core of the A/D Interface in the IoE.
ESSCIRC
Rui Paulo Martins
2023 J jnl
Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xi Meng, Haoran Li, Peng Chen, Jun Yin, Pui-In Mak, Rui Paulo Martins
2023 J jnl
Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review.
IEEE Access
Li Fang Lai, Harikrishnan Ramiah, Tan Yee Chyan, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 J jnl
Design and Implementation of Hybrid DC-DC Converter: A Review.
IEEE Access
Teck Seong Chang, Harikrishnan Ramiah, Yang Jiang, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2023 J jnl
Floating-Domain Integrated GaN Driver Techniques for DC-DC Converters: A Review.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xuchu Mu, Guangshu Zhao, Anyang Zhao, Yang Jiang, Man-Kay Law, Makoto Takamiya, Pui-In Mak, Rui Paulo Martins
2023 — conf
Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm
A-SSCC
Jiangchao Wu, Guangshu Zhao, Litao Zhang, Yu Jia, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man Kay Law
2023 J jnl
High-Performance Multiband Ambient RF Energy Harvesting Front-End System for Sustainable IoT Applications - A Review.
IEEE Access
Yi Chen Lee, Harikrishnan Ramiah, Alexander Choo Chia Chun, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 J jnl
IoT Cloud-Edge Reconfigurable Mixed-Signal Smart Meter Platform for Arc Fault Detection.
IEEE Internet Things J.
Ya-Jie Wu, Ricardo Brito, Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins
2023 J jnl
Modeling-Attack-Resistant Strong PUF Exploiting Stagewise Obfuscated Interconnections With Improved Reliability.
IEEE Internet Things J.
Chongyao Xu, Litao Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2023 J jnl
Relative Stability Analysis of Multi-Loop Low Dropout Regulators Using a Sub-Loop Superposition Method.
IEEE Trans. Circuits Syst. II Express Briefs
Zihan Yang, Mo Huang, Yan Lu, Rui Paulo Martins
2023 — conf
Simple-Logic Comparator-Offset Mitigation Technique for Resistor-Based Temperature Sensor in DFLL.
ICTA
Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2023 J jnl
Transfer-Path-Based Hardware-Reuse Strong PUF Achieving Modeling Attack Resilience With200 Million Training CRPs.
IEEE Trans. Inf. Forensics Secur.
Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2023 J jnl
Universal Stability Criterion for Type-I Sampling Phase-Locked Loops.
IEEE Trans. Circuits Syst. II Express Briefs
Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023 — conf
Weightings in Incremental ADCs: A Tutorial Review.
CICC
Ruiqi Gao, Mingqiang Guo, Sai-Weng Sin, Liang Qi, Biao Wang, Guoxing Wang, Rui Paulo Martins
2022 J jnl
A -20-dBm Sensitivity RF Energy-Harvesting Rectifier Front End Using a Transformer IMN.
IEEE Trans. Very Large Scale Integr. Syst.
Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A 0.0285-mm
IEEE J. Solid State Circuits
Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A 0.1-V V
IEEE Trans. Circuits Syst. II Express Briefs
Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A 1.2-A Calibration-Free Hybrid LDO With In-Loop Quantization and Auxiliary Constant Current Control Achieving High Accuracy and Fast DVS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiangyu Mao, Yan Lu, Rui Paulo Martins
2022 J jnl
A 1.7-3.6 GHz 20 MHz-Bandwidth Channel-Selection N-Path Passive-LNA Using a Switched-Capacitor-Transformer Network Achieving 23.5 dBm OB-IIP₃ and 3.4-4.8 dB NF.
IEEE J. Solid State Circuits
Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2022 — conf
A 10.8-to-37.4Gb/s Single-Loop Quarter-Rate BBCDR Without External Reference and Separate FD Featuring a Wide-Frequency-Acquisition Scheme.
ICECS 2022
Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2022 J jnl
A 108-nW 0.8-mm
IEEE J. Solid State Circuits
Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2022 — conf
A 108nW 0.8mm
ISSCC
Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2022 — conf
A 10b 700MS/s single-channel 1b/cycle SAR ADC using a monotonic-specific feedback SAR logic with power-delay-optimized unbalanced N/P-MOS sizing.
CICC
Mingqiang Guo, Sai-Weng Sin, Liang Qi, Gang Xiao, Rui Paulo Martins
2022 J jnl
A 20 MHz Bandwidth 79 dB SNDR SAR-Assisted Noise-Shaping Pipeline ADC With Gain and Offset Calibrations.
IEEE J. Solid State Circuits
Yanbo Zhang, Jin Zhang, Shubin Liu, Ruixue Ding, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2022 J jnl
A 266-μW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77-dB SFDR and -3-dBm OOB-B
IEEE J. Solid State Circuits
Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins
2022 — conf
A 266µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and -3dBm OOB-B-1dB.
ISSCC
Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins
2022 — conf
A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector.
NorCAS
Xinyi Ge, Yong Chen, Lin Wang, Nan Qi, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM.
IEEE Trans. Very Large Scale Integr. Syst.
Zunsong Yang, Yong Chen, Jia Yuan, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A 3.3-GS/s 6-b Fully Dynamic Pipelined ADC With Linearized Dynamic Amplifier.
IEEE J. Solid State Circuits
Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui Paulo Martins
2022 — conf
A 4A 12-to-1 Flying Capacitor Cross-Connected DC-DC Converter with Inserted D>0.5 Control Achieving >2x Transient Inductor Current Slew Rate and 0.73× Theoretical Minimum Output Undershoot of DSD.
ISSCC
Tingxu Hu, Mo Huang, Yan Lu, Rui Paulo Martins
2022 J jnl
A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jieyun Zhang, Chongyao Xu, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Peng Chen, Xi Meng, Jun Yin, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski
2022 J jnl
A 6-to-7.5-GHz 54-fs
IEEE Trans. Circuits Syst. I Regul. Pap.
Tailong Xu, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins
2022 — conf
A Battery-Input Sub-1V Output 92.9% Peak Efficiency 0.3A/mm
ISSCC
Guigang Cai, Yan Lu, Rui Paulo Martins
2022 J jnl
A Capacitor-Cross-Connected Boost Converter With Duty Cycle < 0.5 Control for Extended Conversion-Ratio and Soft Start-Up.
IEEE Trans. Circuits Syst. I Regul. Pap.
Tingxu Hu, Mo Huang, Yan Lu, Rui Paulo Martins
2022 J jnl
A Dual-Branch Series-Parallel Hybrid Buck DC-DC Converter With Flying Capacitor Voltage Auto-Balancing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chuang Wang, Yan Lu, Xiuping Li, Rui Paulo Martins
2022 J jnl
A Fully-Integrated Ambient RF Energy Harvesting System with 423-μW Output Power.
Sensors
Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A Highly Integrated Tri-Path Hybrid Buck Converter With Reduced Inductor Current and Self-Balanced Flying Capacitor Voltage.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chuang Wang, Yan Lu, Rui Paulo Martins
2022 C conf
A Hybrid Boost Converter with Regulated Flying Capacitor Voltage and Reduced Inductor Current for LED Lighting.
ISCAS
Chuang Wang, Zixiao Lin, Yan Lu, Xiuping Li, Rui Paulo Martins
2022 J jnl
A Low-Power Multiband Blocker-Tolerant Receiver With a Steep Filtering Slope Using an N-Path LNA With Feedforward OB Blocker Cancellation and Filtering-by-Aliasing Baseband Amplifiers.
IEEE Trans. Circuits Syst. I Regul. Pap.
Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A Millimeter-Wave CMOS VCO Featuring a Mode-Ambiguity-Aware Multi-Resonant-RLCM Tank.
IEEE Trans. Circuits Syst. I Regul. Pap.
Hao Guo, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm
IEEE Trans. Very Large Scale Integr. Syst.
Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A Reconfigurable Single-Stage Asymmetrical Full-Wave Step-Down Rectifier for Bidirectional Device-to-Device Wireless Fast Charging.
IEEE J. Solid State Circuits
Fangyu Mao, Yan Lu, Rui Paulo Martins
2022 C conf
A Robust Hybrid CT/DT 0-2 MASH DSM with Passive Noise-Shaping SAR ADC.
ISCAS
Ke Li, Sai-Weng Sin, Liang Qi, Weibing Zhao, Guoxing Wang, Rui Paulo Martins
2022 J jnl
A Scalable High-Current High-Accuracy Dual-Loop Four-Phase Switching LDO for Microprocessors.
IEEE J. Solid State Circuits
Xiangyu Mao, Yan Lu, Rui Paulo Martins
2022 J jnl
A Single-Opamp Third Order CT ΔΣ Modulator With SAB-ELD-Merged Integrator and Three-Stage Hybrid Compensation Opamp.
IEEE Trans. Circuits Syst. I Regul. Pap.
Kai Xing, Wei Wang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2022 J jnl
A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS.
IEEE J. Solid State Circuits
Xiaoteng Zhao, Yong Chen, Lin Wang, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2022 — conf
A Switched-Capacitor Hybrid Quadratic Buck Converter for 48V-Input Wide-Range Conversion.
ICECS 2022
Ruijie Zhao, Xiongjie Zhang, Xuchu Mu, Huihua Li, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022 J jnl
A Symmetrical Double Step-Down Converter With Extended Voltage Conversion Ratio.
IEEE Trans. Circuits Syst. I Regul. Pap.
Junwei Huang, Chi-Seng Lam, Yan Lu, Rui Paulo Martins
2022 J jnl
A Weak PUF-Assisted Strong PUF With Inherent Immunity to Modeling Attacks and Ultra-Low BER.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jiahao Liu, Yuanzhe Zhao, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2022 — conf
A low dropout regulator with PSR under -48dB up to 20GHz for a SARADC reference buffer.
MWSCAS
Yi Zeng, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2022 — conf
Adaptive Line-Transient Enhancement Techniques for Dual-Path Hybrid Converter Achieving Ultra-Low Output Overshoot/Undershoot.
APCCAS
Huihua Li, Qiaobo Ma, Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022 — conf
All Rivers Flow to the Sea: A High Power Density Wireless Power Receiver with Split-Dual-Path Rectification and Hybrid-Quad-Path Step-Down Conversion.
CICC
Zixiao Lin, Yan Lu, Fangyu Mao, Chuang Wang, Rui Paulo Martins
2022 J jnl
An Analog Multiplier Controlled Buck-Boost Converter.
IEEE Trans. Circuits Syst. II Express Briefs
Sibo Wen, Wen-Liang Zeng, Chi-Seng Lam, Franco Maloberti, Rui Paulo Martins
2022 C conf
An Auxiliary-Loop-Enhanced Fast-Transient FVF LDO as Reference Buffer of a SAR ADC.
ISCAS
Yi Zeng, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2022 J jnl
An Entropy-Source-Preselection-Based Strong PUF With Strong Resilience to Machine Learning Attacks and High Energy Efficiency.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2022 J jnl
An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition.
IEEE Trans. Circuits Syst. II Express Briefs
Lei Xuan, Ka-Fai Un, Chi-Seng Lam, Rui Paulo Martins
2022 J jnl
An FPGA-Based Self-Reconfigurable Arc Fault Detection System for Smart Meters.
IEEE Trans. Circuits Syst. II Express Briefs
Ya-Jie Wu, Wai-Hei Choi, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins
2022 J jnl
An Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC With Code-Counter-Based Offset Calibration.
IEEE J. Solid State Circuits
Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2022 J jnl
Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery.
IEEE J. Solid State Circuits
Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022 J jnl
Background Timing Mismatch Calibration Techniques in High-Speed Time-Interleaved ADCs: A Tutorial Review.
IEEE Trans. Circuits Syst. II Express Briefs
Mingqiang Guo, Sai-Weng Sin, Liang Qi, Dengke Xu, Guoxing Wang, Rui Paulo Martins
2022 — conf
Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters.
MWSCAS
Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022 — conf
Design and Implementation of a Low Power Switched-Capacitor-Based Analog Feature Extractor for Voice Keyword Spotting.
APCCAS
Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2022 J jnl
Evaluation and Perspective of Analog Low-Dropout Voltage Regulators: A Review.
IEEE Access
Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022 J jnl
Fully-Integrated Timers for Ultra-Low-Power Internet-of-Things Nodes - Fundamentals and Design Techniques.
IEEE Access
Mikki How-Wen Loo, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2022 — conf
High Linearity BJT-Based Time-Domain CMOS Temperature Sensor.
APCCAS
Yu Lei, Qishen Fang, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022 J jnl
High-Performance Harmonic-Rich Single-Core VCO With Multi-LC Tank: A Tutorial.
IEEE Trans. Circuits Syst. II Express Briefs
Yong Chen, Pui-In Mak, Rui Paulo Martins
2022 — conf
LSB-Reused Protection Technique in Secure SAR ADC against Power Side-Channel Attack.
AsianHOST
Lele Fang, Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2022 J jnl
Low Voltage Switched-Capacitive-Based Reconfigurable Charge Pumps for Energy Harvesting Systems: An Overview.
IEEE Access
Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2022 J jnl
Miniaturization of a Nuclear Magnetic Resonance System: Architecture and Design Considerations of Transceiver Integrated Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2022 J jnl
Miniaturized Energy Harvesting Systems Using Switched-Capacitor DC-DC Converters.
IEEE Trans. Circuits Syst. II Express Briefs
Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins
2022 J jnl
Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Peng Chen, Jun Yin, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski
2022 — conf
Modelling and Analysis of ΔΣ-Modulation-Based Output Spectrum Spur Reduction in Dual-Path Hybrid DC-DC Converters.
PRIME
Xiongjie Zhang, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022 J jnl
Supply-Noise-Desensitized Techniques for Low Jitter RO-Based PLL Achieving ≤1.6 ps RMS Jitter Within Full-Spectrum Supply Interference.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yu Duan, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2022 J jnl
Switched-Capacitor Bandgap Voltage Reference for IoT Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chi-Wa U, Man-Kay Law, Chi-Seng Lam, Rui Paulo Martins
2022 J jnl
Wideband Continuous-Time MASH Delta-Sigma Modulators: A Tutorial Review.
IEEE Trans. Circuits Syst. II Express Briefs
Liang Qi, Yuekai Liu, Sai-Weng Sin, Xinpeng Xing, Guoxing Wang, Maurits Ortmanns, Rui Paulo Martins
2021 — conf
27.6 A 25MHz-BW 75dB-SNDR Inherent Gain Error Tolerance Noise-Shaping SAR-Assisted Pipeline ADC with Background Offset Calibration.
ISSCC
Hongshuai Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2021 J jnl
A 0.003-mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A 0.35-V 5, 200-μm
IEEE J. Solid State Circuits
Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2021 — conf
A 0.45-V 3.3-µW Resistor-Based Temperature Sensor Achieving 10mK Resolution in 65-nm CMOS.
ICTA
Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2021 — conf
A 0.46pJ/bit Ultralow-Power Entropy-Preselection-Based Strong PUF with Worst-Case BER
A-SSCC
Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2021 J jnl
A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-Distorter (DAAPD) Reconfigurable Linearization Technique.
IEEE Trans. Circuits Syst. II Express Briefs
Selvakumar Mariappan, Jagadheswaran Rajendran, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching.
IEICE Electron. Express
Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021 — conf
A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2
A-SSCC
Xi Meng, Junqi Guo, Haoran Li, Jun Yin, Pui-In Mak, Rui Paulo Martins
2021 — conf
A 20GS/s 8b Time-Interleaved Time-Domain ADC with Input-Independent Background Timing Skew Calibration.
VLSI Circuits
Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2021 J jnl
A 3-Phase Resonant Switched-Capacitor Converter for Data Center 48-V Rack Power Distribution.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chuang Wang, Yan Lu, Nan Sun, Rui Paulo Martins
2021 J jnl
A 3.36-GHz Locking-Tuned Type-I Sampling PLL With -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques.
IEEE Trans. Circuits Syst. II Express Briefs
Yunbo Huang, Yong Chen, Hailong Jiao, Pui-In Mak, Rui Paulo Martins
2021 C conf
A 3.52-GHz Harmonic-Rich-Shaping VCO with Noise Suppression and Circulation, Achieving -151-dBc/Hz Phase Noise at 10-MHz Offset.
ISCAS
Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021 — conf
A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory.
MWSCAS
Wei-Han Yu, Massimo Giordano, Rohan Doshi, Minglei Zhang, Pui-In Mak, Rui Paulo Martins, Boris Murmann
2021 J jnl
A 40-MHz Bandwidth 75-dB SNDR Partial-Interleaving SAR-Assisted Noise-Shaping Pipeline ADC.
IEEE J. Solid State Circuits
Yan Song, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2021 — conf
A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBc/Hz Peak FoM and 90-to-180kHz 1/f
ISSCC
Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021 — conf
A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement.
A-SSCC
Jixuan Li, Jiabao Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Shiheng Yang, Jun Yin, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li, Rui Paulo Martins
2021 J jnl
A 7-bit 2 GS/s Time-Interleaved SAR ADC With Timing Skew Calibration Based on Current Integrating Sampler.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wenning Jiang, Yan Zhu, Chi-Hang Chan, Boris Murmann, Rui Paulo Martins
2021 — conf
A 79.1dB-SNDR 20MHz-BW 2
CICC
Yanbo Zhang, Jin Zhang, Shubin Liu, Zhangming Zhu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2021 — conf
A 95% Peak Efficiency Modified KY (Boost) Converter for IoT with Continuous Flying Capacitor Charging in DCM.
A-SSCC
Wen-Liang Zeng, Caolei Pan, Chi-Seng Lam, Sai-Weng Sin, Chenchang Zhan, Rui Paulo Martins
2021 — conf
A Dual-Loop 4-Phase Switching LDO with Scalable Load Capability and Tunable Active Voltage Positioning for Microprocessors.
CICC
Xiangyu Mao, Yan Lu, Rui Paulo Martins
2021 J jnl
A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Jiangchao Wu, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A High-Efficiency Dual-Antenna RF Energy Harvesting System Using Full-Energy Extraction With Improved Input Power Response.
IEEE Open J. Circuits Syst.
Zhaobo Zhang, Chenchang Zhan, Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A Highly Integrated 3-Phase 4: 1 Resonant Switched-Capacitor Converter With Parasitic Loss Reduction and Fast Pre-Charge Startup.
IEEE Trans. Circuits Syst. II Express Briefs
Chuang Wang, Yan Lu, Rui Paulo Martins
2021 J jnl
A Hybrid Single-Inductor Bipolar-Output DC-DC Converter With Floating Negative Output for AMOLED Displays.
IEEE J. Solid State Circuits
Fangyu Mao, Yan Lu, Edoardo Bonizzoni, Filippo Boera, Mo Huang, Franco Maloberti, Rui Paulo Martins
2021 — conf
A Periodically Time-Varying Inductor Applied to The Class-D VCO for Phase Noise Improvement.
ESSCIRC
Jun Yin, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A Single-Stage Dual-Output Regulating Rectifier With Hysteretic Current-Wave Modulation.
IEEE J. Solid State Circuits
Jie Lin, Yan Lu, Chenchang Zhan, Rui Paulo Martins
2021 J jnl
A Time-Interleaved 2
IEEE J. Solid State Circuits
Dongyang Jiang, Liang Qi, Sai-Weng Sin, Franco Maloberti, Rui Paulo Martins
2021 J jnl
A Wide-PCE-Dynamic-Range CMOS Cross-Coupled Differential-Drive Rectifier for Ambient RF Energy Harvesting.
IEEE Trans. Circuits Syst. II Express Briefs
Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Pui-In Mak, Rui Paulo Martins
2021 J jnl
A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range.
IEICE Electron. Express
Qiaobo Ma, Xiongjie Zhang, Yang Jiang, Katsuhiro Hata, Makoto Takamiya, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021 J jnl
Adaptive Maximum Power Point Tracking With Model-Based Negative Feedback Control and Improved V-f Model.
IEEE Trans. Circuits Syst. II Express Briefs
Yuanfei Wang, Mo Huang, Ping Luo, Yan Lu, Rui Paulo Martins
2021 J jnl
An 800 MHz-to-3.3 GHz 20-MHz Channel Bandwidth WPD CMOS Power Amplifier For Multiband Uplink Radio Transceivers.
IEEE Trans. Circuits Syst. II Express Briefs
Selvakumar Mariappan, Jagadheswaran Rajendran, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins
2021 — conf
An Arithmetic Progression Switched-Capacitor DC-DC Converter with Soft VCR Transitions Achieving 93.7% Peak Efficiency and 400 mA Output Current.
A-SSCC
Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021 — conf
An Auxiliary-Channel-Sharing Background Distortion and Gain Calibration Achieving >8dB SFDR Improvement over 4
VLSI Circuits
Lai Wei, Zihao Zheng, Nereo Markulic, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui Paulo Martins
2021 J jnl
An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications.
IEEE Trans. Circuits Syst. II Express Briefs
Jixuan Li, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2021 — conf
Auto-Calibration Technique for Current-Based Bandgap Voltage Reference.
A-SSCC
Chi-Wa U, Man-Kay Law, Chi-Seng Lam, Rui Paulo Martins
2021 — conf
Background Timing-Skew Mismatch Calibration for Time-Interleaved ADCs.
ISOCC
Mingqiang Guo, Sai-Weng Sin, Rui Paulo Martins
2021 J jnl
Bird's-eye view of analog and mixed-signal chips for the 21st century.
Int. J. Circuit Theory Appl.
Rui Paulo Martins, Pui-In Mak, Chi-Hang Chan, Jun Yin, Yan Zhu, Yong Chen, Yan Lu, Man-Kay Law, Sai-Weng Sin
2021 — conf
Design of Diode-Connected and Cross-Connected CMOS Rectifiers with Adaptive Tuning for RF Energy Harvesting.
APCCAS
Xiaofei Li, Yan Lu, Rui Paulo Martins
2021 C conf
Discrete-Time MASH Delta-Sigma Modulator with Second-Order Digital Noise Coupling for Wideband High-Resolution Applications.
ISCAS
Xinyu Qin, Jingying Zhang, Liang Qi, Sai-Weng Sin, Rui Paulo Martins, Guoxing Wang
2021 — conf
Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections With <0.83% Bit-Error Rate.
A-SSCC
Chongyao Xu, Jieyun Zhang, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2021 J jnl
Review of Analog-Assisted-Digital and Digital-Assisted-Analog Low Dropout Regulators.
IEEE Trans. Circuits Syst. II Express Briefs
Mo Huang, Yan Lu, Rui Paulo Martins
2021 J jnl
Startup Time and Energy-Reduction Techniques for Crystal Oscillators in the IoT Era.
IEEE Trans. Circuits Syst. II Express Briefs
Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2021 J jnl
Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique.
IEEE Access
Lingshan Kong, Yong Chen, Haohong Yu, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins
2020 — conf
10.1 A 1.4-to-2.7GHz FDD SAW-Less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <-157.5dBc/Hz OB Noise.
ISSCC
Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020 — conf
11.5 A 2-Phase Soft-Charging Hybrid Boost Converter with Doubled-Switching Pulse Width and Shared Bootstrap Capacitor Achieving 93.5% Efficiency at a Conversion Ratio of 4.5.
ISSCC
Mo Huang, Yan Lu, Rui Paulo Martins
2020 — conf
16.2 A 4× Interleaved 10GS/s 8b Time-Domain ADC with 16× Interpolation-Based Inter-Stage Gain Achieving >37.5dB SNDR at 18GHz Input.
ISSCC
Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2020 — conf
16.3 A Single-Channel 5.5mW 3.3GS/s 6b Fully Dynamic Pipelined ADC with Post-Amplification Residue Generation.
ISSCC
Zihao Zheng, Lai Wei, Jorge Lagos, Ewout Martens, Yan Zhu, Chi-Hang Chan, Jan Craninckx, Rui Paulo Martins
2020 — conf
17.9 A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3
ISSCC
Chao Fan, Jun Yin, Chee-Cheow Lim, Pui-In Mak, Rui Paulo Martins
2020 — conf
9.6 A 2.56mW 40MHz-Bandwidth 75dB-SNDR Partial-Interleaving SAR-Assisted NS Pipeline ADC With Background Inter-Stage Offset Calibration.
ISSCC
Yan Song, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2020 — conf
A 0.024-mm
MWSCAS
Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins
2020 — conf
A 0.0285mm
CICC
Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2020 J jnl
A 0.04% BER Strong PUF With Cell-Bias-Based CRPs Filtering and Background Offset Calibration.
IEEE Trans. Circuits Syst.
Jiahao Liu, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2020 J jnl
A 0.5-V Supply, 36 nW Bandgap Reference With 42 ppm/°C Average Temperature Coefficient Within -40 °C to 120 °C.
IEEE Trans. Circuits Syst.
Chi-Wa U, Wen-Liang Zeng, Man-Kay Law, Chi-Seng Lam, Rui Paulo Martins
2020 J jnl
A 1-V 4-mW Differential-Folded Mixer With Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF.
IEEE Trans. Very Large Scale Integr. Syst.
Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020 J jnl
A 1.6-GS/s 12.2-mW Seven-/Eight-Way Split Time-Interleaved SAR ADC Achieving 54.2-dB SNDR With Digital Background Timing Mismatch Calibration.
IEEE J. Solid State Circuits
Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins
2020 — conf
A 10.4mW 50MHz-BW 80dB-DR Single-Opamp Third-Order CTSDM with SAB-ELD-Merged Integrator and 3-Stage Opamp.
VLSI Circuits
Kai Xing, Wei Wang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2020 J jnl
A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector.
IEEE Access
Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins
2020 J jnl
A 100-MHz BW 72.6-dB-SNDR CT ΔΣ Modulator Utilizing Preliminary Sampling and Quantization.
IEEE J. Solid State Circuits
Wei Wang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2020 — conf
A 10MHz Buck Converter with Type-III Control and Transient Enhancement Transistor.
ICTA
Shuangxing Zhao, Yan Lu, Chenchang Zhan, Rui Paulo Martins
2020 J jnl
A 12.5-MHz Bandwidth 77-dB SNDR SAR-Assisted Noise Shaping Pipeline ADC.
IEEE J. Solid State Circuits
Yan Song, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2020 J jnl
A 2.4-GHz Mid-Field CMOS Wireless Power Receiver Achieving 46% Maximum PCE and 163-mW Output Power.
IEEE Trans. Circuits Syst. II Express Briefs
Xiaofei Li, Yan Lu, Mo Huang, Rui Paulo Martins
2020 J jnl
A 3.15-mW +16.0-dBm IIP3 22-dB CG Inductively Source Degenerated Balun-LNA Mixer With Integrated Transformer-Based Gate Inductor and IM2 Injection Technique.
IEEE Trans. Very Large Scale Integr. Syst.
Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020 J jnl
A 3.3-mW 25.2-to-29.4-GHz Current-Reuse VCO Using a Single-Turn Multi-Tap Inductor and Differential-Only Switched-Capacitor Arrays With a 187.6-dBc/Hz FOM.
IEEE Trans. Circuits Syst.
Yunbo Huang, Yong Chen, Hao Guo, Pui-In Mak, Rui Paulo Martins
2020 J jnl
A 470-nA Quiescent Current and 92.7%/94.7% Efficiency DCT/PWM Control Buck Converter With Seamless Mode Selection for IoT Application.
IEEE Trans. Circuits Syst.
Wen-Liang Zeng, Yuan Ren, Chi-Seng Lam, Sai-Weng Sin, Weng-Keong Che, Ran Ding, Rui Paulo Martins
2020 J jnl
A 5 GS/s 29 mW Interleaved SAR ADC With 48.5 dB SNDR Using Digital-Mixing Background Timing-Skew Calibration for Direct Sampling Applications.
IEEE Access
Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins
2020 — conf
A 5MHz-BW, 86.1dB-SNDR 4X Time-Interleaved 2
VLSI Circuits
Dongyang Jiang, Liang Qi, Sai-Weng Sin, Franco Maloberti, Rui Paulo Martins
2020 C conf
A 6.4pJ/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain.
ISCAS
Jieyun Zhang, Xiaojin Zhao, Man-Kay Law, Chongyao Xu, Jiahao Liu, Pui-In Mak, Rui Paulo Martins
2020 J jnl
A 76.6-dB-SNDR 50-MHz-BW 29.2-mW Multi-Bit CT Sturdy MASH With DAC Non-Linearity Tolerance.
IEEE J. Solid State Circuits
Liang Qi, Ankesh Jain, Dongyang Jiang, Sai-Weng Sin, Rui Paulo Martins, Maurits Ortmanns
2020 J jnl
A Calibration-Free Ring-Oscillator PLL With Gain Tracking Achieving 9% Jitter Variation Over PVT.
IEEE Trans. Circuits Syst.
Xiaofeng Yang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2020 J jnl
A Multiband FDD SAW-Less Transmitter for 5G-NR Featuring a BW-Extended N-Path Filter-Modulator, a Switched-BB Input, and a Wideband TIA-Based PA Driver.
IEEE J. Solid State Circuits
Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020 — conf
A Power-Efficient Hybrid Single-Inductor Bipolar-Output DC-DC Converter with Floating Negative Output for AMOLED Displays.
CICC
Fangyu Mao, Yan Lu, Edoardo Bonizzoni, Filippo Boera, Mo Huang, Franco Maloberti, Rui Paulo Martins
2020 J jnl
A SAR-ADC-Assisted DC-DC Buck Converter With Fast Transient Recovery.
IEEE Trans. Circuits Syst. II Express Briefs
Wen-Liang Zeng, Edoardo Bonizzoni, Chi-Wa U, Chi-Seng Lam, Sai-Weng Sin, U. Fat Chio, Franco Maloberti, Rui Paulo Martins
2020 J jnl
A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push-Pull LNA.
IEEE J. Solid State Circuits
Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins
2020 — conf
A Single-Stage Delay-Tuned Active Rectifier for Constant-Current Constant-Voltage Wireless Charging.
APCCAS
Xianglong Bai, Fangyu Mao, Yan Lu, Chenchang Zhan, Rui Paulo Martins
2020 J jnl
A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC With Dynamic Gm-R-Based Amplifier.
IEEE J. Solid State Circuits
Wenning Jiang, Yan Zhu, Minglei Zhang, Chi-Hang Chan, Rui Paulo Martins
2020 C conf
A Unity-Power-Factor Inductive Power Transfer Converter with Inherent CC-to-CV Transition Ability for Automated Guided Vehicle Charging.
IECON
Io-Wa Iam, Iok-U Hoi, Zhicong Huang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins
2020 J jnl
A VHF Wide-Input Range CMOS Passive Rectifier With Active Bias Tuning.
IEEE J. Solid State Circuits
Xiaofei Li, Fangyu Mao, Yan Lu, Rui Paulo Martins
2020 J jnl
A switched-capacitor power converter with unequal duty cycle for ripple reduction and efficiency improvement.
Microelectron. J.
Yulun Wu, Yerzhan Mustafa, Yan Lu, Alex Ruderman, Rui Paulo Martins
2020 J jnl
An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC With <1.5-ps Uncalibrated Quantization Steps.
IEEE J. Solid State Circuits
Minglei Zhang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2020 J jnl
An Analog-Proportional Digital-Integral Multiloop Digital LDO With PSR Improvement and LCO Reduction.
IEEE J. Solid State Circuits
Mo Huang, Yan Lu, Rui Paulo Martins
2020 C conf
An N × N Multiplier-Based Multi-Bit Strong PUF using Path Delay Extraction.
ISCAS
Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2020 J jnl
An NMOS Digital LDO With NAND-Based Analog-Assisted Loop in 28-nm CMOS.
IEEE Trans. Circuits Syst.
Xiaofei Ma, Yan Lu, Qiang Li, Wing-Hung Ki, Rui Paulo Martins
2020 J jnl
Analysis, Design and Control of an Integrated Three-Level Buck Converter under DCM Operation.
J. Circuits Syst. Comput.
Wen-Ming Zheng, Wen-Liang Zeng, Chi-Wa U, Chi-Seng Lam, Yan Lu, Sai-Weng Sin, Man-Chung Wong, Rui Paulo Martins
2020 J jnl
Cost-Effective Compensation Design for Output Customization and Efficiency Optimization in Series/Series-Parallel Inductive Power Transfer Converter.
IEEE Trans. Ind. Electron.
Zhicong Huang, ZhiJian Fang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins
2020 J jnl
Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection.
IEEE Trans. Circuits Syst. II Express Briefs
Ka-Fai Un, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Anding Zhu, Robert Bogdan Staszewski
2020 J jnl
Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools.
IEEE Trans. Circuits Syst.
Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins
2020 J jnl
Digital Battery Management Unit With Built-In Resistance Compensation, Modulated Frequency Detection and Multi-Mode Protection for Fast, Efficient and Safe Charging.
IEEE Trans. Circuits Syst.
Ji-Xuan Li, Sai-Weng Sin, U. Fat Chio, Ya-Jie Wu, Chi-Seng Lam, Rui Paulo Martins
2020 J jnl
LDO-Free Power Management System: A 10-bit Pipelined ADC Directly Powered by Inductor-Based Boost Converter With Ripple Calibration.
IEEE Trans. Circuits Syst.
Hanyu Wang, Sai-Weng Sin, Chi-Seng Lam, Franco Maloberti, Rui Paulo Martins
2020 C conf
Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference.
ISCAS
Chuanqi Wei, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2020 J jnl
Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier With Capacitor Reuse for Input Power Adaptation.
IEEE J. Solid State Circuits
Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins
2019 — conf
A -246dB Jitter-FoM 2.4GHz Calibration-Free Ring-Oscillator PLL Achieving 9% Jitter Variation Over PVT.
ISSCC
Xiaofeng Yang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2019 J jnl
A 0.0018-mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019 — conf
A 0.003-mm
A-SSCC
Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 0.0056-mm
IEEE J. Solid State Circuits
Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 0.0071-mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Yong Chen, Pui-In Mak, Zunsong Yang, Chirn Chye Boon, Rui Paulo Martins
2019 J jnl
A 0.044-mm
IEEE Trans. Circuits Syst. II Express Briefs
Haohong Yu, Yong Chen, Chirn Chye Boon, Chenyang Li, Pui-In Mak, Rui Paulo Martins
2019 — conf
A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN Corner.
ISSCC
Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 0.12-mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins
2019 — conf
A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS.
APCCAS
Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS.
IEEE J. Solid State Circuits
Shiheng Yang, Jun Yin, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM.
IEEE Trans. Circuits Syst. II Express Briefs
Tongquan Jiang, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC With PVT Tracking and Speed-Enhanced Techniques.
IEEE J. Solid State Circuits
Minglei Zhang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2019 — conf
A 0.6V 13b 20MS/s Two-Step TDC-Assisted SAR ADC with PVT Tracking and Speed-Enhanced Techniques.
ISSCC
Minglei Zhang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2019 — conf
A 1.2V 86dB SNDR 500kHz BW Linear-Exponential Multi-Bit Incremental ADC Using Positive Feedback in 65nm CMOS.
A-SSCC
Biao Wang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins
2019 — conf
A 10b 1.6GS/s 12.2mW 7/8-way Split Time-interleaved SAR ADC with Digital Background Mismatch Calibration.
CICC
Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins
2019 — conf
A 200-MHz Wide Input Range CMOS Passive Rectifier with Active Bias Tunning.
A-SSCC
Xiaofei Li, Fangyu Mao, Pyungwoo Yeon, Yan Lu, Maysam Ghovanloo, Rui Paulo Martins
2019 — conf
A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur.
ISSCC
Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins
2019 — conf
A 29mW 5GS/s Time-interleaved SAR ADC achieving 48.5dB SNDR With Fully-Digital Timing-Skew Calibration Based on Digital-Mixing.
VLSI Circuits
Mingqiang Guo, Jiaji Mao, Sai-Weng Sin, He Gong Wei, Rui Paulo Martins
2019 J jnl
A 4-b 7-µW Phase Domain ADC With Time Domain Reference Generation for Low-Power FSK/PSK Demodulation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xuewei Lei, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2019 J jnl
A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chao Fan, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 5.1-to-7.3 mW, 2.4-to-5 GHz Class-C Mode-Switching Single-Ended-Complementary VCO Achieving >190 dBc/Hz FoM.
IEEE Trans. Circuits Syst. II Express Briefs
Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Narendra Kumar, Pui-In Mak, Rui Paulo Martins
2019 J jnl
A 550- $\mu$ W 20-kHz BW 100.8-dB SNDR Linear- Exponential Multi-Bit Incremental $\Sigma\Delta$ ADC With 256 Clock Cycles in 65-nm CMOS.
IEEE J. Solid State Circuits
Biao Wang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins
2019 — conf
A 7.6mW 1GS/s 60dB SNDR Single-Channel SAR-Assisted Pipelined ADC with Temperature-Compensated Dynamic Gm-R-Based Amplifier.
ISSCC
Wenning Jiang, Yan Zhu, Minglei Zhang, Chi-Hang Chan, Rui Paulo Martins
2019 — conf
A 72.6dB-SNDR 100MHz-BW 16.36mW CTDSM with Preliminary Sampling and Quantization Scheme in Backend Subranging QTZ.
ISSCC
Wei Wang, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2019 — conf
A 76.6dB-SNDR 50MHz-BW 29.2mW Noise-Coupling-Assisted CT Sturdy MASH ΔΣ Modulator with 1.5b/4b Quantizers in 28nm CMOS.
ISSCC
Liang Qi, Ankesh Jain, Dongyang Jiang, Sai-Weng Sin, Rui Paulo Martins, Maurits Ortmanns
2019 J jnl
A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs.
IEEE Trans. Circuits Syst. II Express Briefs
Iat-Fai Sun, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019 — conf
A High DR High-Input-Impedance Programmable-Gain ECG Acquisition Interface with Non-inverting Continuous Time Sigma-Delta Modulator.
A-SSCC
Junhao Liang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins, Hanjun Jiang
2019 — conf
A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction Improvement.
ISSCC
Zhiyuan Chen, Yang Jiang, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins
2019 J jnl
A Reconfigurable Cross-Connected Wireless-Power Transceiver for Bidirectional Device-to-Device Wireless Charging.
IEEE J. Solid State Circuits
Fangyu Mao, Yan Lu, Rui Paulo Martins
2019 J jnl
A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA.
Integr.
Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Vitee, Pravinah Nair Shasidharan, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019 J jnl
Accuracy-Enhanced Variance-Based Time-Skew Calibration Using SAR as Window Detector.
IEEE Trans. Very Large Scale Integr. Syst.
Jianwei Liu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2019 J jnl
Algebraic Series-Parallel-Based Switched-Capacitor DC-DC Boost Converter With Wide Input Voltage Range and Enhanced Power Density.
IEEE J. Solid State Circuits
Yang Jiang, Man-Kay Law, Zhiyuan Chen, Pui-In Mak, Rui Paulo Martins
2019 J jnl
An Integrated DC-DC Converter With Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery.
IEEE J. Solid State Circuits
U-Fat Chio, Kuo-Chih Wen, Sai-Weng Sin, Chi-Seng Lam, Yan Lu, Franco Maloberti, Rui Paulo Martins
2019 J jnl
Analysis and Verification of Jitter in Bang-Bang Clock and Data Recovery Circuit With a Second-Order Loop Filter.
IEEE Trans. Very Large Scale Integr. Syst.
Xinyi Ge, Yong Chen, Xiaoteng Zhao, Pui-In Mak, Rui Paulo Martins
2019 J jnl
Analysis of Reference Error in High-Speed SAR ADCs With Capacitive DAC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Cheng Li, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2019 J jnl
Background Offset Calibration for Comparator Based on Temperature Drift Profile.
IEEE Trans. Circuits Syst. II Express Briefs
Xiaochao Li, Chi-Hang Chan, Qi Zhang, Yan Zhu, Rui Paulo Martins
2019 J jnl
CMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting - Model and Analysis.
IEEE Trans. Circuits Syst. II Express Briefs
Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Wei Ru Wong, Pui-In Mak, Rui Paulo Martins
2019 J jnl
Design of KY Converter With Constant On-Time Control Under DCM Operation.
IEEE Trans. Circuits Syst. II Express Briefs
Wen-Liang Zeng, Zi-Yang Lin, Chi-Seng Lam, Man-Kay Law, Sai-Weng Sin, Franco Maloberti, Man-Chung Wong, Rui Paulo Martins
2019 J jnl
Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique.
IEEE Trans. Circuits Syst. I Regul. Pap.
Dezhi Xing, Yan Zhu, Chi-Hang Chan, Franco Maloberti, Seng-Pan U, Rui Paulo Martins
2019 J jnl
Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
Jiangchao Wu, Ka-Chon Lei, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2019 C conf
Input Correlated Swap-Sampling Technique for Input Driver Power Reduction in a 12b 25MS/s SAR ADC.
ISCAS
Lai Wei, Xiang-Hui Pan, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins
2019 J jnl
Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019 — conf
Multibit Sturdy MASH ΔΣ Modulator with Error-shaped Segmented DACs for Wideband Low-power Applications.
ASICON
Liang Qi, Sai-Weng Sin, Rui Paulo Martins
2019 — conf
Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm.
SMACD
Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019 — conf
Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique.
APCCAS
Lingshan Kong, Yong Chen, Haohong Yu, Quan Pan, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins
2018 — conf
A 0.0056mm
ISSCC
Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018 J jnl
A 0.032-mm
IEEE Trans. Circuits Syst. II Express Briefs
Haidong Yi, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018 J jnl
A 0.18-V 382-µW Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS.
IEEE J. Solid State Circuits
Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui Paulo Martins
2018 J jnl
A 0.19 mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Yan Zhu, Chi-Hang Chan, Zi-Hao Zheng, Cheng Li, Jianyu Zhong, Rui Paulo Martins
2018 — conf
A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm
ISSCC
Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2018 — conf
A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS.
ISSCC
Jun Yin, Shiheng Yang, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2018 C conf
A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °C for Wearable and Sensing Applications.
ISCAS
Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2018 — conf
A 0.4V 430nA quiescent current NMOS digital LDO with NAND-based analog-assisted loop in 28nm CMOS.
ISSCC
Xiaofei Ma, Yan Lu, Rui Paulo Martins, Qiang Li
2018 J jnl
A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wei-Han Yu, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2018 J jnl
A 10-MHz Bandwidth Two-Path Third-Order ΣΔ Modulator With Cross-Coupling Branches.
IEEE Trans. Circuits Syst. II Express Briefs
Da Feng, Edoardo Bonizzoni, Franco Maloberti, Sai-Weng Sin, Rui Paulo Martins
2018 J jnl
A 14-Bit Split-Pipeline ADC With Self-Adjusted Opamp-Sharing Duty-Cycle and Bias Current.
IEEE Trans. Circuits Syst. II Express Briefs
Jiaji Mao, Mingqiang Guo, Sai-Weng Sin, Rui Paulo Martins
2018 — conf
A 2.4-GHz Single-Pin Antenna Interface RF Front-End with a Function-Reuse Single-MOS VCO-PA and a Push-Pull LNA.
A-SSCC
Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins
2018 J jnl
A 220-MHz Bondwire-Based Fully-Integrated KY Converter With Fast Transient Response Under DCM Operation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wen-Liang Zeng, Chi-Seng Lam, Sai-Weng Sin, Franco Maloberti, Man-Chung Wong, Rui Paulo Martins
2018 J jnl
A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins
2018 — conf
A 39mW 7b 8GS/s 8-way TI ADC with Cross-linearized Input and Bootstrapped Sampling Buffer Front-end.
ESSCIRC
Chi-Hang Chan, Yan Zhu, Zi-Hao Zheng, Rui Paulo Martins
2018 J jnl
A 5.35-mW 10-MHz Single-Opamp Third-Order CT ΔΣ Modulator With CTC Amplifier and Adaptive Latch DAC Driver in 65-nm CMOS.
IEEE J. Solid State Circuits
Wei Wang, Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2018 — conf
A 550µW 20kHz BW 100.8DB SNDR Linear-Exponential Multi-Bit Incremental Converter with 256-cycles in 65NM CMOS.
VLSI Circuits
Biao Wang, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins
2018 — conf
A 6.78 MHz active voltage doubler with near-optimal on/off delay compensation for wireless power transfer systems.
VLSI-DAT
Fangyu Mao, Yan Lu, Seng-Pan U, Rui Paulo Martins
2018 — conf
A 77dB SNDR 12.5MHz Bandwidth 0-1 MASH ∑Δ ADC Based on the Pipelined-SAR Structure.
VLSI Circuits
Yan Song, Yan Zhu, Chi-Hang Chan, Li Geng, Rui Paulo Martins
2018 — conf
A 7b 2 GS/s Time-Interleaved SAR ADC with Time Skew Calibration Based on Current Integrating Sampler.
A-SSCC
Wenning Jiang, Yan Zhu, Chi-Hang Chan, Boris Murmann, Seng-Pan U, Rui Paulo Martins
2018 J jnl
A Coin-Battery-Powered LDO-Free 2.4-GHz Bluetooth Low-Energy Transmitter With 34.7% Peak System Efficiency.
IEEE Trans. Circuits Syst. II Express Briefs
Xingqiang Peng, Jun Yin, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2018 C conf
A Dual-Loop Digital LDO Regulator with Asynchronous-Flash Binary Coarse Tuning.
ISCAS
Yuanqing Huang, Yan Lu, Franco Maloberti, Rui Paulo Martins
2018 J jnl
A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chak-Fong Cheang, Pui-In Mak, Rui Paulo Martins
2018 C conf
A Power Quality Indexes Measurement System Platform with Remote Alarm Notification.
IECON
Jianyang Deng, Chi-Seng Lam, Man-Chung Wong, Lei Wang, Sai-Weng Sin, Rui Paulo Martins
2018 J jnl
A Reconfigurable and Extendable Digital Architecture for Mixed Signal Power Electronics Controller.
IEEE Trans. Circuits Syst. II Express Briefs
Ya-Jie Wu, Chi-Seng Lam, Man-Chung Wong, Sai-Weng Sin, Rui Paulo Martins
2018 J jnl
A Regulation-Free Sub-0.5-V 16-/24-MHz Crystal Oscillator With 14.2-nJ Startup Energy and 31.8-µW Steady-State Power.
IEEE J. Solid State Circuits
Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2018 J jnl
A SAW-Less Tunable RF Front End for FDD and IBFD Combining an Electrical-Balance Duplexer and a Switched-LC N-Path LNA.
IEEE J. Solid State Circuits
Gengzhen Qi, Barend van Liempd, Pui-In Mak, Rui Paulo Martins, Jan Craninckx
2018 C conf
A Single-Stage Current-Mode Active Rectifier with Accurate Output-Current Regulation for IoT.
ISCAS
Fangyu Mao, Yan Lu, Jie Lin, Chenchang Zhan, Seng-Pan U, Rui Paulo Martins
2018 J jnl
A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration.
IEEE J. Solid State Circuits
Chi-Hang Chan, Yan Zhu, Wai-Hong Zhang, Seng-Pan U, Rui Paulo Martins
2018 J jnl
A Wideband Inductorless dB-Linear Automatic Gain Control Amplifier Using a Single-Branch Negative Exponential Generator for Wireline Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Lingshan Kong, Yong Chen, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins
2018 — conf
A dual-output SC converter with dynamic power allocation for multicore application processors.
ASP-DAC
Junmin Jiang, Yan Lu, Xun Liu, Wing-Hung Ki, Philip K. T. Mok, Seng-Pan U, Rui Paulo Martins
2018 — conf
A reconfigurable cross-connected wireless-power transceiver for bidirectional device-to-device charging with 78.1% total efficiency.
ISSCC
Fangyu Mao, Yan Lu, Seng-Pan U., Rui Paulo Martins
2018 — conf
A regulation-free sub-0.5V 16/24MHz crystal oscillator for energy-harvesting BLE radios with 14.2nJ startup energy and 31.8pW steady-state power.
ISSCC
Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2018 J jnl
Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters.
IEEE J. Solid State Circuits
Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2018 — conf
An 11b 1GS/s Time-Interleaved ADC with Linearity Enhanced T/H.
A-SSCC
Yan Zhu, Chi-Hang Chan, Rui Paulo Martins
2018 J jnl
An Analog-Assisted Tri-Loop Digital Low-Dropout Regulator.
IEEE J. Solid State Circuits
Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins
2018 — conf
An Integrated DC-DC Converter with Segmented Frequency Modulation and Multiphase Co-Work Control for Fast Transient Recovery.
A-SSCC
U. Fat Chio, Kuo-Chih Wen, Sai-Weng Sin, Chi-Seng Lam, Yan Lu, Franco Maloberti, Rui Paulo Martins
2018 J jnl
An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances.
IEEE J. Solid State Circuits
Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018 — conf
An inverse-class-F CMOS VCO with intrinsic-high-Q 1
ISSCC
Chee-Cheow Lim, Jun Yin, Pui-In Mak, Harikrishnan Ramiah, Rui Paulo Martins
2018 J jnl
Analysis of Common-Mode Interference and Jitter of Clock Receiver Circuits With Improved Topology.
IEEE Trans. Circuits Syst. I Regul. Pap.
Xiaofeng Yang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins
2018 C conf
Design and Control of An Integrated 3-Level Boost Converter under DCM Operation.
ISCAS
Yiwei Tan, Chi-Seng Lam, Sai-Weng Sin, Man-Chung Wong, Rui Paulo Martins
2018 — conf
Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications.
SMACD
Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018 J jnl
Gain Error Calibrations for Two-Step ADCs: Optimizations Either in Accuracy or Chip Area.
IEEE Trans. Very Large Scale Integr. Syst.
Guan-Cheng Wang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins
2018 J jnl
Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor.
IEEE J. Solid State Circuits
Yatao Peng, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018 J jnl
Missing-Code-Occurrence Probability Calibration Technique for DAC Nonlinearity With Supply and Reference Circuit Analysis in a SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Guan-Cheng Wang, Cheng Li, Yan Zhu, Jianyu Zhong, Yan Lu, Chi-Hang Chan, Rui Paulo Martins
2018 J jnl
Nano-Ampere Low-Dropout Regulator Designs for IoT Devices.
IEEE Trans. Circuits Syst. I Regul. Pap.
Yuanqing Huang, Yan Lu, Franco Maloberti, Rui Paulo Martins
2018 J jnl
Passive Noise Shaping in SAR ADC With Improved Efficiency.
IEEE Trans. Very Large Scale Integr. Syst.
Yan Song, Chi-Hang Chan, Yan Zhu, Li Geng, Seng-Pan U, Rui Paulo Martins
2018 J jnl
Quick and cost-efficient A/D converter static characterization using low-precision testing signal.
Microelectron. J.
Wei Wei Qin, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2018 J jnl
Review and Selection Strategy for High-Accuracy Modeling of PWM Converters in DCM.
J. Electr. Comput. Eng.
Yu-Jun Mao, Chi-Seng Lam, Sai-Weng Sin, Man-Chung Wong, Rui Paulo Martins
2017 — conf
16.4 A 5mW 7b 2.4GS/s 1-then-2b/cycle SAR ADC with background offset calibration.
ISSCC
Chi-Hang Chan, Yan Zhu, Iok-Meng Ho, Wai-Hong Zhang, Seng-Pan U, Rui Paulo Martins
2017 — conf
20.4 An output-capacitor-free analog-assisted digital low-dropout regulator with tri-loop control.
ISSCC
Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins
2017 — conf
20.5 A dual-symmetrical-output switched-capacitor converter with dynamic power cells and minimized cross regulation for application processors in 28nm CMOS.
ISSCC
Junmin Jiang, Yan Lu, Wing-Hung Ki, Seng-Pan U, Rui Paulo Martins
2017 — conf
22.2 A 1.7mm
ISSCC
Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins
2017 — conf
22.4 A reconfigurable bidirectional wireless power transceiver with maximum-current charging mode and 58.6% battery-to-battery efficiency.
ISSCC
Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins
2017 — conf
24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS.
ISSCC
Wei-Han Yu, Haidong Yi, Pui-In Mak, Jun Yin, Rui Paulo Martins
2017 J jnl
60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration.
IEEE J. Solid State Circuits
Chi-Hang Chan, Yan Zhu, Cheng Li, Wai-Hong Zhang, Iok-Meng Ho, Lai Wei, Seng-Pan U, Rui Paulo Martins
2017 J jnl
A 0.038-mm
IEEE J. Solid State Circuits
Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2017 J jnl
A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins
2017 C conf
A 0.4V 4.8μW 16MHz CMOS crystal oscillator achieving 74-fold startup-time reduction using momentary detuning.
ISCAS
Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2017 J jnl
A 10-bit 500-MS/s Partial-Interleaving Pipelined SAR ADC With Offset and Reference Mismatch Calibrations.
IEEE Trans. Very Large Scale Integr. Syst.
Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins
2017 J jnl
A 12b 180MS/s 0.068mm
IEEE Trans. Circuits Syst. I Regul. Pap.
Jianyu Zhong, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2017 J jnl
A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) P
IEEE J. Solid State Circuits
Xingqiang Peng, Jun Yin, Pui-In Mak, Wei-Han Yu, Rui Paulo Martins
2017 J jnl
A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH Δ Σ Modulator With Multirate Opamp Sharing.
IEEE Trans. Circuits Syst. I Regul. Pap.
Liang Qi, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins
2017 — conf
A 5-bit 2 GS/s binary-search ADC with charge-steering comparators.
A-SSCC
U. Fat Chio, Sai-Weng Sin, Seng-Pan U, Franco Maloberti, Rui Paulo Martins
2017 — conf
A 5.35 mW 10 MHz bandwidth CT third-order ΔΣ modulator with single Opamp achieving 79.6/84.5 dB SNDR/DR in 65 nm CMOS.
A-SSCC
Wei Wang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins
2017 J jnl
A 7.8-mW 5-b 5-GS/s Dual-Edges-Triggered Time-Based Flash ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti
2017 J jnl
A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Amin Khalili Moghaddam, Joon Huang Chuah, Harikrishnan Ramiah, Jalil Ahmadian, Pui-In Mak, Rui Paulo Martins
2017 J jnl
A Handheld High-Sensitivity Micro-NMR CMOS Platform With B-Field Stabilization for Multi-Type Biological/Chemical Assays.
IEEE J. Solid State Circuits
Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins
2017 J jnl
A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement.
IEEE Trans. Circuits Syst. I Regul. Pap.
Wei-Han Yu, Xingqiang Peng, Pui-In Mak, Rui Paulo Martins
2017 J jnl
A Single-Chip Solar Energy Harvesting IC Using Integrated Photodiodes for Biomedical Implant Applications.
IEEE Trans. Biomed. Circuits Syst.
Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2017 J jnl
A Wide Input Range Dual-Path CMOS Rectifier for RF Energy Harvesting.
IEEE Trans. Circuits Syst. II Express Briefs
Yan Lu, Haojuan Dai, Mo Huang, Man-Kay Law, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2017 — conf
A digital PWM controlled KY step-up converter based on frequency domain ΣΔ ADC.
ISIE
Xia Du, Chi-Seng Lam, Sai-Weng Sin, Man-Kay Law, Franco Maloberti, Man-Chung Wong, Seng-Pan U, Rui Paulo Martins
2017 — conf
A missing-code-detection gain error calibration achieving 63dB SNR for an 11-bit ADC.
ESSCIRC
Guan-Cheng Wang, Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins
2017 J jnl
A sub-1V 78-nA bandgap reference with curvature compensation.
Microelectron. J.
Ziyang Luo, Yan Lu, Mo Huang, Junmin Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2017 J jnl
Active-Passive ΔΣ Modulator for High-Resolution and Low-Power Applications.
IEEE Trans. Very Large Scale Integr. Syst.
Arshad Hussain, Sai-Weng Sin, Chi-Hang Chan, Ben Seng-Pan U, Franco Maloberti, Rui Paulo Martins
2017 C conf
CCM operation analysis and parameters design of Negative Output Elementary Luo Converter for ripple suppression.
IECON
Chi-Wa U, Chi-Seng Lam, Man-Kay Law, Sai-Weng Sin, Man-Chung Wong, Seng-Pan U, Rui Paulo Martins
2017 J jnl
Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting.
IEEE J. Solid State Circuits
Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins
2017 J jnl
Metastablility in SAR ADCs.
IEEE Trans. Circuits Syst. II Express Briefs
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Boris Murmann, Seng-Pan U, Rui Paulo Martins
2017 C conf
Piecewise BJT process spread compensation exploiting base recombination current.
ISCAS
Dapeng Sun, Man-Kay Law, Bo Wang, Pui-In Mak, Rui Paulo Martins
2017 J jnl
Seven-bit 700-MS/s Four-Way Time-Interleaved SAR ADC With Partial $V_{\mathrm {cm}}$ -Based Switching.
IEEE Trans. Very Large Scale Integr. Syst.
Dezhi Xing, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Fan Ye, Junyan Ren, Seng-Pan U, Rui Paulo Martins
2016 — conf
2.7 A 0.003mm2 1.7-to-3.5GHz dual-mode time-interleaved ring-VCO achieving 90-to-150kHz 1/f3 phase-noise corner.
ISSCC
Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2016 — conf
26.9 A 0.038mm2 SAW-less multiband transceiver using an N-Path SC gain loop.
ISSCC
Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2016 — conf
28.1 A handheld 50pM-sensitivity micro-NMR CMOS platform with B-field stabilization for multi-type biological/chemical assays.
ISSCC
Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins
2016 — conf
A 0.011mm
A-SSCC
Chi-Hang Chan, Yan Zhu, Iok-Meng Ho, Wai-Hong Zhang, Chon-Lam Lio, Seng-Pan U, Rui Paulo Martins
2016 — conf
A 12b 180MS/s 0.068mm
ESSCIRC
Jianyu Zhong, Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2016 J jnl
A 2-µW 45-nV/√Hz Readout Front End With Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop.
IEEE Trans. Circuits Syst. II Express Briefs
Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2016 J jnl
A 6 b 5 GS/s 4 Interleaved 3 b/Cycle SAR ADC.
IEEE J. Solid State Circuits
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2016 — conf
A 94-dB DR, 105-Hz bandwidth interface circuit for inertial navigation applications.
ISIC
Wei Li, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2016 J jnl
A Fully Integrated Digital LDO With Coarse-Fine-Tuning and Burst-Mode Operation.
IEEE Trans. Circuits Syst. II Express Briefs
Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2016 J jnl
A Time-Interleaved Ring-VCO with Reduced 1/f
IEEE J. Solid State Circuits
Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2016 — conf
A digital LDO with transient enhancement and limit cycle oscillation reduction.
APCCAS
Mo Huang, Yan Lu, Seng-Pan U, Rui Paulo Martins
2016 — conf
A high DR multi-channel stage-shared hybrid front-end for integrated power electronics controller.
A-SSCC
Yuan Ren, Sai-Weng Sin, Chi-Seng Lam, Man-Chung Wong, Seng-Pan U, Rui Paulo Martins
2016 C conf
A high-Q spiral inductor with dual-layer patterned floating shield in a class-B VCO achieving a 190.5-dBc/Hz FoM.
ISCAS
Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins
2016 J jnl
A µNMR CMOS Transceiver Using a Butterfly-Coil Input for Integration With a Digital Microfluidic Device Inside a Portable Magnet.
IEEE J. Solid State Circuits
Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2016 J jnl
An 11b 450 MS/s Three-Way Time-Interleaved Subranging Pipelined-SAR ADC in 65 nm CMOS.
IEEE J. Solid State Circuits
Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins
2016 — conf
An 8-bit 0.7-GS/s single channel flash-SAR ADC in 65-nm CMOS technology.
ESSCIRC
Dante Gabriel Muratore, Alper Akdikmen, Edoardo Bonizzoni, Franco Maloberti, U. Fat Chio, Sai-Weng Sin, Rui Paulo Martins
2016 J jnl
Histogram-Based Ratio Mismatch Calibration for Bridge-DAC in 12-bit 120 MS/s SAR ADC.
IEEE Trans. Very Large Scale Integr. Syst.
Yan Zhu, Chi-Hang Chan, Si-Seng Wong, Seng-Pan U, Rui Paulo Martins
2016 J jnl
Limit Cycle Oscillation Reduction for Digital Low Dropout Regulators.
IEEE Trans. Circuits Syst. II Express Briefs
Mo Huang, Yan Lu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Wing-Hung Ki
2016 — conf
Sub-threshold VLSI logic family exploiting unbalanced pull-up/down network, logical effort and inverse-narrow-width techniques.
ASP-DAC
Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins
2016 — conf
Sub-µW QRS detection processor using quadratic spline wavelet transform and maxima modulus pair recognition for power-efficient wireless arrhythmia monitoring.
ASP-DAC
Chio-In Ieong, Pui-In Mak, Mang I Vai, Rui Paulo Martins
2016 — conf
Time-domain I/Q-LOFT compensator using a simple envelope detector for a sub-GHz IEEE 802.11af WLAN transmitter.
ASP-DAC
Chak-Fong Cheang, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2016 J jnl
Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell.
J. Circuits Syst. Comput.
Suyan Fan, Man-Kay Law, Mingzhong Li, Zhiyuan Chen, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins
2015 — conf
2.4 A 0.028mm
ISSCC
Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2015 — conf
20.4 A 123-phase DC-DC converter-ring with fast-DVS for microprocessors.
ISSCC
Yan Lu, Junmin Jiang, Wing-Hung Ki, C. Patrick Yue, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2015 — conf
26.5 A 5.5mW 6b 5GS/S 4×-lnterleaved 3b/cycle SAR ADC in 65nm CMOS.
ISSCC
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2015 J jnl
A 0.0045-mm
IEEE Trans. Circuits Syst. II Express Briefs
Zushu Yan, Wei Wang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2015 J jnl
A 0.02 mm
IEEE J. Solid State Circuits
Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti
2015 J jnl
A 3.6-mW 6-GHz current-reuse VCO-buffer with improved load drivability in 65-nm CMOS.
Int. J. Circuit Theory Appl.
Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins
2015 — conf
A 89fJ-FOM 6-bit 3.4GS/s flash ADC with 4x time-domain interpolation.
A-SSCC
Jianwei Liu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2015 J jnl
A Combinatorial Impairment-Compensation Digital Predistorter for a Sub-GHz IEEE 802.11af-WLAN CMOS Transmitter Covering a 10x-Wide RF Bandwidth.
IEEE Trans. Circuits Syst. I Regul. Pap.
Chak-Fong Cheang, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2015 — conf
A μNMR CMOS transceiver using a butterfly-coil input for integration with a digital microfluidic device inside a portable magnet.
A-SSCC
Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2015 J jnl
Corrections to "A 0.02 mm
IEEE J. Solid State Circuits
P. V. Ananda Mohan, Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti
2015 J jnl
Energy Optimized Subthreshold VLSI Logic Family With Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques.
IEEE Trans. Very Large Scale Integr. Syst.
Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins
2015 J jnl
Improving the Linearity and Power Efficiency of Active Switched-Capacitor Filters in a Compact Die Area.
IEEE Trans. Very Large Scale Integr. Syst.
Yaohua Zhao, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2015 J jnl
Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate.
IEEE J. Solid State Circuits
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti
2015 J jnl
Polyphase Decomposition for Tunable Band-Pass Sigma-Delta A/D Converters.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Da Feng, Franco Maloberti, Sai-Weng Sin, Rui Paulo Martins
2015 J jnl
Thermal and Reference Noise Analysis of Time-Interleaving SAR and Partial-Interleaving Pipelined-SAR ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap.
Jianyu Zhong, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2014 — conf
17.2 A 0.0013mm
ISSCC
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti
2014 — conf
3.9 An RF-to-BB current-reuse wideband receiver with parallel N-path active/passive mixers and a single-MOS pole-zero LPF.
ISSCC
Fujian Lin, Pui-In Mak, Rui Paulo Martins
2014 — conf
9.4 A 0.5V 1.15mW 0.2mm
ISSCC
Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014 — conf
A 0.3-V, 37.5-nW 1.5∼6.5-pF-input-range supply voltage tolerant capacitive sensor readout.
ISIC
Suyan Fan, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2014 — conf
A 104μW EMI-resisting bandgap voltage reference achieving -20dB PSRR, and 5% DC shift under a 4dBm EMI level.
APCCAS
Shiheng Yang, Pui-In Mak, Rui Paulo Martins
2014 J jnl
A 2.4 GHz ZigBee Receiver Exploiting an RF-to-BB-Current-Reuse Blixer + Hybrid Filter Topology in 65 nm CMOS.
IEEE J. Solid State Circuits
Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014 J jnl
A Sub-GHz Multi-ISM-Band ZigBee Receiver Using Function-Reuse and Gain-Boosted N-Path Techniques for IoT Applications.
IEEE J. Solid State Circuits
Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014 — conf
An 11b 900 MS/s time-interleaved sub-ranging pipelined-SAR ADC.
ESSCIRC
Yan Zhu, Chi-Hang Chan, Seng-Pan U, Rui Paulo Martins
2014 J jnl
An RF-to-BB-Current-Reuse Wideband Receiver With Parallel N-Path Active/Passive Mixers and a Single-MOS Pole-Zero LPF.
IEEE J. Solid State Circuits
Fujian Lin, Pui-In Mak, Rui Paulo Martins
2014 J jnl
Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter.
IEEE Trans. Circuits Syst. I Regul. Pap.
Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014 — conf
Design considerations of a low-noise receiver front-end and its spiral coil for portable NMR screening.
APCCAS
Diyang Zhao, Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2014 J jnl
Enhancing the performances of recycling folded cascode OpAmp in nanoscale CMOS through voltage supply doubling and design for reliability.
Int. J. Circuit Theory Appl.
Pui-In Mak, Miao Liu, Yaohua Zhao, Rui Paulo Martins
2014 C conf
Jitter-resistant Capacitor Based Sine-Shaped DAC for Continuous-Time Sigma-Delta modulators.
ISCAS
Da Feng, Franco Maloberti, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2014 C conf
Micropower two-stage amplifier employing recycling current-buffer Miller compensation.
ISCAS
Wei Wang, Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2014 J jnl
Split-SAR ADCs: Improved Linearity With Power and Speed Optimization.
IEEE Trans. Very Large Scale Integr. Syst.
Yan Zhu, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti
2013 J jnl
15-nW Biopotential LPFs in 0.35-µm CMOS Using Subthreshold-Source-Follower Biquads With and Without Gain Compensation.
IEEE Trans. Biomed. Circuits Syst.
Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Man-Kay Law, Sio-Hang Pun, Feng Wan, Rui Paulo Martins
2013 J jnl
A 0.016-mm
IEEE J. Solid State Circuits
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2013 C conf
A 0.5V 10GHz 8-phase LC-VCO Combining current-reuse and back-gate-coupling techniques consuming 2mW.
ISCAS
Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins
2013 C conf
A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS.
ISCAS
Wen-Lan Wu, Yan Zhu, Li Ding, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2013 — conf
A 1.7mW 0.22mm
ISSCC
Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2013 C conf
A 1.83 μW, 0.78 μVrms input referred noise neural recording front end.
ISCAS
Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2013 J jnl
A 2.3 mW 10-bit 170 MS/s Two-Step Binary-Search Assisted Time-Interleaved SAR ADC.
IEEE J. Solid State Circuits
Si-Seng Wong, U-Fat Chio, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2013 J jnl
A 5-Bit 1.25-GS/s 4x-Capacitive-Folding Flash ADC in 65-nm CMOS.
IEEE J. Solid State Circuits
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti
2013 J jnl
A 53-to-75-mW, 59.3-dB HRR, TV-Band White-Space Transmitter Using a Low-Frequency Reference LO in 65-nm CMOS.
IEEE J. Solid State Circuits
Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2013 J jnl
A Nonrecursive Digital Calibration Technique for Joint Elimination of Transmitter and Receiver I/Q Imbalances With Minimized Add-On Hardware.
IEEE Trans. Circuits Syst. II Express Briefs
Wei-Han Yu, Chak-Fong Cheang, Pui-In Mak, Weng-Fai Cheng, Ka-Fai Un, U-Wai Lok, Rui Paulo Martins
2013 — conf
A background gain- calibration technique for low voltage pipelined ADCs based on nonlinear interpolation.
MWSCAS
Li Ding, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2013 C conf
A continuous-time VCO-assisted VCO-based ΣΔ modulator with 76.6dB SNDR and 10MHz BW.
ISCAS
Yun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2013 J jnl
Correction to "A 0.016 mm
IEEE J. Solid State Circuits
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2013 — conf
Sub-threshold standard cell library design for ultra-low power biomedical applications.
EMBC
Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins
2012 — conf
A 0.016mm
ISSCC
Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2012 C conf
A 0.02-to-6GHz SDR balun-LNA using a triple-stage inverter-based amplifier.
ISCAS
Miguel A. Martins, Pui-In Mak, Rui Paulo Martins
2012 — conf
A 0.024 mm
ESSCIRC
Guohe Yin, He Gong Wei, U-Fat Chio, Sai-Weng Sin, Seng-Pan U., Zhihua Wang, Rui Paulo Martins
2012 — conf
A 0.8 µW 8-bit 1.5∼20-pF-input-range capacitance-to-digital converter for lab-on-chip digital microfluidics systems.
BioCAS
Yanjie Xiao, Tan-Tan Zhang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2012 J jnl
A 0.83-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform for Wireless ECG Acquisition in 0.35-µm CMOS.
IEEE Trans. Biomed. Circuits Syst.
Chio-In Ieong, Pui-In Mak, Chi-Pang Lam, Cheng Dong, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins
2012 — conf
A 10-bit SAR ADC with two redundant decisions and splitted-MSB-cap DAC array.
APCCAS
Wen-Lan Wu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2012 C conf
A 10MHz BW 78dB DR CT ΣΔ modulator with novel switched high linearity VCO-based quantizer.
ISCAS
Tao He, Yang Jiang, Yun Du, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2012 — conf
A 12-bit 110MS/s 4-stage single-opamp pipelined SAR ADC with ratio-based GEC technique.
ESSCIRC
Rui Wang, U-Fat Chio, Sai-Weng Sin, Seng-Pan U., Zhihua Wang, Rui Paulo Martins
2012 — conf
A 2.3mW 10-bit 170MS/s two-step binary-search assisted time-interleaved SAR ADC.
CICC
Si-Seng Wong, U-Fat Chio, Yan Zhu, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2012 — conf
A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure.
VLSIC
Chi-Hang Chan, Yan Zhu, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2012 — conf
A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC.
VLSIC
Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2012 J jnl
A 50-fJ 10-b 160-MS/s Pipelined-SAR ADC Decoupled Flip-Around MDAC and Self-Embedded Offset Cancellation.
IEEE J. Solid State Circuits
Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti
2012 — conf
A DT 0-2 MASH ΣΔ modulator with VCO-based quantizer for enhanced linearity.
APCCAS
Tao He, Yun Du, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2012 — conf
A dynamic-range-improved 2.4GHz WLAN class-E PA combining PWPM and cascode modulation.
APCCAS
Yinsidi Jiao, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2012 — conf
A robust NTF zero optimization technique for both low and high OSRs sigma-delta modulators.
APCCAS
Yun Du, Tao He, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2012 J jnl
An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC With Resistive DAC.
IEEE J. Solid State Circuits
He Gong Wei, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti
2012 — conf
An ELD tracking compensation technique for active-RC CT ΣΔ modulators.
MWSCAS
Chen-Yan Cai, Yang Jiang, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2011 — conf
A 0.024mm
ISSCC
He Gong Wei, Chi-Hang Chan, U-Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti
2011 J jnl
A 0.46-mm
IEEE J. Solid State Circuits
Pui-In Mak, Rui Paulo Martins
2011 — conf
A 0.46mm
ISSCC
Pui-In Mak, Rui Paulo Martins
2011 — conf
A 35 fJ 10b 160 MS/s pipelined-SAR ADC with decoupled flip-around MDAC and self-embedded offset cancellation.
A-SSCC
Yan Zhu, Chi-Hang Chan, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins, Franco Maloberti
2011 — conf
A 4.8-bit ENOB 5-bit 500MS/s binary-search ADC with minimized number of comparators.
A-SSCC
Si-Seng Wong, U. Fat Chio, Chi-Hang Chan, Hou-Lon Choi, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2011 — conf
A 7-bit 300-MS/s subranging ADC with embedded threshold & gain-loss calibration.
ESSCIRC
U. Fat Chio, Chi-Hang Chan, Hou-Lon Choi, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2011 C conf
A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologies.
ISCAS
Miao Liu, Pui-In Mak, Zushu Yan, Rui Paulo Martins
2011 — conf
A highly-linear ultra-wideband balun-LNA for cognitive radios.
EUROCON
Weng-Fai Cheng, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2011 — conf
A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOS.
A-SSCC
Chi-Hang Chan, Yan Zhu, U. Fat Chio, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2011 C conf
A single-to-differential LNA topology with robust output gain-phase balancing against balun imbalance.
ISCAS
Miguel A. Martins, Pui-In Mak, Rui Paulo Martins
2011 — conf
An ultra-low-power filtering technique for biomedical applications.
EMBC
Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Feng Wan, Rui Paulo Martins
2011 — conf
Hybrid loopfilter sigma-delta modulator with NTF zero compensation.
ISOCC
Arshad Hussain, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2010 J jnl
1.2-V, 10-bit, 60-360 MS/s time-interleaved pipelined analog-to-digital converter in 0.18 μm CMOS with minimised supply headroom.
IET Circuits Devices Syst.
Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2010 J jnl
A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS.
IEEE J. Solid State Circuits
Yan Zhu, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti
2010 — conf
A Fixed-Pulse Shape Feedback Technique with reduced clock-jitter sensitivity in Continuous-Time sigma-delta modulators.
ICECS
Yang Jiang, Kim-Fai Wong, Chen-Yan Cai, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2010 J jnl
A Rapid Power-Switchable Track-and-Hold Amplifier in 90-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
He Gong Wei, U-Fat Chio, Yan Zhu, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2010 — conf
A reduced jitter-sensitivity clock generation technique for continuous-time ΣΔ modulators.
APCCAS
Yang Jiang, Kim-Fai Wong, Chen-Yan Cai, Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2010 C conf
A voltage feedback charge compensation technique for split DAC architecture in SAR ADCs.
ISCAS
Yan Zhu, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2010 — conf
An 11b 60MS/s 2.1mW two-step time-interleaved SAR-ADC with reused S&H.
ESSCIRC
Sai-Weng Sin, Li Ding, Yan Zhu, He Gong Wei, Chi-Hang Chan, U. Fat Chio, Seng-Pan U, Rui Paulo Martins, Franco Maloberti
2010 — conf
An efficient DAC and interstage gain error calibration technique for multi-bit pipelined ADCs.
APCCAS
Li Ding, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2010 — conf
An ultra low power 9-bit 1-MS/s pipelined SAR ADC for bio-medical applications.
ICECS
Guohe Yin, U. Fat Chio, He Gong Wei, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Zhihua Wang
2010 J jnl
Analysis and Design of Open-Loop Multiphase Local-Oscillator Generator for Wireless Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2010 J jnl
Design and Experimental Verification of a Power Effective Flash-SAR Subranging ADC.
IEEE Trans. Circuits Syst. II Express Briefs
U-Fat Chio, He Gong Wei, Yan Zhu, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, Franco Maloberti
2010 J jnl
Linearity Analysis on a Series-Split Capacitor Array for High-Speed SAR ADCs.
VLSI Design
Yan Zhu, U. Fat Chio, He Gong Wei, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2010 C conf
SC biquad filter with hybrid utilization of OpAmp and comparator-based circuit.
ISCAS
Miguel A. Martins, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2009 C conf
A 90nm CMOS Bio-potential Signal Readout Front-end with Improved Powerline Interference Rejection.
ISCAS
Chon-Teng Ma, Pui-In Mak, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins
2009 C conf
An Open-loop Octave-phase Local-oscillator Generator with High-precision Correlated Phases for VHF/UHF Mobile-TV Tuners.
ISCAS
Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2009 J jnl
Design of an ESD-Protected Ultra-Wideband LNA in Nanoscale CMOS for Full-Band Mobile TV Tuners.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pui-In Mak, Rui Paulo Martins
2008 — conf
A novel CMOS switched-current mode sequential shift forward inference circuit for fuzzy logic controller.
APCCAS
Ngai Kong, Seng-Pan U, Rui Paulo Martins
2008 C conf
A power scalable 6-bit 1.2GS/s flash ADC with power on/off Track-and-Hold and preamplifier.
ISCAS
He Gong Wei, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2008 — conf
A power-efficient capacitor structure for high-speed charge recycling SAR ADCs.
ICECS
Yan Zhu, U. Fat Chio, He Gong Wei, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2008 C conf
An open-source-input, ultra-wideband LNA with mixed-voltage ESD protection for full-band (170-to-1700 MHz) mobile TV tuners.
ISCAS
Pui-In Mak, Ka-Hou Ao Ieong, Rui Paulo Martins
2008 J jnl
Generalized Circuit Techniques for Low-Voltage High-Speed Reset- and Switched-Opamps.
IEEE Trans. Circuits Syst. I Regul. Pap.
Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2008 J jnl
On the Design of a Programmable-Gain Amplifier With Built-In Compact DC-Offset Cancellers for Very Low-Voltage WLAN Systems.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2008 J jnl
Statistical Spectra and Distortion Analysis of Time-Interleaved Sampling Bandwidth Mismatch.
IEEE Trans. Circuits Syst. II Express Briefs
Sai-Weng Sin, U-Fat Chio, Seng-Pan U., Rui Paulo Martins
2007 C conf
A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC.
ISCAS
Weng-leng Mok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2007 J jnl
Experimental 1-V flexible-IF CMOS analoguebaseband chain for IEEE 802.11a/b/g WLAN receivers.
IET Circuits Devices Syst.
Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2007 J jnl
Interactive IIR SC Multirate Compiler Applied to Multistage decimator Design.
J. Circuits Syst. Comput.
Phillip Ngai Cheong, Rui Paulo Martins
2006 — conf
A 1-V 2.5-mW Transient-Improved Current-Steering DAC using Charge-Removal-Replacement Technique.
APCCAS
Ka-Hou Ao Ieong, Seng-Pan U., Rui Paulo Martins
2006 C conf
A dual-mode low-distortion sigma-delta modulator with relaxing comparator accuracy.
ISCAS
Kin-Sang Chio, Seng-Pan U., Rui Paulo Martins
2006 C conf
A novel effective bandpass semi-MASH sigma-delta modulator with double-sampling mismatch-free resonator.
ISCAS
Chon-In Lao, Seng-Pan U., Rui Paulo Martins
2006 C conf
A novel low-voltage finite-gain compensation technique for high-speed reset- and switched-opamp circuits.
ISCAS
Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2006 C conf
A power-efficient 1.056 GS/s resolution-switchable 5-bit/6-bit flash ADC for UWB applications.
ISCAS
Jun-Xia Ma, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2006 C conf
Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers.
ISCAS
Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2005 — conf
A 1-V transient-free and DC-offset-canceled PGA with a 17.1-MHz constant bandwidth over 52-dB control range in 0.35-μm CMOS.
CICC
Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2005 — conf
A frequency up-conversion and two-step channel selection embedded CMOS D/A interface.
ISCAS (1)
Ka-Hou Ao Ieong, Chong-Yin Fok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2005 — conf
A novel low-voltage cross-coupled passive sampling branch for reset- and switched-opamp circuits.
ISCAS (2)
Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2005 — conf
A novel microstrip bandpass filter design using asymmetric parallel coupled-line.
ISCAS (1)
Si-Weng Fok, Phillip Ngai Cheong, Kam-Weng Tam, Rui Paulo Martins
2005 — conf
A novel semi-MASH sub-stage for high-order cascade sigma-delta modulators.
ISCAS (4)
Chon-In Lao, Seng-Pan U., Rui Paulo Martins
2005 — conf
A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuits.
ISCAS (2)
Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2005 — conf
A robust 3rd order low-distortion multi-bit sigma-delta modulator with reduced number of op-amps for WCDMA.
ISCAS (4)
Kin-Sang Chio, Seng-Pan U., Rui Paulo Martins
2005 J jnl
Two-step channel selection-a novel technique for reconfigurable multistandard transceiver front-ends.
IEEE Trans. Circuits Syst. I Regul. Pap.
Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2004 J jnl
A 2.5-V 57-MHz 15-tap SC bandpass interpolating filter with 320-MS/s output for DDFS system in 0.35-μ hboxm CMOS.
IEEE J. Solid State Circuits
Seng-Pan U, Rui Paulo Martins, José E. Franca
2004 — conf
A generalized timing-skew-free, multi-phase clock generation platform for parallel sampled-data systems.
ISCAS (1)
Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins
2004 — conf
A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications.
ISCAS (4)
Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2004 — conf
An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver.
ISCAS (1)
Pui-In Mak, Kin-Kwan Ma, Weng-leng Mok, Chi-sam Sou, Kit-man Ho, Cheng-Man Ng, Seng-Pan U., Rui Paulo Martins
2004 J jnl
Exact spectra analysis of sampled signals with jitter-induced nonuniformly holding effects.
IEEE Trans. Instrum. Meas.
Seng-Pan U., Sai-Weng Sin, Rui Paulo Martins
2004 — conf
Novel interdigital microstrip bandpass filter with improved spurious response.
ISCAS (1)
Sio Weng Ting, Kam-Weng Tam, Rui Paulo Martins
2003 — conf
A 10.7-MHz bandpass sigma-delta modulator using double-delay single-opamp SC resonator with double-sampling.
ISCAS (1)
Chon-In Lao, Ho-leng Leong, Kuoi-Fok Au, Kuok-Hang Mok, Seng-Pan U., Rui Paulo Martins
2003 — conf
A front-to-back-end modeling of I/Q mismatch effects in a complex-IF receiver for image-rejection enhancement.
ICECS
Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2003 — conf
Frequency-downconversion and IF channel selection A-DQS sample-and-hold pair for two-step-channel-select low-IF receiver.
ICECS
Pui-In Mak, Chi-sam Sou, Seng-Pan U, Rui Paulo Martins
2003 — conf
Quantitative noise analysis of jitter-induced nonuniformly sampled-and-held signals.
ICASSP (6)
Sai-Weng Sin, Seng-Pan U, Rui Paulo Martins
2003 — conf
Timing-mismatch analysis in high-speed analog front-end with nonuniformly holding output.
ISCAS (1)
Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins, José E. Franca
2002 — conf
Design and analysis of low timing-skew clock generation for time-interleaved sampled-data systems.
ISCAS (4)
Seng-Pan U., Rui Paulo Martins, José E. Franca
2002 — conf
N-path multirate sigma-delta modulator for high-frequency applications.
ICECS
Fan Lou, Seng-Pan U, Rui Paulo Martins
2001 — conf
A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems.
ISCAS (1)
Seng-Pan U., Rui Paulo Martins, José E. Franca
2001 — conf
High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering.
ISCAS (1)
Seng-Pan U., Rui Paulo Martins, José E. Franca
2000 C conf
A linear-phase halfband SC video interpolation filter with coefficient-sharing and spread-reduction.
ISCAS
Seng-Pan U, Rui Paulo Martins, José E. Franca
2000 — conf
A modular approach for high Q microwave CMOS active inductor design.
ICECS
Ka Hing Chiang, K. V. Chiang, K. F. Lam, Wai-Wa Choi, Kam-Weng Tam, Rui Paulo Martins
2000 C conf
Interactive SC multirate compiler applied to multistage decimator design.
ISCAS
Cheong Ngai, Rui Paulo Martins
1999 — conf
Active feedback amplifier approach for microwave filter.
ICECS
Wai-Wa Choi, Kam-Weng Tam, P. Vitor, Rui Paulo Martins
1999 — conf
High performance multirate SC circuits with predictive correlated double sampling technique.
ISCAS (2)
Seng-Pan U., Rui Paulo Martins, José E. Franca
1999 — conf
Highly accurate mismatch-free SC delay circuits with reduced finite gain and offset sensitivity.
ISCAS (2)
Seng-Pan U., Rui Paulo Martins, José E. Franca
1999 — conf
New microwave bandstop filter using lumped and transversal network.
ISCAS (6)
Kam-Weng Tam, P. Vitor, J. C. Freire, Rui Paulo Martins
1998 — conf
A novel half-band SC architecture for efficient analog impulse sampled interpolation.
ICECS
Seng-Pan U, Rui Paulo Martins, José E. Franca
1996 — conf
New impulse sampled IIR switched-capacitor interpolators.
ICECS
Seng-Pan U., Rui Paulo Martins, José E. Franca
1993 J jnl
An optimum CMOS switched-capacitor antialiasing decimating filter.
IEEE J. Solid State Circuits
Rui Paulo Martins, José E. Franca, Franco Maloberti