Rostislav (Reuven) Dobkin

18 papers B 1C 1Journal 7Unranked 9
YearRankTypeTitle / Venue / Authors
2017 J jnl
A 1.4×FO4 self-clocked asynchronous serial link in 0.18 µm for intrachip communication.
Integr.
Y. Zhang, Rostislav (Reuven) Dobkin, Aharon Unikovski, Danniel Nahmanny, Goel Samuel, Michael Moyal, Ran Ginosar
2014 J jnl
StarSync: An extendable standard-cell mesochronous synchronizer.
Integr.
Dmitry Verbitsky, Rostislav (Reuven) Dobkin, Ran Ginosar, Salomon Beer
2013 — conf
MTBF Estimation in Coherent Clock Domains.
ASYNC
Salomon Beer, Ran Ginosar, Rostislav (Reuven) Dobkin, Yoav Weizman
2011 C conf
An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm.
ISCAS
Salomon Beer, Ran Ginosar, Michael Priel, Rostislav (Reuven) Dobkin, Avinoam Kolodny
2010 J jnl
Asynchronous Current Mode Serial Communication.
IEEE Trans. Very Large Scale Integr. Syst.
Rostislav (Reuven) Dobkin, Michael Moyal, Avinoam Kolodny, Ran Ginosar
2010 — conf
The Devolution of Synchronizers.
ASYNC
Salomon Beer, Ran Ginosar, Michael Priel, Rostislav (Reuven) Dobkin, Avinoam Kolodny
2009 J jnl
QNoC asynchronous router.
Integr.
Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Kolodny
2009 J jnl
Two-phase synchronization with sub-cycle latency.
Integr.
Rostislav (Reuven) Dobkin, Ran Ginosar
2008 — conf
Fast Universal Synchronizers.
PATMOS
Rostislav (Reuven) Dobkin, Ran Ginosar
2008 — conf
Parallel vs. serial on-chip communication.
SLIP
Rostislav (Reuven) Dobkin, Arkadiy Morgenshtein, Avinoam Kolodny, Ran Ginosar
2007 — conf
High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link.
ASYNC
Rostislav (Reuven) Dobkin, Yevgeny Perelman, Tuvia Liran, Ran Ginosar, Avinoam Kolodny
2007 — conf
QNoC Asynchronous Router with Dynamic Virtual Channel Allocation.
NOCS
Rostislav (Reuven) Dobkin, Ran Ginosar, Israel Cidon
2006 — conf
Fast Asynchronous Shift Register for Bit-Serial Communication.
ASYNC
Rostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Kolodny
2006 J jnl
High Rate Data Synchronization in GALS SoCs.
IEEE Trans. Very Large Scale Integr. Syst.
Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou
2005 — conf
An Asynchronous Router for Multiple Service Levels Networks on Chip.
ASYNC
Rostislav (Reuven) Dobkin, Victoria Vishnyakov, Eyal Friedman, Ran Ginosar
2005 J jnl
Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders.
IEEE Trans. Very Large Scale Integr. Syst.
Rostislav (Reuven) Dobkin, Michael Peleg, Ran Ginosar
2004 — conf
Data Synchronization Issues in GALS SoCs.
ASYNC
Rostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou
2002 B conf
Parallel VLSI architecture for MAP turbo decoder.
PIMRC
Rostislav (Reuven) Dobkin, Michael Peleg, Ran Ginosar