Roselyne Chotin-Avot

30 papers A 2B 1C 2Journal 5Unranked 19

Year	Rank	Type	Title / Venue / Authors
2019	A	`conf`	MixLock: Securing Mixed-Signal Circuits via Logic Locking. DATE Julian Leonhard, Muhammad Yasin, Shadi Turk, Mohammed Thari Nabeel, Marie-Minerve Louërat, Roselyne Chotin-Avot, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos
2018	J	`jnl`	Novel architectural space exploration environment for multi-FPGA based prototyping systems. Microprocess. Microsystems Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Maminionja Ravoson, Habib Mehrez
2017	J	`jnl`	AES-GCM and AEGIS: Efficient and High Speed Hardware Implementations. J. Signal Process. Syst. Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2016	—	`conf`	AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs. CS2@HiPEAC Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2016	C	`conf`	Inter-FPGA routing environment for performance exploration of multi-FPGA systems. RSP Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Maminionja Ravoson, Mariem Turki, Habib Mehrez
2016	—	`conf`	Multiple FPGAs based prototyping and debugging with complete design flow. IDT Muhammad Moazam Azeem, Roselyne Chotin-Avot, Umer Farooq, Maminionja Ravoson, Habib Mehrez
2016	C	`conf`	Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration. DSD Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Zouha Cherif, Maminionja Ravoson, Saqib Khan, Habib Mehrez
2014	—	`conf`	A reference-based specification tool for creating reliable library development specifications. NEWCAS Jung Kyu Chae, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez
2014	J	`jnl`	Authenticated encryption on FPGAs from the static part to the reconfigurable part. Microprocess. Microsystems Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2014	—	`conf`	FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm. ARC Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2014	—	`conf`	Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA. ISVLSI Saif-Ur Rehman, Adrien Blanchardon, Arwa Ben Dhia, Mounir Benabdenbi, Roselyne Chotin-Avot, Lirida A. B. Naviner, Lorena Anghel, Habib Mehrez, Emna Amouri, Zied Marrakchi
2014	—	`conf`	Impact of defect tolerance techniques on the criticality of a SRAM-based mesh of cluster FPGA. ReConFig Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Emna Amouri
2014	B	`conf`	Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster FPGA using hardware redundancy. FPL Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Emna Amouri
2014	J	`jnl`	Low cost solutions for secure remote reconfiguration of FPGAs. Int. J. Embed. Syst. Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2014	A	`conf`	Towards high performance GHASH for pipelined AES-GCM using FPGAs (abstract only). FPGA Karim M. Abdellatif, Roselyne Chotin-Avot, Zied Marrakchi, Habib Mehrez, Qingshan Tang
2013	—	`conf`	A defect-tolerant cluster in a mesh SRAM-based FPGA. FPT Arwa Ben Dhia, Saif-Ur Rehman, Adrien Blanchardon, Lirida A. B. Naviner, Mounir Benabdenbi, Roselyne Chotin-Avot, Emna Amouri, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	A formalism of the specifications for library development. SoCC Jung Kyu Chae, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez
2013	—	`conf`	Efficient AES-GCM for VPNs using FPGAs. MWSCAS Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2013	—	`conf`	Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture. ReConFig Emna Amouri, Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Zied Marrakchi
2013	—	`conf`	Efficient state-dependent power model for multi-bit flip-flop banks. MWSCAS Jung Kyu Chae, Severine Bertrand, Pierre-Francois Ollagnon, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez
2013	J	`jnl`	Exploring redundant arithmetics in computer-aided design of arithmetic datapaths. Integr. Sophie Belloeil-Dupuis, Roselyne Chotin-Avot, Habib Mehrez
2013	—	`conf`	High speed authenticated encryption for slow changing key applications using reconfigurable devices. Wireless Days Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2013	—	`conf`	Improved method for parallel AES-GCM cores using FPGAs. ReConFig Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2013	—	`conf`	Lightweight and compact solutions for secure reconfiguration of FPGAs. ReConFig Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2013	—	`conf`	Protecting FPGA bitstreams using authenticated encryption. NEWCAS Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2012	—	`conf`	Efficient parallel-pipelined GHASH for message authentication. ReConFig Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
2011	—	`conf`	Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools. ISQED Sophie Belloeil-Dupuis, Roselyne Chotin-Avot, Habib Mehrez
2008	—	`conf`	Arithmetic Data Path Optimization Using Borrow-Save Representation. ISVLSI Sophie Belloeil, Roselyne Chotin-Avot, Habib Mehrez
2006	—	`conf`	MP-SoC Architecture for an Obstacle Detection Application in Pre-Crash Situation. ReCoSoC Alain Greiner, Frédéric Pétrot, M. Carrier, Mounir Benabdenbi, Roselyne Chotin-Avot, Raphaël Labayrade
2003	—	`—`	Architectures matérielles pour l'arithmétique stochastique discrète. (Hardware architecture for discrete stochastic arithmetic). Roselyne Chotin-Avot