Roman Bartosinski

12 papers A 2B 2C 3Misc 1Unranked 4
YearRankTypeTitle / Venue / Authors
2014 — conf
Foreground detection in video streams in an FPGA without external memory.
DASIP
Martin Danek, Roman Bartosinski, Christian Hochberger
2012 — conf
Foreground detection and image segmentation in a flexible ASVP platform for FPGAs.
DASIP
Roman Bartosinski, Martin Danek, Jaroslav Sykora, Lukas Kohout, Petr Honzík
2012 C conf
Reducing Instruction Issue Overheads in Application-Specific Vector Processors.
DSD
Jaroslav Sykora, Roman Bartosinski, Lukas Kohout, Martin Danek, Petr Honzík
2012 C conf
The architecture and the technology characterization of an FPGA-based customizable Application-Specific Vector Processor.
DDECS
Jaroslav Sykora, Lukas Kohout, Roman Bartosinski, Leos Kafka, Martin Danek, Petr Honzík
2012 — conf
Video surveillance application based on application specific vector processors.
DASIP
Roman Bartosinski, Martin Danek, Jaroslav Sykora, Lukas Kohout, Petr Honzík
2011 Misc conf
The LD-RLS algorithmwith directional forgetting implemented on a vector-like hardware accelerator.
ICASSP
Roman Bartosinski
2008 B conf
Increasing the level of abstraction in FPGA-based designs.
FPL
Martin Danek, Jiri Kadlec, Roman Bartosinski, Lukas Kohout
2008 — conf
Self-Adaptive Networked Entities for Building Pervasive Computing Architectures.
ICES
Martin Danek, Jean-Marc Philippe, Petr Honzík, Christian Gamrat, Roman Bartosinski
2007 B conf
Accelerating Microblaze Floating Point Operations.
FPL
Jiri Kadlec, Roman Bartosinski, Martin Danek
2007 A conf
Integrated Environment for Embedded Control Systems Design.
IPDPS
Roman Bartosinski, Zdenek Hanzálek, Petr Struzka, Libor Waszniowski
2006 C conf
Processor Expert Enhances Matlab Simulink Facilities for Embedded Software Rapid Development.
ETFA
Roman Bartosinski, Zdenek Hanzálek, Libor Waszniowski, Petr Struzka
2005 A conf
Dynamic reconfiguration in FPGA-based SoC designs (abstract only).
FPGA
Roman Bartosinski, Martin Danek, Petr Honzík, Rudolf Matousek