Rohit Kapur - RankMe

88 papers A* 4A 26B 1C 1Misc 13Journal 24Unranked 19

Year	Rank	Type	Title / Venue / Authors
2021	J	`jnl`	New scan compression approach to reduce the test data volume. IET Comput. Digit. Tech. Pralhadrao V. Shantagiri, Rohit Kapur, Chandrasekar Shastry
2020	J	`jnl`	A Scan Obfuscation Guided Design-for-Security Approach for Sequential Circuits. IEEE Trans. Circuits Syst. II Express Briefs Rajit Karmakar, Santanu Chattopadhyay, Rohit Kapur
2018	J	`jnl`	Encrypt Flip-Flop: A Novel Logic Encryption Technique For Sequential Circuits. CoRR Rajit Karmakar, Santanu Chattopadhyay, Rohit Kapur
2018	J	`jnl`	Handling Unknown with Blend of Scan and Scan Compression. J. Electron. Test. Pralhadrao V. Shantagiri, Rohit Kapur
2017	Misc	`conf`	A New Logic Encryption Strategy Ensuring Key Interdependency. VLSID Rajit Karmakar, N. Prasad, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta
2017	—	`conf`	Deterministic Shift Power Reduction in Test Compression. VDAT Kanad Basu, Rishi Kumar, Santosh Kulkarni, Rohit Kapur
2017	A	`conf`	Diagnosing multiple faulty chains with low pin convolution compressor using compressed production test set. ITC Subhadip Kundu, Kuldip Kumar, Rishi Kumar, Rohit Kapur
2017	—	`conf`	Enhancing security of logic encryption using embedded key generation unit. ITC-Asia Rajit Karmakar, Santanu Chattopadhyay, Rohit Kapur
2016	A	`conf`	Handling wrong mapping: A new direction towards better diagnosis with low pin convolution compressors. ITC Subhadip Kundu, Parthajit Bhattacharya, Rohit Kapur
2016	J	`jnl`	Small Test Set Generation with High Diagnosability. J. Circuits Syst. Comput. Anupam Bhar, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2015	—	`conf`	Designing effective scan compression solutions for industrial circuits. ISQED Subramanian Chebiyam, Anshuman Chandra, Rohit Kapur
2015	—	`conf`	Designing efficient combinational compression architecture for testing industrial circuits. VDAT Anshuman Chandra, Santosh Kulkarni, Subramanian Chebiyam, Rohit Kapur
2015	A	`conf`	Fault diagnosis in designs with extreme low pin test data compressors. DATE Subhadip Kundu, Parthajit Bhattacharya, Rohit Kapur
2015	—	`conf`	GA based diagnostic test pattern generation for transition faults. VDAT Anupam Bhar, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2015	J	`jnl`	Scan Chain Masking for Diagnosis of Multiple Chain Failures in a Space Compaction Environment. IEEE Trans. Very Large Scale Integr. Syst. Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2014	—	`conf`	A Case Study on Implementing Compressed DFT Architecture. ATS Anshuman Chandra, Subramanian Chebiyam, Rohit Kapur
2014	J	`jnl`	Framework for Multiple-Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization. IEEE Trans. Very Large Scale Integr. Syst. Subhadip Kundu, Aniket Jha, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2014	Misc	`conf`	Innovative practices session 10C: Advances in DFT and compression. VTS Rohit Kapur, Irith Pomeranz
2014	—	`conf`	Unifying scan compression. DFT Swapnil Bahl, Shreyans Rungta, Shray Khullar, Rohit Kapur, Anshuman Chandra, Salvatore Talluto, Pramod Notiyath, Ajay Rajagopalan
2013	J	`jnl`	A Metric for Test Set Characterization and Customization Toward Fault Diagnosis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Subhadip Kundu, Sankhadeep Pal, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2013	B	`conf`	Aggresive scan chain masking for improved diagnosis of multiple scan chain failures. ETS Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2013	A*	`conf`	An ATE assisted DFD technique for volume diagnosis of scan chains. DAC Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2012	Misc	`conf`	A Diagnosability Metric for Test Set Selection Targeting Better Fault Detection. VLSI Design Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2011	—	`conf`	3D-Scalable Adaptive Scan (3D-SAS). 3DIC Uzair Shah Syed, Krishnendu Chakrabarty, Anshuman Chandra, Rohit Kapur
2011	—	`conf`	Breaking the Test Application Time Barriers in Compression: Adaptive Scan-Cyclical (AS-C). Asian Test Symposium Anshuman Chandra, Jyotirmoy Saikia, Rohit Kapur
2011	Misc	`conf`	Multiple Fault Diagnosis Based on Multiple Fault Simulation Using Particle Swarm Optimization. VLSI Design Subhadip Kundu, Santanu Chattopadhyay, Indranil Sengupta, Rohit Kapur
2011	—	`conf`	Predicting Scan Compression IP Configurations for Better QoR. Asian Test Symposium Jyotirmoy Saikia, Pramod Notiyath, Santosh Kulkarni, Ashok Anbalan, Rajesh Uppuluri, Tammy Fernandes, Parthajit Bhattacharya, Rohit Kapur
2011	Misc	`conf`	Special session 5B: Panel How much toggle activity should we be testing with? VTS Xiaoqing Wen, Mohammad Tehranipoor, Rohit Kapur, Anand Bhat, Amitava Majumdar, LeRoy Winemberg
2010	J	`jnl`	Conference Reports. IEEE Des. Test Comput. Rohit Kapur
2010	J	`jnl`	Conference Reports. IEEE Des. Test Comput. Rohit Kapur
2010	J	`jnl`	Conference Reports. IEEE Des. Test Comput. Rohit Kapur
2009	J	`jnl`	CTL and Its Usage in the EDA Industry. IEEE Des. Test Comput. Rohit Kapur, Paul Reuter, Sandeep Bhatia, Brion L. Keller
2009	—	`conf`	Proactive management of X's in scan chains for compression. ISQED Anshuman Chandra, Yasunari Kanzawa, Rohit Kapur
2009	A	`conf`	Scalable Adaptive Scan (SAS). DATE Anshuman Chandra, Rohit Kapur, Yasunari Kanzawa
2008	Misc	`conf`	Bounded Adjacent Fill for Low Capture Power Scan Testing. VTS Anshuman Chandra, Rohit Kapur
2008	—	`conf`	Evaluation of Entropy Driven Compression Bounds on Industrial Designs. ATS Srinivasulu Alampally, Jais Abraham, Rubin A. Parekhji, Rohit Kapur, Thomas W. Williams
2008	J	`jnl`	Historical Perspective on Scan Compression. IEEE Des. Test Comput. Rohit Kapur, Subhasish Mitra, Thomas W. Williams
2008	—	`conf`	Interval Based X-Masking for Scan Compression Architectures. ISQED Anshuman Chandra, Rohit Kapur
2008	A	`conf`	Low Power Illinois Scan Architecture for Simultaneous Power and Test Data Volume Reduction. DATE Anshuman Chandra, Felix Ng, Rohit Kapur
2008	—	`conf`	Not All Xs are Bad for Scan Compression. ATS Anshuman Chandra, Rohit Kapur
2007	C	`conf`	Accurately Determining Bridging Defects from Layout. DDECS Maria Gkatziani, Rohit Kapur, Qing Su, Ben Mathew, Roberto Mattiuzzo, Laura Tarantini, Cy Hay, Salvatore Talluto, Thomas W. Williams
2007	J	`jnl`	DFT MAX and Power. J. Low Power Electron. Rohit Kapur, T. Finklea, Felix Ng, Anshuman Chandra, Sanjay Ramnath, Peter Wohl, Thomas W. Williams, Ashok Anbalan, Sandeep S. Kulkarni, Tammy Fernandes, Pramod Notiyath, Rajesh Uppuluri
2007	A	`conf`	Fundamentals of timing information for test: How simple can we get? ITC Rohit Kapur, Jindrich Zejda, Thomas W. Williams
2007	Misc	`conf`	Minimizing the Impact of Scan Compression. VTS Peter Wohl, John A. Waicukauski, Rohit Kapur, Sanjay Ramnath, Emil Gizdarski, Thomas W. Williams, P. Jaini
2007	Misc	`conf`	Multimode Illinois Scan Architecture for Test Application Time and Test Data Volume Reduction. VTS Anshuman Chandra, Haihua Yan, Rohit Kapur
2007	A	`conf`	Testing in the year 2020. DATE Rajesh Galivanche, Rohit Kapur, Antonio Rubio
2006	A	`conf`	OCI: Open Compression Interface. ITC Bruce Cory, Rohit Kapur, Mick Tegethoff, Mark Kassab, Brion L. Keller, Kee Sup Kim, Dwayne Burek, Steven F. Oakland, Benoit Nadeau-Dostie
2005	A	`conf`	Efficient compression of deterministic patterns into multiple PRPG seeds. ITC Peter Wohl, John A. Waicukauski, Sanjay Patel, Francisco DaSilva, Thomas W. Williams, Rohit Kapur
2005	A	`conf`	Test the test experts: do we know what we are doing? ITC Rohit Kapur
2004	Misc	`conf`	Changing the Scan Enable during Shift. VTS Nodari Sitchinava, Samitha Samaranayake, Rohit Kapur, Emil Gizdarski, Frederic Neuveux, Thomas W. Williams
2004	A	`conf`	Security vs. Test Quality: Are they mutually exclusive? ITC Rohit Kapur
2003	Misc	`conf`	A Reconfigurable Shared Scan-in Architecture. VTS Samitha Samaranayake, Emil Gizdarski, Nodari Sitchinava, Frederic Neuveux, Rohit Kapur, Thomas W. Williams
2003	A	`conf`	Overview of the IEEE P1500 Standard. ITC Francisco DaSilva, Yervant Zorian, Lee Whetsel, Karim Arabi, Rohit Kapur
2003	J	`jnl`	Speed Binning with Path Delay Test in 150-nm Technology. IEEE Des. Test Comput. Bruce Cory, Rohit Kapur, Bill Underwood
2003	A	`conf`	Test Pattern Compression Using Prelude Vectors in Fan-Out Scan Chain with Feedback Architecture. DATE Nahmsuk Oh, Rohit Kapur, Thomas W. Williams, Jim Sproch
2002	A	`conf`	Analysis of Delay Test Effectiveness with a Multiple-Clock Scheme. ITC Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams
2002	A	`conf`	Directed-Binary Search in Logic BIST Diagnostics. DATE Rohit Kapur, Thomas W. Williams, M. Ray Mercer
2002	J	`jnl`	Dynamic Scan: Driving Down the Cost of Test. Computer Samitha Samaranayake, Nodari Sitchinava, Rohit Kapur, Minesh B. Amin, Thomas W. Williams
2002	A*	`conf`	Enhancing test efficiency for delay fault testing using multiple-clocked schemes. DAC Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jennifer Dworak, M. Ray Mercer, Rohit Kapur, Thomas W. Williams
2002	A	`conf`	Fast seed computation for reseeding shift register in test pattern compression. ICCAD Nahmsuk Oh, Rohit Kapur, Thomas W. Williams
2002	A	`conf`	Integrating DFT in the Physical Synthesis Flow. ITC Loïs Guiller, Frederic Neuveux, S. Duggirala, R. Chandramouli, Rohit Kapur
2002	—	`conf`	Manufacturing Test of SoCs. Asian Test Symposium Rohit Kapur, Thomas W. Williams
2002	J	`jnl`	On IEEE P1500's Standard for Embedded Core Test. J. Electron. Test. Erik Jan Marinissen, Rohit Kapur, Maurice Lousberg, Teresa L. McLaurin, Mike Ricchetti, Yervant Zorian
2001	A	`conf`	A new methodology for improved tester utilization. ITC Ajay Khoche, Rohit Kapur, David Armstrong, Thomas W. Williams, Mick Tegethoff, Jochen Rivoir
2001	A	`conf`	CTL the language for describing core-based test. ITC Rohit Kapur, Maurice Lousberg, Tony Taylor, Brion L. Keller, Paul Reuter, Douglas Kay
2001	Misc	`conf`	IP and Automation to Support IEEE P1500. VTS Dwayne Burek, Garen Darbinyan, Rohit Kapur, Maurice Lousberg, Teresa L. McLaurin, Mike Ricchetti
2001	J	`jnl`	Strategies for Low-Cost Test. IEEE Des. Test Comput. Rohit Kapur, R. Chandramouli, Thomas W. Williams
2001	A	`conf`	Tester retargetable patterns. ITC Rohit Kapur, Thomas W. Williams
2000	—	`conf`	DFT closure. Asian Test Symposium Farhad Hayat, Thomas W. Williams, Rohit Kapur, D. Hsu
2000	—	`conf`	Design for Testability in Nanometer Technologies; Searching for Quality. ISQED Thomas W. Williams, Rohit Kapur
2000	A	`conf`	On using IEEE P1500 SECT for test plug-n-play. ITC Yervant Zorian, Erik Jan Marinissen, Rohit Kapur
2000	J	`jnl`	The Mutating Metric for Benchmarking Test. IEEE Des. Test Comput. Rohit Kapur, Cy Hay, Thomas W. Williams
1999	A	`conf`	High level ATPG is important and is on its way! ITC Rohit Kapur
1999	J	`jnl`	Tough Challenges as Design and Test Go Nanometer - Guest Editors' Introduction. Computer Rohit Kapur, Thomas W. Williams
1999	A	`conf`	Towards a standard for embedded core test: an example. ITC Yervant Zorian, Erik Jan Marinissen, Rohit Kapur, Tony Taylor, Lee Whetsel
1997	J	`jnl`	Cost-Driven Ranking of Memory Elements for Partial Intrusion. IEEE Des. Test Comput. Magdy S. Abadir, Rohit Kapur
1996	J	`jnl`	A weighted random pattern test generation system. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Rohit Kapur, Srinivas Patil, Thomas J. Snethen, Thomas W. Williams
1996	A	`conf`	I ITC Thomas W. Williams, Robert H. Dennard, Rohit Kapur, M. Ray Mercer, Wojciech Maly
1996	—	`conf`	Iddq Testing for High Performance CMOS - The Next Ten Years. ED&TC Thomas W. Williams, Rohit Kapur, M. Ray Mercer, Robert H. Dennard, Wojciech Maly
1996	J	`jnl`	System Test and Reliability: Techniques for Avoiding Failure (Guest Editors' Introduction). Computer Rohit Kapur, Edward F. Miller
1994	A	`conf`	Design of an Efficient Weighted-Random-Pattern Generation System. ITC Rohit Kapur, Srinivas Patil, Thomas J. Snethen, Thomas W. Williams
1994	Misc	`conf`	Limitations in predicting defect level based on stuck-at fault coverage. VTS Jaehong Park, Mark Naivar, Rohit Kapur, M. Ray Mercer, Thomas W. Williams
1992	A	`conf`	All Tests for a Fault Are Not Equally Valuable for Defect Detection. ITC Rohit Kapur, Jaehong Park, M. Ray Mercer
1992	J	`jnl`	Bounding Signal Probabilities for Testability Measurement Using Conditional Syndromes. IEEE Trans. Computers Rohit Kapur, M. Ray Mercer
1992	A*	`conf`	Functional Approaches to Generating Orderings for Efficient Symbolic Representations. DAC M. Ray Mercer, Rohit Kapur, Don E. Ross
1992	Misc	`conf`	The roles of controllability and observability in design for test. VTS Kenneth M. Butler, Rohit Kapur, M. Ray Mercer, Don E. Ross
1991	—	`conf`	Fast functional evaluation of candidate OBDD variable orderings. EURO-DAC Don E. Ross, Kenneth M. Butler, Rohit Kapur, M. Ray Mercer
1991	A*	`conf`	Heuristics to Compute Variable Orderings for Efficient Manipulation of Ordered Binary Decision Diagrams. DAC Kenneth M. Butler, Don E. Ross, Rohit Kapur, M. Ray Mercer