Rohit Dhiman

15 papers C 1Journal 8Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
Sampling-Biorthogonal Time-Domain Technique for Temperature-Dependent Transient Analysis of Coaxial-TGVs in 3-D Integration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
K. Madhu Kiran, Rohit Dhiman
2025 J jnl
Three-phased multi-scale residual-dense modified-U-Net architecture for deep image steganography.
Comput. Electr. Eng.
Suyash Sachdeva, Ujjwal Sharma, Priyanshu Rajput, Riya Singhal, K. Madhu Kiran, Rohit Dhiman
2023 J jnl
Frequency response and transient analysis of through glass packaging vias using matrix-rational approximation (MRA) technique for three-dimensional ICs.
Microelectron. J.
Ajay Kumar, Rohit Dhiman
2022 J jnl
A physics-based drain current model for Si
Microelectron. J.
Anchal Thakur, Rohit Dhiman
2022 — conf
Differential Multi-bit Through Glass Vias for Three-Dimensional Integrated Circuits.
VDAT
Ajay Kumar, Rohit Dhiman
2022 J jnl
Proposal and analysis of carbon nanotube based differential multibit through glass vias.
Microelectron. J.
Ajay Kumar, Rajeevan Chandel, Rohit Dhiman
2021 — conf
Brain-Computer Interfacing: Design of Virtual Keyboard.
ICCCNT
Palak Sood, Rohit Dhiman
2021 J jnl
Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects.
Integr.
Ashish Singh, Rajeevan Chandel, Rohit Dhiman
2019 C conf
Design and Performance Analysis of SiGe Hetero Nanotube Junctionless FET.
TENCON
Anchal Thakur, Rohit Dhiman
2017 — conf
Delay and Frequency Investigations in Coupled MLGNR Interconnects.
VDAT
Manish Joshi, Koduri Teja, Ashish Singh, Rohit Dhiman
2016 — conf
A 60 dB Bulk-Driven Rail-to-Rail Input/Output OTA.
iNIS
Abhishek Shrivastava, Ajay Pratap Gangwar, Rahul Kumar, Rohit Dhiman
2016 — conf
Performance Analysis of Top-Contact MLGNR Based Interconnects.
iNIS
Ramesh Kumar, Rohit Dhiman, Rajeevan Chandel
2015 J jnl
Dynamic Crosstalk Analysis in Coupled Interconnects for Ultra-Low Power Applications.
Circuits Syst. Signal Process.
Rohit Dhiman, Rajeevan Chandel
2012 J jnl
Sub-Threshold Delay and Power Analysis of Complementary Metal-Oxide Semiconductor Buffer Driven Interconnect Load for Ultra Low Power Applications.
J. Low Power Electron.
Rohit Dhiman, Rajeevan Chandel
2011 — conf
Resistive analysis of mixed carbon nanotube bundle interconnect and its comparison with copper interconnect.
ICWET
Tafseer Alam, Rohit Dhiman, Rajeevan Chandel