Rochit Rajsuman

40 papers A* 3A 8B 1C 1Misc 4Journal 18Unranked 5
YearRankTypeTitle / Venue / Authors
2006 J jnl
Guest Editorial Second Special Section of the IEEE Transactions on Instrumentation and Measurement in the Area of VLSI Testing - Future of Semiconductor Test.
IEEE Trans. Instrum. Meas.
Sunil R. Das, Rochit Rajsuman
2006 — conf
Innovation In Test: Where Are We.
DELTA
Rochit Rajsuman
2006 C conf
Towards The Methodology of On-line Diagnosis.
IOLTS
Rochit Rajsuman
2005 J jnl
Architecture and design of an open ATE to incubate the development of third-party instruments.
IEEE Trans. Instrum. Meas.
Rochit Rajsuman, Masuda Noriyuki, Kazuhiro Yamashita
2005 J jnl
Guest Editorial First Special Section of the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT in the Area of VLSI Testing - Future of Semiconductor Test.
IEEE Trans. Instrum. Meas.
Sunil R. Das, Rochit Rajsuman
2004 — conf
An Overview of the Open Architecture Test System.
DELTA
Rochit Rajsuman
2004 — conf
New opportunities with the open architecture test system.
ASP-DAC
Rochit Rajsuman
2004 A conf
Open Architecture Test System: System Architecture and Design.
ITC
Rochit Rajsuman, Masuda Noriyuki
2004 — conf
Opportunities with the open architecture test system.
ASP-DAC
Kazumi Hatayama, Rochit Rajsuman
2003 J jnl
Architecture, design, and application of an event-based test system.
IEEE Trans. Instrum. Meas.
Rochit Rajsuman
2003 J jnl
Guest editorial [Special section on innovations in VLSI automatic test equipment (ATEs)].
IEEE Trans. Instrum. Meas.
Sunil R. Das, Rochit Rajsuman
2002 A conf
Can IC Test Learn from How a Tester is Tested.
ITC
Rochit Rajsuman
2002 — conf
Extending EDA Environment From Design to Test.
Asian Test Symposium
Rochit Rajsuman
2002 A conf
Testing The Tester.
ITC
Rochit Rajsuman
2002 A conf
Testing The Tester.
ITC
Rochit Rajsuman
2001 J jnl
Design and Test of Large Embedded Memories: An Overview.
IEEE Des. Test Comput.
Rochit Rajsuman
2001 J jnl
Guest Editors' Intoduction: The New World of Large Embedded Memories.
IEEE Des. Test Comput.
Rochit Rajsuman, Francky Catthoor
2001 A conf
Test and repair of large embedded DRAMs. I.
ITC
Roderick McConnell, Rochit Rajsuman, Eric A. Nelson, Jeffrey H. Dreibelbis
2000 A conf
A new paradigm in test for the next millennium.
ITC
Jerry Katz, Rochit Rajsuman
2000 J jnl
Iddq testing for CMOS VLSI.
Proc. IEEE
Rochit Rajsuman
1999 A conf
Testing a system-on-a-chip with embedded microprocessor.
ITC
Rochit Rajsuman
1997 J jnl
VLSI Testing for High Reliability: Mixing IDDQ Testing With Logic Testing.
VLSI Design
Suntae Hwang, Rochit Rajsuman
1996 A conf
Challenge of the 90's: Testing CoreWare
ITC
Rochit Rajsuman
1995 J jnl
Testable design of BiCMOS circuits for stuck-open fault detection using single patterns.
IEEE J. Solid State Circuits
Sankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Rochit Rajsuman
1994 J jnl
A new testing method for EEPLA.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rochit Rajsuman
1994 J jnl
STD Architecture: A Practical Approach to Test M-Bits Random Access Memories.
VLSI Design
Rochit Rajsuman, Kamal Rajkanan
1994 J jnl
Special Issue on Digital Hardware Testing.
VLSI Design
Rochit Rajsuman
1993 Misc conf
Coverage of Bridging Faults by Random Testing in I
VLSI Design
Rochit Rajsuman, David A. Penry
1992 Misc conf
An Architecture To Test Random Access Memories.
VLSI Design
Rochit Rajsuman
1992 B conf
An analysis and simulation of multiple ring token networks.
LCN
David A. Vasko, Rochit Rajsuman
1991 Misc conf
An analysis and testing of operation induced faults in MOS VLSI.
VTS
Rochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya, Juney Park
1991 Misc conf
An analysis of feedback bridging faults in MOS VLSI.
VTS
Rochit Rajsuman
1991 J jnl
Design of CMOS circuits for stuck-open fault testability.
IEEE J. Solid State Circuits
Anura P. Jayasumana, Yashwant K. Malaiya, Rochit Rajsuman
1990 J jnl
Implementation of switch network logic in SOI.
IEEE J. Solid State Circuits
Rochit Rajsuman
1990 A* conf
On the testing of microprogrammed processor.
MICRO
Suntae Hwang, Rochit Rajsuman, Yashwant K. Malaiya
1989 A* conf
CMOS Stuck-open Fault Detection Using Single Test Patterns.
DAC
Rochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya
1989 J jnl
CMOS open-fault detection in the presence of glitches and timing skews.
IEEE J. Solid State Circuits
Rochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya
1989 J jnl
CMOS stuck-open fault testability.
IEEE J. Solid State Circuits
Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana
1989 J jnl
Limitations of switch level analysis for bridging faults.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana
1987 A* conf
On Accuracy of Switch-Level Modeling of Bridging Faults in Complex Gates.
DAC
Rochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana