Roberto Perez-Andrade

13 papers B 1Journal 6Unranked 6
YearRankTypeTitle / Venue / Authors
2015 J jnl
Processor arrays generation for matrix algorithms used in embedded platforms implemented on FPGAs.
Microprocess. Microsystems
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido
2013 — conf
A parallelization methodology for reconfigurable systems applied to edge detection.
ReCoSoC
Juan M. Campos, René Cumplido, Claudia Feregrino-Uribe, Roberto Perez-Andrade
2013 J jnl
On an external memory scheme for processor arrays.
IEICE Electron. Express
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido, Juan M. Campos
2013 — conf
Processor arrays generation for matrix algorithms used in embedded platforms.
ReConFig
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido, Juan M. Campos
2012 J jnl
A multi-cycle fixed point square root module for FPGAs.
IEICE Electron. Express
Fernando Martin del Campo, Alicia Morales-Reyes, Roberto Perez-Andrade, René Cumplido, Aldo G. Orozco-Lugo, Claudia Feregrino
2011 — conf
On a Hybrid and General Control Scheme for Algorithms Represented as a Polytope.
IPDPS Workshops
Roberto Perez-Andrade, César Torres-Huitzil, René Cumplido, Juan M. Campos
2011 — conf
Towards Symbolic Run-Time Reconfiguration in Tightly-Coupled Processor Arrays.
ReConFig
Srinivas Boppu, Frank Hannig, Jürgen Teich, Roberto Perez-Andrade
2010 J jnl
A versatile hardware architecture for a constant false alarm rate processor based on a linear insertion sorter.
Digit. Signal Process.
Roberto Perez-Andrade, René Cumplido, Claudia Feregrino-Uribe, Fernando Martin del Campo
2009 J jnl
A System on a Programmable Chip Architecture for Data-Dependent Superimposed Training Channel Estimation.
Int. J. Reconfigurable Comput.
Fernando Martin del Campo, René Cumplido, Roberto Perez-Andrade, Aldo G. Orozco-Lugo
2009 J jnl
A versatile linear insertion sorter based on an FIFO scheme.
Microelectron. J.
Roberto Perez-Andrade, René Cumplido, Claudia Feregrino-Uribe, Fernando Martin del Campo
2008 — conf
A Versatile Linear Insertion Sorter Based on a FIFO Scheme.
ISVLSI
Roberto Perez-Andrade, René Cumplido, Fernando Martin del Campo, Claudia Feregrino-Uribe
2008 B conf
A versatile hardware architecture for a CFAR detector based on a linear insertion sorter.
FPL
Roberto Perez-Andrade, René Cumplido, Claudia Feregrino-Uribe, Fernando Martin del Campo
2008 — conf
Hybrid Architecture for Data-Dependent Superimposed Training in Digital Receivers.
ReConFig
Fernando Martin del Campo, René Cumplido, Roberto Perez-Andrade, Aldo G. Orozco-Lugo