Roberto Muscedere

40 papers C 9Misc 1Journal 14Unranked 16
YearRankTypeTitle / Venue / Authors
2020 — conf
A Non-Magnetic RF Balun Designed at 128 MHz Centre frequency for 3 T MRI Scanners.
CCECE
Ali Dianat, Ali Attaran, Roberto Muscedere, Blaine A. Chronik
2020 C conf
An Efficient Spiking Neuron Hardware System Based on the Hardware-Oriented Modified Izhikevich Neuron (HOMIN) Model.
ISCAS
Alexander J. Leigh, Mitra Mirhassani, Roberto Muscedere
2020 J jnl
An Efficient Spiking Neuron Hardware System Based on the Hardware-Oriented Modified Izhikevich Neuron (HOMIN) Model.
IEEE Trans. Circuits Syst.
Alexander J. Leigh, Mitra Mirhassani, Roberto Muscedere
2019 — conf
Hardware Trojan Prevention Through Limiting Access to the Active Region.
DTIS
Tareq Muhammad Supon, Mahsasadat Seyedbarhagh, Rashid Rashidzadeh, Roberto Muscedere
2019 — conf
PCB Fabricated Passive RF Balun for 3 T MRI Applications.
CCECE
Ali Dianat, Ali Attaran, Roberto Muscedere, Blaine A. Chronik
2018 J jnl
Efficient VLSI Implementation of a Sequential Finite Field Multiplier Using Reordered Normal Basis in Domino Logic.
IEEE Trans. Very Large Scale Integr. Syst.
Parham Hosseinzadeh Namin, Crystal Andrea Roma, Roberto Muscedere, Majid Ahmadi
2018 — conf
Reliability of Physical Unclonable Function under Temperature and Supply Voltage Variations.
MWSCAS
Manpreet Kaur, Rashid Rashidzadeh, Roberto Muscedere
2017 J jnl
A Fully Serial-In Parallel-Out Digit-Level Finite Field Multiplier in 𝔽
IEEE Trans. Circuits Syst. II Express Briefs
Parham Hosseinzadeh Namin, Roberto Muscedere, Majid Ahmadi
2017 — conf
A hardware accelerated proportional text layout and placement engine.
CCECE
S. Servati Beiragh, Roberto Muscedere
2017 — conf
A secure scan chain using a phase locking system and a reconfigurable LFSR.
CCECE
Yahia Ouahab, Rashid Rashidzadeh, Roberto Muscedere
2017 — conf
A software tool for generating optimized multipartite table parameters.
CCECE
Roberto Muscedere, Mitra Mirhassani
2017 — conf
An FPGA implementation of a custom JPEG image decoder SoC module.
CCECE
G. Kyrtsakas, Roberto Muscedere
2017 — conf
An efficient FPGA implementation of Optical Character Recognition for License Plate Recognition.
CCECE
Yuan Jing, Bahar Youssefi, Mitra Mirhassani, Roberto Muscedere
2017 J jnl
Digit-Level Serial-In Parallel-Out Multiplier Using Redundant Representation for a Class of Finite Fields.
IEEE Trans. Very Large Scale Integr. Syst.
Parham Hosseinzadeh Namin, Roberto Muscedere, Majid Ahmadi
2016 J jnl
Improved particle filter based on WLAN RSSI fingerprinting and smart sensors for indoor localization.
Comput. Commun.
Zheng Wu, Esrafil Jedari, Roberto Muscedere, Rashid Rashidzadeh
2015 Misc conf
Low power design of a word-level finite field multiplier using Reordered Normal Basis.
ACSSC
Parham Hosseinzadeh Namin, Roberto Muscedere, Majid Ahmadi
2014 — conf
Resonant-based test method for MEMS devices.
ICECS
Ali Dianat, Ali Attaran, Rashid Rashidzadeh, Roberto Muscedere
2013 C conf
A GPU implementation of the Montgomery multiplication algorithm for elliptic curve cryptography.
ISCAS
Karl Leboeuf, Roberto Muscedere, Majid Ahmadi
2013 C conf
Application of neural networks with CSD coefficients for human face recognition.
ISCAS
Ayesa Parvin, Majid Ahmadi, Roberto Muscedere
2012 C conf
High performance prime field multiplication for GPU.
ISCAS
Karl Leboeuf, Roberto Muscedere, Majid Ahmadi
2011 J jnl
A RISC architecture for 2DLNS-based signal processing.
Int. J. High Perform. Syst. Archit.
Mahzad Azarmehr, Roberto Muscedere
2011 C conf
An FPGA-based signal processing system for a 77 GHz MEMS tri-mode automotive radar.
International Symposium on Rapid System Prototyping
Sazzadur Chowdhury, Roberto Muscedere, Sundeep Lal
2011 — conf
Image processing technique for segmenting microstructural porosity of laser-welded thermoplastics.
ICECS
Karl Leboeuf, Iman Makaremi, Roberto Muscedere, Majid Ahmadi
2010 J jnl
High-speed and low-power reconfigurable architectures of 2-digit two-dimensional logarithmic number system-based recursive multipliers.
IET Circuits Devices Syst.
Mahzad Azarmehr, Mohammad M. Ahmadi, Graham A. Jullien, Roberto Muscedere
2010 J jnl
High-speed hardware implementation of a serial-in parallel-out finite field multiplier using reordered normal basis.
IET Circuits Devices Syst.
Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi
2009 J jnl
A Delay Generation Technique for Narrow Time Interval Measurement.
IEEE Trans. Instrum. Meas.
Rashid Rashidzadeh, Roberto Muscedere, Majid Ahmadi, William C. Miller
2009 — conf
A low-cost, real-time, hardware-based image demosaicking algorithm.
EIT
Anthony C. Karloff, Roberto Muscedere
2009 C conf
Efficient Hardware Implementation of the Hyperbolic Tangent Sigmoid Function.
ISCAS
Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi
2009 J jnl
Flexible real-time cost-effective high-throughput inspection system for pharmaceutical capsules.
J. Electronic Imaging
Anthony C. Karloff, Neil E. Scott, Roberto Muscedere
2009 — conf
High speed VLSI implementation of a finite field multiplier using redundant representation.
ECCTD
Ashkan Hosseinzadeh Namin, Karl Leboeuf, Roberto Muscedere, Huapeng Wu, Majid Ahmadi
2008 C conf
A dynamic address decode circuit for implementing range addressable look-up tables.
ISCAS
Roberto Muscedere, Karl Leboeuf
2008 J jnl
Improving 2D-Log-Number-System Representations by Use of an Optimal Base.
EURASIP J. Adv. Signal Process.
Roberto Muscedere
2007 C conf
A Hardware Efficient Very Large Bit Word Binary to Double Base Number System Converter for Encryption Applications.
ISCAS
Roberto Muscedere
2007 — conf
A Simple Central Processing Unit with Multi-Dimensional Logarithmic Number System Extensions.
ASAP
Mahzad Azarmehr, Roberto Muscedere
2005 J jnl
A Low-Power Two-Digit Multi-dimensional Logarithmic Number System Filterbank Architecture for a Digital Hearing Aid.
EURASIP J. Adv. Signal Process.
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
2005 J jnl
Efficient Techniques for Binary-to-Multidigit Multidimensional Logarithmic Number System Conversion Using Range-Addressable Look-Up Tables.
IEEE Trans. Computers
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
2002 — conf
Efficient Conversion From Binary to Multi-Digit Multi-Dimensional Logarithmic Number Systems Using Arrays of Range Addressable Look-Up Tables.
ASAP
Roberto Muscedere, Vassil S. Dimitrov, Graham A. Jullien, William C. Miller
2002 — conf
On the use of hash functions for defect detection in textures for in-camera web inspection systems.
ISCAS (5)
Ibrahim Cem Baykal, Roberto Muscedere, Graham A. Jullien
2000 C conf
Defect detection in web inspection using fuzzy fusion of texture features.
ISCAS
S. Hossain Hajimowlana, Roberto Muscedere, Graham A. Jullien, James W. Roberts
1999 J jnl
An In-Camera Data Stream Processing System for Defect Detection in Web Inspection Tasks.
Real Time Imaging
S. Hossain Hajimowlana, Roberto Muscedere, Graham A. Jullien, James W. Roberts