Robert Schöne

64 papers A 1B 9C 4Journal 16Unranked 33

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A Taxonomy of Application Properties for Mixed-Precision Autotuning (Position Paper). ICPE Companion Gülçin Gedik, Christian von Elm, Robert Schöne
2026	B	`conf`	Improving Energy Efficiency and Performance of Weather and Climate Simulations by Leveraging the Heterogeneity of Modern Systems. ICPE Julius Plehn, Christian von Elm, Pay Giesselmann, Carsten Clauss, Hendryk Bockelmann, Robert Schöne, Jan Frederik Engels
2025	B	`conf`	An Analysis of User-space Idle State Instructions on x86 Processors. ICPE Malte-Christian Kuns, Hannes Tröpgen, Robert Schöne
2025	J	`jnl`	Introducing the Arm-membench Throughput Benchmark. CoRR Cyrill Burth, Markus Velten, Robert Schöne
2025	—	`conf`	Performance Tools for the NEC SX-Aurora Tsubasa. ICPE (Companion) Christian von Elm, Robert Schöne
2025	C	`conf`	Pinpointing Idle-Power Regressions in Linux. ISC Hannes Tröpgen, Till Smejkal, Thomas Ilsche, Robert Schöne, Horst Schirmeier
2024	—	`conf`	16 Years of SPEC Power: An Analysis of x86 Energy Efficiency Trends. CLUSTER Workshops Hannes Tröpgen, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2024	J	`jnl`	16 Years of SPEC Power: An Analysis of x86 Energy Efficiency Trends. CoRR Hannes Tröpgen, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2024	B	`conf`	Energy Efficiency Features of the Intel Alder Lake Architecture. ICPE Robert Schöne, Markus Velten, Daniel Hackenberg, Thomas Ilsche
2024	—	`conf`	Introducing the Arm-Membench Throughput Benchmark. PPAM (1) Cyrill Burth, Markus Velten, Robert Schöne
2024	—	`conf`	Optimizing Idle Power of HPC Systems: Practical Insights and Methods. CLUSTER Workshops Thomas Ilsche, Sebastian Schräder, Robert Schöne
2024	—	`conf`	Towards Large-Scale Top-Down Microarchitecture Analysis Using the Score-P Framework. Euro-Par Workshops (1) Maximilian Sander, Hannes Tröpgen, Christian von Elm, Robert Schöne
2023	—	`conf`	How Do OS and Application Schedulers Interact? An Investigation with Multithreaded Applications. Euro-Par Jonas H. Müller Korndörfer, Ahmed Eleliemy, Osman Seckin Simsek, Thomas Ilsche, Robert Schöne, Florina M. Ciorba
2022	B	`conf`	Memory Performance of AMD EPYC Rome and Intel Cascade Lake SP Server Processors. ICPE Markus Velten, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2022	J	`jnl`	Memory Performance of AMD EPYC Rome and Intel Cascade Lake SP Server Processors. CoRR Markus Velten, Robert Schöne, Thomas Ilsche, Daniel Hackenberg
2021	—	`conf`	Controlling the Runtime Overhead of Python Monitoring with Selective Instrumentation. ProTools@SC Andreas Gocht, Alexander Grund, Robert Schöne
2021	C	`conf`	Energy Efficiency Aspects of the AMD Zen 2 Architecture. CLUSTER Robert Schöne, Thomas Ilsche, Mario Bielert, Markus Velten, Markus Schmidl, Daniel Hackenberg
2021	J	`jnl`	Energy Efficiency Aspects of the AMD Zen 2 Architecture. CoRR Robert Schöne, Thomas Ilsche, Mario Bielert, Markus Velten, Markus Schmidl, Daniel Hackenberg
2021	C	`conf`	FIRESTARTER 2: Dynamic Code Generation for Processor Stress Tests. CLUSTER Robert Schöne, Markus Schmidl, Mario Bielert, Daniel Hackenberg
2021	J	`jnl`	FIRESTARTER 2: Dynamic Code Generation for Processor Stress Tests. CoRR Robert Schöne, Markus Schmidl, Mario Bielert, Daniel Hackenberg
2021	—	`conf`	Investigating the Cause and Effect of an AMD Zen Energy Management Anomaly. ICPE (Companion) Christian von Elm, Thomas Ilsche, Robert Schöne, Mario Bielert, Markus Schmidl
2020	J	`jnl`	Advanced Python Performance Monitoring with Score-P. CoRR Andreas Gocht, Robert Schöne, Jan Frenzel
2019	—	`conf`	A New Approach for Automated Feature Selection. GI-Jahrestagung Andreas Gocht, Christoph Lehmann, Robert Schöne
2019	—	`conf`	Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance. HPCS Robert Schöne, Thomas Ilsche, Mario Bielert, Andreas Gocht, Daniel Hackenberg
2019	J	`jnl`	Energy Efficiency Features of the Intel Skylake-SP Processor and Their Impact on Performance. CoRR Robert Schöne, Thomas Ilsche, Mario Bielert, Andreas Gocht, Daniel Hackenberg
2019	—	`conf`	MetricQ: A Scalable Infrastructure for Processing High-Resolution Time Series Data. DAAC@SC Thomas Ilsche, Daniel Hackenberg, Robert Schöne, Mario Höpfner, Wolfgang E. Nagel
2019	J	`jnl`	Power measurement techniques for energy-efficient computing: reconciling scalability, resolution, and accuracy. SICS Softw.-Intensive Cyber Phys. Syst. Thomas Ilsche, Robert Schöne, Joseph Schuchart, Daniel Hackenberg, Marc Simon, Yiannis Georgiou, Wolfgang E. Nagel
2019	—	`conf`	Q-Learning Inspired Self-Tuning for Energy Efficiency in HPC. HPCS Andreas Gocht, Robert Schöne, Mario Bielert
2019	J	`jnl`	Q-Learning Inspired Self-Tuning for Energy Efficiency in HPC. CoRR Andreas Gocht, Robert Schöne, Mario Bielert
2018	—	`conf`	A New Approach for Automated Feature Selection. IEEE BigData Andreas Gocht, Christoph Lehmann, Robert Schöne
2018	—	`conf`	System Monitoring with lo2s: Power and Runtime Impact of C-State Transitions. IPDPS Workshops Thomas Ilsche, Robert Schöne, Philipp Joram, Mario Bielert, Andreas Gocht
2018	J	`jnl`	The Shift from Processor Power Consumption to Performance Variations: Fundamental Implications at Scale. CoRR Joseph Schuchart, Daniel Hackenberg, Robert Schöne, Thomas Ilsche, Ramkumar Nagappan, Michael K. Patterson
2017	—	`—`	A Unified Infrastructure for Monitoring and Tuning the Energy Efficiency of HPC Applications. Robert Schöne
2017	B	`conf`	Detecting Memory-Boundedness with Hardware Performance Counters. ICPE Daniel Molka, Robert Schöne, Daniel Hackenberg, Wolfgang E. Nagel
2017	—	`conf`	Powernightmares: The Challenge of Efficiently Using Sleep States on Multi-core Systems. Euro-Par Workshops Thomas Ilsche, Marcus Hähnel, Robert Schöne, Mario Bielert, Daniel Hackenberg
2017	A	`conf`	Towards fine-grained dynamic tuning of HPC applications on modern multi-core architectures. SC Mohammed Sourouri, Espen Birger Raknes, Nico Reissmann, Johannes Langguth, Daniel Hackenberg, Robert Schöne, Per Gunnar Kjeldsberg
2017	C	`conf`	lo2s - Multi-core System and Application Performance Analysis for Linux. CLUSTER Thomas Ilsche, Robert Schöne, Mario Bielert, Andreas Gocht, Daniel Hackenberg
2016	—	`conf`	Software Controlled Clock Modulation for Energy Efficiency Optimization on Intel Processors. E2SC@SC Robert Schöne, Thomas Ilsche, Mario Bielert, Daniel Molka, Daniel Hackenberg
2016	J	`jnl`	The shift from processor power consumption to performance variations: fundamental implications at scale. Comput. Sci. Res. Dev. Joseph Schuchart, Daniel Hackenberg, Robert Schöne, Thomas Ilsche, Ramkumar Nagappan, Michael K. Patterson
2015	—	`conf`	An Energy Efficiency Feature Survey of the Intel Haswell Processor. IPDPS Workshops Daniel Hackenberg, Robert Schöne, Thomas Ilsche, Daniel Molka, Joseph Schuchart, Robin Geyer
2015	B	`conf`	Cache Coherence Protocol and Memory Performance of the Intel Haswell-EP Architecture. ICPP Daniel Molka, Daniel Hackenberg, Robert Schöne, Wolfgang E. Nagel
2015	—	`conf`	Power measurements for compute nodes: Improving sampling rates, granularity and accuracy. IGSC Thomas Ilsche, Daniel Hackenberg, Stefan Graul, Robert Schöne, Joseph Schuchart
2015	J	`jnl`	Wake-up latencies for processor idle states on current x86 processors. Comput. Sci. Res. Dev. Robert Schöne, Daniel Molka, Michael Werner
2014	—	`conf`	Analysis of Parallel Applications on a High Performance-Low Energy Computer. Euro-Par Workshops (2) Florina M. Ciorba, Thomas Ilsche, Elke Franz, Stefan Pfennig, Christian Scheunert, Ulf Markwardt, Joseph Schuchart, Daniel Hackenberg, Robert Schöne, Andreas Knüpfer, Wolfgang E. Nagel, Eduard A. Jorswieck, Matthias S. Müller
2014	—	`conf`	HDEEM: high definition energy efficiency monitoring. E2SC@SC Daniel Hackenberg, Thomas Ilsche, Joseph Schuchart, Robert Schöne, Wolfgang E. Nagel, Marc Simon, Yiannis Georgiou
2014	J	`jnl`	Integrating performance analysis and energy efficiency optimizations in a unified environment. Comput. Sci. Res. Dev. Robert Schöne, Daniel Molka
2014	—	`conf`	Main memory and cache performance of intel sandy bridge and AMD bulldozer. MSPC@PLDI Daniel Molka, Daniel Hackenberg, Robert Schöne
2014	J	`jnl`	Tools and methods for measuring and tuning the energy efficiency of HPC systems. Sci. Program. Robert Schöne, Jan Treibig, Manuel F. Dolz, Carla Guillén, Carmen B. Navarrete, Michael Knobloch, Barry Rountree
2013	—	`conf`	Introducing FIRESTARTER: A processor stress test utility. IGCC Daniel Hackenberg, Roland Oldenburg, Daniel Molka, Robert Schöne
2013	—	`conf`	Potentials and Limitations for Energy Efficiency Auto-Tuning. PARCO Robert Schöne, Andreas Knüpfer, Daniel Molka
2013	B	`conf`	Power measurement techniques on standard compute nodes: A quantitative comparison. ISPASS Daniel Hackenberg, Thomas Ilsche, Robert Schöne, Daniel Molka, Maik Schmidt, Wolfgang E. Nagel
2012	J	`jnl`	Flexible workload generation for HPC cluster efficiency benchmarking. Comput. Sci. Res. Dev. Daniel Molka, Daniel Hackenberg, Robert Schöne, Timo Minartz, Wolfgang E. Nagel
2012	—	`conf`	Memory Performance at Reduced CPU Clock Speeds: An Analysis of Current x86_64 Processors. HotPower Robert Schöne, Daniel Hackenberg, Daniel Molka
2011	—	`conf`	Memory Performance and SPEC OpenMP Scalability on Quad-Socket x86_64 Systems. ICA3PP (1) Daniel Molka, Robert Schöne, Daniel Hackenberg, Matthias S. Müller
2011	B	`conf`	On-line analysis of hardware performance events for workload characterization and processor frequency scaling decisions. ICPE Robert Schöne, Daniel Hackenberg
2011	—	`conf`	Simultaneous multithreading on x86_64 systems: an energy efficiency evaluation. HotPower@SOSP Robert Schöne, Daniel Hackenberg, Daniel Molka
2010	—	`conf`	Characterizing the energy consumption of data transfers and arithmetic operations on x86-64 processors. Green Computing Conference Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller
2010	J	`jnl`	Quantifying power consumption variations of HPC systems using SPEC MPI benchmarks. Comput. Sci. Res. Dev. Daniel Hackenberg, Robert Schöne, Daniel Molka, Matthias S. Müller, Andreas Knüpfer
2010	—	`conf`	The VampirTrace Plugin Counter Interface: Introduction and Examples. Euro-Par Workshops Robert Schöne, Ronny Tschüter, Thomas Ilsche, Daniel Hackenberg
2009	B	`conf`	Memory Performance and Cache Coherency Effects on an Intel Nehalem Multiprocessor System. PACT Daniel Molka, Daniel Hackenberg, Robert Schöne, Matthias S. Müller
2008	—	`conf`	The Chemomentum Data Services - A Flexible Solution for Data Handling in UNICORE. Euro-Par Workshops Katharina Rasch, Robert Schöne, Vitaliy Ostropytskyy, Hartmut Mix, Mathilde Romberg
2007	—	`conf`	Analyzing Cache Bandwidth on the Intel Core 2 Architecture. PARCO Robert Schöne, Wolfgang E. Nagel, Stefan Pflüger
2006	—	`conf`	Optimizing OpenMP Parallelized DGEMM Calls on SGI Altix 3700. Euro-Par Daniel Hackenberg, Robert Schöne, Wolfgang E. Nagel, Stefan Pflüger
2005	—	`conf`	Performance Comparison and Optimization: Case Studies using BenchIT. PARCO Robert Schöne, Guido Juckeland, Wolfgang E. Nagel, Stefan Pflüger, R. Wloch