Robert Rutten

29 papers C 2Journal 10Unranked 17
YearRankTypeTitle / Venue / Authors
2026 — conf
A 28nm CMOS SAR-Based Continuous-Time Pipeline ADC with 103dB SFDR and 270MHz Bandwidth Using NCF and DAC Error Calibration.
ISSCC
Qilong Liu, Robert Rutten, Muhammed Bolatkale, Arda Aralioglu, Gilbert Hardeman, Emil Siby, Patrick van Mourik, Vinoth Ilamurugan, Shagun Bajoria, Lucien J. Breems
2025 J jnl
A 6-GHz Continuous-Time Bandpass ΔΣ ADC With Background Filter Calibration and -100 dBc IM3 for a Mixer-Less DAB Band III Receiver.
IEEE J. Solid State Circuits
Shagun Bajoria, Robert Rutten, Muhammed Bolatkale, Yihan Gao, Hans Brekelmans, Bernard Burdiek, Hendrik van der Ploeg, Lucien J. Breems
2025 J jnl
Cancellation of Quantization Noise in Sigma Delta Modulators Through Modeling of Non-Linearities.
IEEE Trans. Circuits Syst. II Express Briefs
Stijn Ringeling, Marco Fattori, Robert Rutten, Shagun Bajoria, Lucien J. Breems, Eugenio Cantatore
2025 C conf
Quantization Noise Cancellation Through Modelling of Non-Linearities in Sigma Delta Modulators.
ISCAS
Stijn Ringeling, Marco Fattori, Shagun Bajoria, Robert Rutten, Lucien J. Breems, Eugenio Cantatore
2024 J jnl
A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme.
IEEE J. Solid State Circuits
Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems
2023 — conf
A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW.
VLSI Technology and Circuits
Sundeep Javvaji, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Bert Oude-Essink, Koen Beijens, Kofi A. A. Makinwa, Lucien J. Breems
2022 J jnl
A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm CMOS.
IEEE J. Solid State Circuits
Qilong Liu, Lucien J. Breems, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi I. Radulov
2022 J jnl
A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With -101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction.
IEEE J. Solid State Circuits
Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien J. Breems
2022 — conf
A 28nm 6GHz 2b Continuous-Time ΔΣ ADC with -101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction.
ISSCC
Muhammed Bolatkale, Robert Rutten, Hans Brekelmans, Shagun Bajoria, Yihan Gao, Bernard Burdiek, Lucien J. Breems
2022 — conf
A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW.
ESSCIRC
Pierluigi Cenci, Hans Brekelmans, Shagun Bajoria, Marcello Ganzerli, Bernard Burdiek, Robert Rutten, Yihan Gao, Muhammed Bolatkale, Paul Swinkels, Lucien J. Breems
2022 — conf
A 5GS/s 360MHz-BW 68dB-DR Continuous-Time 1-1-1 Filtering MASH ΔΣ ADC in 40nm CMOS.
ISSCC
Qilong Liu, Lucien J. Breems, Chenming Zhang, Shagun Bajoria, Muhammed Bolatkale, Robert Rutten, Georgi I. Radulov
2021 — conf
A 6GS/s 0.5GHz BW continuous-time 2-1-1 MASH ΔΣ modulator with phase-boosted current-mode ELD compensation in 40nm CMOS.
ESSCIRC
Chenming Zhang, Lucien J. Breems, Qilong Liu, Georgi I. Radulov, Muhammed Bolatkale, Shagun Bajoria, Robert Rutten, Arthur H. M. van Roermund
2019 — conf
A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS.
VLSI Circuits
Pierluigi Cenci, Muhammed Bolatkale, Robert Rutten, M. Ganzerli, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems
2017 — conf
A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparator.
ESSCIRC
Pierluigi Cenci, Muhammed Bolatkale, Robert Rutten, Gerard Lassche, Kofi A. A. Makinwa, Lucien J. Breems
2016 — conf
15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW.
ISSCC
Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche
2016 J jnl
A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth.
IEEE J. Solid State Circuits
Lucien J. Breems, Muhammed Bolatkale, Hans Brekelmans, Shagun Bajoria, Jan Niehof, Robert Rutten, Bert Oude-Essink, Franco Fritschij, Jagdip Singh, Gerard Lassche
2015 J jnl
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain with Carry-Save format numbers.
Microprocess. Microsystems
Yanxiang Huang, Ajay Kapoor, Robert Rutten, José Pineda de Gyvez
2013 — conf
A 13 bits 4.096 GHz 45 nm CMOS digital decimation filter chain using Carry-Save format numbers.
NORCHIP
Yanxiang Huang, Ajay Kapoor, Robert Rutten, José Pineda de Gyvez
2013 — conf
Wideband UHF ISM-band transceiver supporting multichannel reception and DSSS modulation.
ISSCC
Jan van Sinderen, Gerben W. de Jong, Frank Leong, Xin He, Melina Apostolidou, Harish Kundur Subramaniyan, Robert Rutten, Jan Niehof, Jos Verlinden, Hao Wang, Anton Hoogstraate, Ka Chun Kwok, Rene Verlinden, Reinier Hoogendoorn, Dennis Jeurissen, Anton Salfelner, Ewald Bergler, Javier M. Velandia Torres, Christopher J. Haji-Michael, Thomas Unterweger, Esa Tarvainen, Martin Posch, Reinhold Schmidt, Markus Stattmann, Jacek Tyminski, Patrick Jean, Sébastien Darfeuille, Olivier Aymard, Alexis le Grontec, Claire Boucey, Christophe Kelma, Guillaume Monnerie
2012 — conf
A 6.5 GHz Arbitrary Digital Waveform Generator.
ESSCIRC
Frank Leong, Robert Rutten, Nenad Pavlovic, Amine Mounaim
2011 J jnl
A 4 GHz Continuous-Time ΔΣ ADC With 70 dB DR and -74 dBFS THD in 125 MHz BW.
IEEE J. Solid State Circuits
Muhammed Bolatkale, Lucien J. Breems, Robert Rutten, Kofi A. A. Makinwa
2011 — conf
A 4GHz CT ΔΣ ADC with 70dB DR and -74dBFS THD in 125MHz BW.
ISSCC
Muhammed Bolatkale, Lucien J. Breems, Robert Rutten, Kofi A. A. Makinwa
2010 — conf
A 45nm WCDMA transmitter using direct quadrature voltage modulator with high oversampling digital front-end.
ISSCC
Xin He, Jan van Sinderen, Robert Rutten
2008 — conf
An Inverter-Based Hybrid ΔΣ Modulator.
ISSCC
Robert H. M. van Veldhoven, Robert Rutten, Lucien J. Breems
2008 C conf
Digital jitter-cancellation for narrowband signals.
ISCAS
Robert Rutten, Lucien J. Breems, Robert H. M. van Veldhoven
2007 J jnl
A 56 mW Continuous-Time Quadrature Cascaded ΣΔ Modulator With 77 dB DR in a Near Zero-IF 20 MHz Band.
IEEE J. Solid State Circuits
Lucien J. Breems, Robert Rutten, Robert H. M. van Veldhoven, Gerard van der Weide
2007 — conf
A 56mW CT Quadrature Cascaded ΣΔ Modulator with 77dB DR in a Near Zero-IF 20MHz Band.
ISSCC
Lucien J. Breems, Robert Rutten, Robert H. M. van Veldhoven, Gerard van der Weide, Henk A. H. Termeer
2006 — conf
Continuous-time Sigma-Delta Modulators for Highly Digitised Receivers.
ICECS
Lucien J. Breems, Robert H. M. van Veldhoven, Kathleen Philips, Robert Rutten, Gunnar Wetzker
2004 J jnl
A cascaded continuous-time ΣΔ Modulator with 67-dB dynamic range in 10-MHz bandwidth.
IEEE J. Solid State Circuits
Lucien J. Breems, Robert Rutten, Gunnar Wetzker