Robert Payne

19 papers A* 1Journal 5Unranked 12
YearRankTypeTitle / Venue / Authors
2024 — conf
A Sub-THz CMOS Transceiver IC and System for Medium-Reach Guided Wave and Short-Reach Wireless Communication Links.
MWSCAS
Swaminathan Sankaran, Gerd Schuppener, Juan Herbsommer, Bradley Kramer, Hassan Ali, Robert Payne, Carole Rush, Baher Haroun, Nirmal Warke
2015 — conf
An efficient and resilient ultra-high speed galvanic data isolator leveraging broad-band multi resonant tank electro-magnetic coupling.
VLSIC
Swaminathan Sankaran, Bradley Kramer, Gregory Howard, Benjamin Sutton, Randall Walberg, Vijaylaxmi Khanolkar, Robert Payne, Mark Morgan
2014 J jnl
A 12 Bit 1.6 GS/s BiCMOS 2×2 Hierarchical Time-Interleaved Pipeline ADC.
IEEE J. Solid State Circuits
Manar El-Chammas, Xiaopeng Li, Shigenobu Kimura, Kenneth Maclean, Jake Hu, Mark Weaver, Matthew Gindlesperger, Scott Kaylor, Robert Payne, Charles K. Sestok, William Bright
2013 — conf
A 10GS/s 6b time-interleaved ADC with partially active flash sub-ADCs.
CICC
Xiaochen Yang, Robert Payne, Jin Liu
2013 J jnl
A 5-Gb/s Automatic Sub-Bit Between-Pair Skew Compensator for Parallel Data Communications in 0.13-µm CMOS.
IEEE Trans. Very Large Scale Integr. Syst.
Yuxiang Zheng, Jin Liu, Robert Payne, Mark Morgan, Hoi Lee
2012 — conf
Session 7 overview: Multi-Gb/s receiver and parallel I/O techniques: Wireline subcommittee.
ISSCC
Robert Payne, Tatsuya Saito
2011 — conf
A 12b 1GS/s SiGe BiCMOS two-way time-interleaved pipeline ADC.
ISSCC
Robert Payne, Charles K. Sestok, William Bright, Manar El-Chammas, Marco Corsi, David Smith, Noam Tal
2011 — conf
Good, bad, ugly - 20 years of broadband evolution: What's next?
ISSCC
Jerry Lin, Franz Dielacher, Jing-Hong Conan Zhan, Robert Payne
2010 J jnl
A 16-Bit 100 to 160 MS/s SiGe BiCMOS Pipelined ADC With 100 dBFS SFDR.
IEEE J. Solid State Circuits
Robert Payne, Marco Corsi, David Smith, Tien-Ling Hsieh, Scott Kaylor
2010 — conf
A 16b 100-to-160MS/s SiGe BiCMOS pipelined ADC with 100dBFS SFDR.
ISSCC
Robert Payne, Marco Corsi, David Smith, Scott Kaylor, Daniel Hsieh
2010 — conf
Energy-efficient high-speed interfaces.
ISSCC
Naresh R. Shanbhag, Koichi Yamaguchi, Robert Payne
2009 — conf
A 18mW 10Gbps continuous-time FIR equalizer for wired line data communications in 0.12µm CMOS.
CICC
Hao Liu, Jin Liu, Robert Payne, Cy Cantrell, Mark Morgan
2009 — conf
Will ADCs overtake binary frontends in backplane signaling?
ISSCC
Ali Sheikholeslami, Robert Payne
2008 — conf
Future of High-Speed Transceivers (Forum).
ISSCC
Robert Payne
2007 — conf
Multi-GB/s Transceivers.
ISSCC
Robert Payne, Muneo Fukaishi
2005 J jnl
A 6.25-Gb/s binary transceiver in 0.13-μm CMOS for serial data transmission across high loss legacy backplane channels.
IEEE J. Solid State Circuits
Robert Payne, Paul E. Landman, Bhavesh Bhakta, Sridhar Ramaswamy, Song Wu, John D. Powers, M. Ulvi Erdogan, Ah-Lyan Yee, Richard Gu, Lin Wu, Yiqun Xie, Bharadwaj Parthasarathy, Keith C. Brouse, Wahed Mohammed, Keerthi Heragu, Vikas Gupta, Lisa Dyson, Wai Lee
1999 A* conf
Panel: What is the Proper System on Chip Design Methodology.
DAC
Richard Goering, Pierre Bricaud, James G. Dougherty, Steve Glaser, Michael Keating, Robert Payne, Davoud Samani
1997 — —
Self-timed field programmmable gate array architectures.
Robert Payne
1962 J jnl
Online digital computer measurement of a neurological control system.
Commun. ACM
Lawrence Stark, Robert Payne, Yutaka Okabe