Robert K. Montoye

33 papers A* 4A 1C 2Misc 3Journal 11Unranked 11
YearRankTypeTitle / Venue / Authors
2021 A* conf
Energy Efficiency Boost in the AI-Infused POWER10 Processor.
ISCA
Brian W. Thompto, Dung Q. Nguyen, José E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Müller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose
2017 C conf
Very Low Voltage (VLV) Design.
ICCD
Ramon Bertran, Pradip Bose, David M. Brooks, Jeff Burns, Alper Buyuktosunoglu, Nandhini Chandramoorthy, Eric Cheng, Martin Cochet, Schuyler Eldridge, Daniel J. Friedman, Hans M. Jacobson, Rajiv V. Joshi, Subhasish Mitra, Robert K. Montoye, Arun Paidimarri, Pritish Parida, Kevin Skadron, Mircea Stan, Karthik Swaminathan, Augusto Vega, Swagath Venkataramani, Christos Vezyrtzis, Gu-Yeon Wei, John-David Wellman, Matthew M. Ziegler
2014 J jnl
1 Mb 0.41 µm
IEEE J. Solid State Circuits
Jing Li, Robert K. Montoye, Masatoshi Ishii, Leland Chang
2014 Misc conf
Matrix-matrix multiplication on a large register file architecture with indirection.
HiPC
Dheeraj Sreedhar, Jeff H. Derby, Robert K. Montoye, Charles L. Johnson
2013 — conf
A 0.1pJ/b 5-to-10Gb/s charge-recycling stacked low-power I/O for on-chip signaling in 45nm CMOS SOI.
ISSCC
Yong Liu, Ping-Hsuan Hsieh, Seongwon Kim, Jae-sun Seo, Robert K. Montoye, Leland Chang, José A. Tierno, Daniel J. Friedman
2013 Misc conf
Processor architecture for software implementation of multi-sector G-RAKE receivers for HSUPA wireless infrastructure.
ICASSP
Dheeraj Sreedhar, Jeff H. Derby, Augusto J. Vega, Brian Rogers, Charles L. Johnson, Robert K. Montoye
2012 A* conf
Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor.
HPCA
Augusto Vega, Pradip Bose, Alper Buyuktosunoglu, Jeff H. Derby, Michele Franceschini, Charles Johnson, Robert K. Montoye
2011 — conf
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons.
CICC
Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D. Parker, Steven K. Esser, Robert K. Montoye, Bipin Rajendran, José A. Tierno, Leland Chang, Dharmendra S. Modha, Daniel J. Friedman
2011 — conf
A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation.
ISSCC
Gary S. Ditlow, Robert K. Montoye, Salvatore N. Storino, Sherman M. Dance, Sebastian Ehrenreich, Bruce M. Fleischer, Thomas W. Fox, Kyle M. Holmes, Junichi Mihara, Yutaka Nakamura, Shohji Onishi, Robert Shearer, Dieter F. Wendel, Leland Chang
2010 J jnl
A 270ps 20mW 108-bit End-around Carry Adder for Multiply-Add Fused Floating Point Unit.
J. Signal Process. Syst.
Xiao Yan Zhang, Yiu-Hing Chan, Robert K. Montoye, Leon J. Sigal, Eric M. Schwarz, Michael Kelly
2010 — conf
Performance and power evaluation of an in-line accelerator.
Conf. Computing Frontiers
Alejandro Rico, Jeff H. Derby, Robert K. Montoye, Timothy H. Heil, Chen-Yong Cher, Pradip Bose
2010 J jnl
Practical Strategies for Power-Efficient Computing Technologies.
Proc. IEEE
Leland Chang, David J. Frank, Robert K. Montoye, Steven J. Koester, Brian L. Ji, Paul W. Coteus, Robert H. Dennard, Wilfried Haensch
2008 J jnl
An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches.
IEEE J. Solid State Circuits
Leland Chang, Robert K. Montoye, Yutaka Nakamura, Kevin Batson, Richard J. Eickemeyer, Robert H. Dennard, Wilfried Haensch, Damir Jamsek
2008 A* conf
Custom is from Venus and synthesis from Mars.
DAC
Ruchir Puri, William H. Joyner, Shekhar Borkar, Ty Garibay, Jonathan Lotz, Robert K. Montoye
2006 — conf
Circuit Design Style for Energy Efficiency: LSDL and Compound Domino.
PATMOS
Xiao Yan Yu, Robert K. Montoye, Kevin J. Nowka, Bart R. Zeydel, Vojin G. Oklobdzija
2006 Misc conf
Gate-Induced Barrier Field Effect Transistor (GBFET) - A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems.
VLSI Design
Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown
2006 J jnl
Limited switch dynamic logic circuits for high-speed low-power circuit design.
IBM J. Res. Dev.
Wendy Belluomini, Damir Jamsek, Andrew K. Martin, Chandler McDowell, Robert K. Montoye, Hung C. Ngo, Jun Sawada
2006 — conf
VICTORIA: VMX indirect compute technology oriented towards in-line acceleration.
Conf. Computing Frontiers
Jeff H. Derby, Robert K. Montoye, José E. Moreira
2005 — conf
Controlled-Load Limited Switch Dynamic Logic Circuit.
ISQED
Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye, Richard B. Brown
2005 A conf
Testing and debugging delay faults in dynamic circuits.
ITC
Ramyanshu Datta, Sani R. Nassif, Robert K. Montoye, Jacob A. Abraham
2004 — conf
A low latency and low power dynamic Carry Save Adder.
ISCAS (2)
Ramyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka
2004 — conf
The four degrees of 3D.
ISPD
Robert K. Montoye
2004 — conf
The four degrees of 3D.
ISPD
Robert K. Montoye
1998 J jnl
A decompression core for PowerPC.
IBM J. Res. Dev.
Timothy M. Kemp, Robert K. Montoye, Jeffrey D. Harper, John D. Palmer, Daniel J. Auerbach
1990 J jnl
Design of the IBM RISC System/6000 Floating-Point Execution Unit.
IBM J. Res. Dev.
Robert K. Montoye, Erdem Hokenek, Stephen L. Runyon
1990 — conf
IBM second-generation RISC machine organization.
Compcon
H. B. Bakoglu, Gregory F. Grohoski, L. E. Thatcher, James A. Kahle, Charles R. Moore, David P. Tuttle, Warren E. Maule, W. R. Hardell Jr., Dwain A. Hicks, M. Nguyenphu, Robert K. Montoye, W. T. Glover, Sudhir Dhawan
1990 J jnl
Leading-Zero Anticipator (LZA) in the IBM RISC System/6000 Floating-Point Execution Unit.
IBM J. Res. Dev.
Erdem Hokenek, Robert K. Montoye
1990 J jnl
Second-generation RISC floating point with multiply-add fused.
IEEE J. Solid State Circuits
Erdem Hokenek, Robert K. Montoye, Peter W. Cook
1990 J jnl
The IBM RISC System/6000 Processor: Hardware Overview.
IBM J. Res. Dev.
H. B. Bakoglu, Gregory F. Grohoski, Robert K. Montoye
1989 C conf
IBM second-generation RISC machine organization.
ICCD
H. B. Bakoglu, Gregory F. Grohoski, L. E. Thatcher, James A. Kahle, Charles R. Moore, David P. Tuttle, Warren E. Maule, W. R. Hardell Jr., Dwain A. Hicks, M. Nguyenphu, Robert K. Montoye, W. T. Glover, Sudhir Dhawan
1984 — —
Optimization and Testing of Nmos Arithmetic Structures (Vlsi, Mos)
Robert K. Montoye
1982 J jnl
A Practical Algorithm for the Solution of Triangular Systems on a Parallel Processing System.
IEEE Trans. Computers
Robert K. Montoye, Duncan H. Lawrie
1981 A* conf
Area-time efficient addition in charge based technology.
DAC
Robert K. Montoye