Rijoy Mukherjee

15 papers Misc 1Journal 10Unranked 4
YearRankTypeTitle / Venue / Authors
2025 J jnl
Evaluating Large Language Models for Automatic Register Transfer Logic Generation for Combinational Circuits via High-Level Synthesis.
Found. Trends Electron. Des. Autom.
Sneha Swaroopa, Rijoy Mukherjee, Anushka Debnath, Rajat Subhra Chakraborty
2024 J jnl
Evaluating Large Language Models for Automatic Register Transfer Logic Generation via High-Level Synthesis.
CoRR
Sneha Swaroopa, Rijoy Mukherjee, Anushka Debnath, Rajat Subhra Chakraborty
2024 J jnl
HLS-IRT: Hardware Trojan Insertion through Modification of Intermediate Representation During High-Level Synthesis.
ACM Trans. Design Autom. Electr. Syst.
Rijoy Mukherjee, Archisman Ghosh, Rajat Subhra Chakraborty
2024 — conf
Security Vulnerabilities in AI Hardware: Threats and Countermeasures.
ATS
Rijoy Mukherjee, Sneha Swaroopa, Rajat Subhra Chakraborty
2023 J jnl
Attacks on Recent DNN IP Protection Techniques and Their Mitigation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rijoy Mukherjee, Rajat Subhra Chakraborty
2022 J jnl
A comprehensive survey of physical and logic testing techniques for Hardware Trojan detection and prevention.
J. Cryptogr. Eng.
Rijoy Mukherjee, Sree Ranjani Rajendran, Rajat Subhra Chakraborty
2022 J jnl
Novel Hardware Trojan Attack on Activation Parameters of FPGA-Based DNN Accelerators.
IEEE Embed. Syst. Lett.
Rijoy Mukherjee, Rajat Subhra Chakraborty
2021 — conf
APUF-BNN: An Automated Framework for Efficient Combinational Logic Based Implementation of Arbiter PUF through Binarized Neural Network.
ACM Great Lakes Symposium on VLSI
Pranesh Santikellur, Rijoy Mukherjee, Rajat Subhra Chakraborty
2020 J jnl
Probabilistic Hardware Trojan Attacks on Multiple Layers of Reconfigurable Network Infrastructure.
J. Hardw. Syst. Secur.
Rijoy Mukherjee, Vidya Govindan, Sandhya Koteshwara, Amitabh Das, Keshab K. Parhi, Rajat Subhra Chakraborty
2020 — conf
SoK: Physical and Logic Testing Techniques for Hardware Trojan Detection.
ASHES@CCS
Sree Ranjani Rajendran, Rijoy Mukherjee, Rajat Subhra Chakraborty
2017 J jnl
Design of Testable Adder in Quantum-dot Cellular Automata with Fault Secure Logic.
Microelectron. J.
Mrinal Goswami, Bibhash Sen, Rijoy Mukherjee, Biplab K. Sikdar
2016 J jnl
A Processing In-Memory Realization Using QCA: Proposal and Implementation.
CoRR
Pritam P. Chougule, Bibhash Sen, Rijoy Mukherjee, Vijay C. Karade, P. S. Patil, Tukaram D. Dongale, Rajanish K. Kamat
2016 J jnl
On the reliability of majority logic structure in quantum-dot cellular automata.
Microelectron. J.
Bibhash Sen, Yashraj Sahu, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar
2016 Misc conf
Towards Designing Reliable Universal QCA Logic in the Presence of Cell Deposition Defect.
VLSID
Bibhash Sen, Rajdeep Kumar Nath, Rijoy Mukherjee, Yashraj Sahu, Biplab K. Sikdar
2014 — conf
Design of Fault Tolerant Universal Logic in QCA.
ISED
Bibhash Sen, Rijoy Mukherjee, Rajdeep Kumar Nath, Biplab K. Sikdar