Riichiro Shirota

11 papers A 1Journal 8Unranked 2
YearRankTypeTitle / Venue / Authors
2015 — conf
Improvement of oxide reliability in NAND flash memories using tight endurance cycling with shorter idling period.
IRPS
Riichiro Shirota, Bo-Jun Yang, Yung-Yueh Chiu, Yu-Ting Wu, Pin-Yao Wang, Jung-Ho Chang, Masaru Yano, Minoru Aoki, Toshiaki Takeshita, C.-Y. Wang, Ikuo Kurachi
2006 — conf
Roadmap of the Flash Memory.
MTDT
Riichiro Shirota
2002 J jnl
A 125-mm
IEEE J. Solid State Circuits
Kenichi Imamiya, Hiroshi Nakamura, Toshihiko Himeno, Toshio Yamamura, Tamio Ikehashi, Ken Takeuchi, Kazushige Kanda, Koji Hosono, Takuya Futatsuyama, Koichi Kawai, Riichiro Shirota, Norihisa Arai, Fumitaka Arai, Kazuo Hatakeyama, Hiroaki Hazama, Masanobu Saito, Hisataka Meguro, Kevin Conley, Khandker Quader, Jian J. Che
2002 A conf
Test and Repair of Non-Volatile Commodity and Embedded Memories (NAND Flash Memory).
ITC
Riichiro Shirota
1999 J jnl
A 130-mm/
IEEE J. Solid State Circuits
Kenichi Imamiya, Yoshihisa Sugiura, Hiroshi Nakamura, Toshihiko Himeno, Ken Takeuchi, Tamio Ikehashi, Kazushige Kanda, Koji Hosono, Riichiro Shirota, Seiichi Aritome, Kazuhiro Shimizu, Kazuo Hatakeyama, Koji Sakui
1997 J jnl
A compact on-chip ECC for low cost flash memories.
IEEE J. Solid State Circuits
Toru Tanzawa, Tomoharu Tanaka, Ken Takeuchi, Riichiro Shirota, Seiichi Aritome, Hiroshi Watanabe, Gertjan Hemink, Kazuhiro Shimizu, Shinji Sato, Yuji Takeuchi, Kazunori Ohuchi
1994 J jnl
A quick intelligent page-programming architecture and a shielded bitline sensing method for 3 V-only NAND flash memory.
IEEE J. Solid State Circuits
Tomoharu Tanaka, Yoshiyuki Tanaka, Hiroshi Nakamura, Koji Sakui, Hideko Oodaira, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka, Hisashi Hara
1993 J jnl
Reliability issues of flash memory cells.
Proc. IEEE
Seiichi Aritome, Riichiro Shirota, Gertjan Hemink, Tetsuo Endoh, Fujio Masuoka
1991 J jnl
A 4 Mb NAND EEPROM with tight programmed V
IEEE J. Solid State Circuits
Masaki Momodomi, Tomoharu Tanaka, Yoshihisa Iwata, Yoshiyuki Tanaka, Hideko Oodaira, Yasuo Itoh, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka
1990 J jnl
A high-density NAND EEPROM with block-page programming for microcomputer applications.
IEEE J. Solid State Circuits
Yoshihisa Iwata, Masaki Momodomi, Tomoharu Tanaka, Hideko Oodaira, Yasuo Itoh, Ryozo Nakayama, Ryouhei Kirisawa, Seiichi Aritome, Tetsuo Endoh, Riichiro Shirota, Kazunori Ohuchi, Fujio Masuoka
1989 J jnl
An experimental 4-Mbit CMOS EEPROM with a NAND-structured cell.
IEEE J. Solid State Circuits
Masaki Momodomi, Yasuo Itoh, Riichiro Shirota, Yoshihisa Iwata, Ryozo Nakayama, Ryouhei Kirisawa, Tomoharu Tanaka, Seiichi Aritome, Tetsuo Endoh, Kazunori Ohuchi, Fujjo Masuoka