Richard Dorrance

22 papers A 1B 2C 1Journal 8Unranked 9

Year	Rank	Type	Title / Venue / Authors
2025	C	`conf`	CAMEL: Capacitive Analog In-Memory Equalization for RF Signal Processing. ISCAS Md. Shahrul Islam, Kshama Lakshmi Ranganatha, Richard Dorrance, Siddharth Joshi
2024	—	`conf`	A PVT Robust 8-Bit Signed Analog Compute-In-Memory Accelerator with Integrated Activation Functions for AI Applications. VLSI Technology and Circuits Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Niranjan Gowda, Brent R. Carlton
2023	J	`jnl`	A 2-Gb/s UWB Transceiver for Short-Range Reconfigurable FDD Wireless Networks. IEEE J. Solid State Circuits Renzhi Liu, K. T. Asma Beevi, Richard Dorrance, Timothy F. Cox, Rinkle Jain, Tolga Acikalin, Zhen Zhou, Tae-Young Yang, Johanny Escobar-Pelaez, Shuhei Yamada, Kenneth P. Foust, Brent R. Carlton
2023	J	`jnl`	A Charge Domain SRAM Compute-in-Memory Macro With C-2C Ladder-Based 8-Bit MAC Unit in 22-nm FinFET Process for Edge Inference. IEEE J. Solid State Circuits Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Dan Lake, Brent R. Carlton
2023	J	`jnl`	An Energy-Efficient Bayesian Neural Network Accelerator With CiM and a Time-Interleaved Hadamard Digital GRNG Using 22-nm FinFET. IEEE J. Solid State Circuits Richard Dorrance, Deepak Dasalukunte, Hechen Wang, Renzhi Liu, Brent R. Carlton
2022	—	`conf`	A 32.2 TOPS/W SRAM Compute-in-Memory Macro Employing a Linear 8-bit C-2C Ladder for Charge Domain Computation in 22nm for Edge Inference. VLSI Technology and Circuits Hechen Wang, Renzhi Liu, Richard Dorrance, Deepak Dasalukunte, Xiaosen Liu, Dan Lake, Brent R. Carlton, May Wu
2022	—	`conf`	An Analysis of Complex-Valued CNNs for RF Data-Driven Wireless Device Classification. ICC Jun Chen, Weng-Keen Wong, Bechir Hamdaoui, Abdurrahman Elmaghbub, Kathiravetpillai Sivanesan, Richard Dorrance, Lily L. Yang
2022	J	`jnl`	An Analysis of Complex-Valued CNNs for RF Data-Driven Wireless Device Classification. CoRR Jun Chen, Weng-Keen Wong, Bechir Hamdaoui, Abdurrahman Elmaghbub, Kathiravetpillai Sivanesan, Richard Dorrance, Lily L. Yang
2022	J	`jnl`	Low latency communication over commercially available LTE and remote driving. CoRR Andrey Belogolovy, Deepak Dasalukunte, Richard Dorrance, Evgeny Stupachenko, Xue Zhang
2021	J	`jnl`	A Vector Processor for Mean Field Bayesian Channel Estimation. IEEE Trans. Very Large Scale Integr. Syst. Deepak Dasalukunte, Richard Dorrance, Le Liang, Lu Lu
2020	B	`conf`	A Digital Root Based Modular Reduction Technique for Power Efficient, Fault Tolerance in FPGAs. FPL Richard Dorrance, Andrey Belogolovy, Hechen Wang, Xue Zhang
2020	J	`jnl`	An 802.11ba-Based Wake-Up Radio Receiver With Wi-Fi Transceiver Integration. IEEE J. Solid State Circuits Renzhi Liu, K. T. Asma Beevi, Richard Dorrance, Deepak Dasalukunte, Vinod Kristem, Mario A. Santana Lopez, Alexander W. Min, Shahrnaz Azizi, Minyoung Park, Brent R. Carlton
2019	—	`conf`	An Ultra-Low Power, Fully Integrated Wake-Up Receiver and Digital Baseband with All-Digital Impairment Correction and -92.4dBm Sensitivity for 802.11ba. VLSI Circuits Richard Dorrance, Renzhi Liu, K. T. Asma Beevi, Deepak Dasalukunte, Mario A. Santana Lopez, Vinod Kristem, Shahrnaz Azizi, Brent R. Carlton
2018	J	`jnl`	802.11g/n Compliant Fully Integrated Wake-Up Receiver With -72-dBm Sensitivity in 14-nm FinFET CMOS. IEEE J. Solid State Circuits Erkan Alpman, Ahmad Khairi, Richard Dorrance, Minyoung Park, V. Srinivasa Somayazulu, Jeffrey R. Foerster, Ashoke Ravi, Jeyanandh Paramesh, Stefano Pellerano
2018	—	`conf`	A cm-scale self-powered intelligent and secure IoT edge mote featuring an ultra-low-power SoC in 14nm tri-gate CMOS. ISSCC Tanay Karnik, Dileep Kurian, Paolo A. Aseron, Richard Dorrance, Erkan Alpman, Angela Nicoara, Roman Popov, Leonid Azarenkov, Mikhail J. Moiseev, Li Zhao, Santosh Ghosh, Rafael Misoczki, Ankit Gupta, M. Akhila, Sriram Muthukumar, Saurabh Bhandari, Satish Yada, Kartik Jain, Robert Flory, Chanitnan Kanthapanit, Eduardo Quijano, Bradley Jackson, Hao Luo, Suhwan Kim, Vaibhav A. Vaidya, Adel Elsherbini, Renzhi Liu, Farhana Sheikh, Omesh Tickoo, Ilya Klotchkov, Manoj R. Sastry, Sheldon Sun, Mukesh Bhartiya, Anuradha Srinivasan, Yatin Hoskote, Hong Wang, Vivek De
2016	—	`conf`	A 190GFLOPS/W DSP for energy-efficient sparse-BLAS in embedded IoT. VLSI Circuits Richard Dorrance, Dejan Markovic
2015	—	`—`	An Energy-Efficient Sparse-BLAS Coprocessor using STT-MRAM. Richard Dorrance
2014	A	`conf`	A scalable sparse matrix-vector multiplication kernel for energy-efficient sparse-blas on FPGAs. FPGA Richard Dorrance, Fengbo Ren, Dejan Markovic
2013	B	`conf`	A single-precision compressive sensing signal reconstruction engine on FPGAs. FPL Fengbo Ren, Richard Dorrance, Wenyao Xu, Dejan Markovic
2012	—	`conf`	A body-voltage-sensing-based short pulse reading circuit for spin-torque transfer RAMs (STT-RAMs). ISQED Fengbo Ren, Henry Park, Richard Dorrance, Yuta Toriyama, Chih-Kong Ken Yang, Dejan Markovic
2011	—	`conf`	Analysis of STT-RAM cell design with multiple MTJs per access. NANOARCH Henry Park, Richard Dorrance, Amr Amin Hafez, Fengbo Ren, Dejan Markovic, Chih-Kong Ken Yang
2011	—	`conf`	Scalability and design-space analysis of a 1T-1MTJ memory cell. NANOARCH Richard Dorrance, Fengbo Ren, Yuta Toriyama, Amr Amin Hafez, Chih-Kong Ken Yang, Dejan Markovic