Richard C. Jaeger

32 papers C 2Journal 16Unranked 14
YearRankTypeTitle / Venue / Authors
2018 — conf
First and Second Order Piezoresistive Characteristics of CMOS FETs: Weak through Strong Inversion.
ESSDERC
Richard C. Jaeger, Jeffrey C. Suhling
2014 J jnl
An X-Band Radar Transceiver MMIC with Bandwidth Reduction in 0.13 µm SiGe Technology.
IEEE J. Solid State Circuits
Jianjun Yu, Feng Zhao, Joseph Cali, Fa Foster Dai, Desheng Ma, Xueyang Geng, Yuehai Jin, Yuan Yao, Xin Jin, J. David Irwin, Richard C. Jaeger
2014 — conf
Current dependence of the piezoresistive coefficients of CMOS FETs on (100) silicon.
ESSDERC
Safina Hussain, Richard C. Jaeger, Jeffrey C. Suhling
2011 J jnl
An X- and Ku-Band Wideband Recursive Receiver MMIC With Gain-Reuse.
IEEE J. Solid State Circuits
Desheng Ma, Fa Foster Dai, Richard C. Jaeger, J. David Irwin
2010 J jnl
24-Bit 5.0 GHz Direct Digital Synthesizer RFIC With Direct Digital Modulations in 0.13 μ m SiGe BiCMOS Technology.
IEEE J. Solid State Circuits
Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2010 J jnl
A 12-Bit Vernier Ring Time-to-Digital Converter in 0.13 μm CMOS Technology.
IEEE J. Solid State Circuits
Jianjun Yu, Fa Foster Dai, Richard C. Jaeger
2010 J jnl
An 11-Bit 8.6 GHz Direct Digital Synthesizer MMIC With 10-Bit Segmented Sine-Weighted DAC.
IEEE J. Solid State Circuits
Xueyang Geng, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2009 J jnl
Delta-Sigma Modulation for Direct Digital Frequency Synthesis.
IEEE Trans. Very Large Scale Integr. Syst.
Dayu Yang, Foster F. Dai, Weining Ni, Yin Shi, Richard C. Jaeger
2008 J jnl
A 12 GHz 1.9 W Direct Digital Synthesizer MMIC Implemented in 0.18 µm SiGe BiCMOS Technology.
IEEE J. Solid State Circuits
Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2008 J jnl
A 12-Bit Cryogenic and Radiation-Tolerant Digital-to-Analog Converter for Aerospace Extreme Environment Applications.
IEEE Trans. Ind. Electron.
Yuan Yao, Foster F. Dai, Richard C. Jaeger, John D. Cressler
2008 — conf
A fully integrated zero-IF mobile TV tuner RFIC for S-band CMMB application.
CICC
Yin Shi, Fa Foster Dai, Jun Yan, Hua Xu, Xuelian Zhang, Heping Ma, Fang Yuan, Xin Guan, Richard C. Jaeger
2008 — conf
A multifunction transceiver RFIC for 802.11a/b/g WLAN and DVB-H applications.
CICC
Yin Shi, Foster F. Dai, Jun Yan, Xueqing Hu, Hua Xu, Ming Gu, Xuelian Zhang, Qiming Xu, Bei Chen, Fangxiong Chen, Peng Yu, Heping Ma, Fang Yuan, Richard C. Jaeger
2008 — conf
An 11-bit 8.6GHz direct digital synthesizer MMIC with 10-bit segmented nonlinear DAC.
ESSCIRC
Xueyang Geng, Xuefeng Yu, Fa Foster Dai, J. David Irwin, Richard C. Jaeger
2008 — conf
An X/Ku-band frequency synthesizer using a 9-Bit quadrature DDS.
CICC
Xuefeng Yu, Fa Foster Dai, Dayu Yang, J. David Irwin, Richard C. Jaeger
2006 C conf
A 12-bit current steering DAC for cryogenic applications.
ISCAS
Yuan Yao, Xuefeng Yu, Foster F. Dai, Richard C. Jaeger
2006 J jnl
A direct digital frequency synthesizer with fourth-order phase domain ΔΣ noise shaper and 12-bit current-steering DAC.
IEEE J. Solid State Circuits
Fa Foster Dai, Weining Ni, Yin Shi, Richard C. Jaeger
2006 C conf
A direct-conversion mixer with DC-offset cancellation for IEEE 802.11a WLAN receiver.
ISCAS
Oimins Xu, Xueqing Hu, Pens Gao, Jun Yan, Yin Shi, Foster F. Dai, Richard C. Jaeger
2006 — conf
Delta-Sigma Modulation in Direct Digital Frequency Synthesis.
CICC
Dayu Yang, Weining Ni, Fa Foster Dai, Yin Shi, Richard C. Jaeger
2005 — conf
An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networks.
ISCAS (2)
Vasanth Kakani, Foster F. Dai, Richard C. Jaeger
2005 — conf
Integrated blind electronic equalizer for fiber dispersion compensation.
ISCAS (6)
Foster F. Dai, Shengfang Wei, Richard C. Jaeger
2004 — conf
A novel DDS architecture using nonlinear ROM addressing with improved compression ratio and quantisation noise.
ISCAS (2)
Malinky Ghosh, Lakshmi S. J. Chimakurthy, Foster F. Dai, Richard C. Jaeger
2004 — conf
Delay analysis and optimal biasing for high speed low power Current Mode Logic circuits.
ISCAS (2)
Vasanth Kakani, Foster F. Dai, Richard C. Jaeger
2000 J jnl
CMOS stress sensors on [100] silicon.
IEEE J. Solid State Circuits
Richard C. Jaeger, Jeffrey C. Suhling, Ramanathan Ramani, Arthur T. Bradley, Jianping Xu
1999 J jnl
Neuro-fuzzy architecture for CMOS implementation.
IEEE Trans. Ind. Electron.
Bogdan M. Wilamowski, Richard C. Jaeger, M. Okyay Kaynak
1999 — conf
Test chips for die stress characterization using arrays of CMOS sensors.
CICC
Arthur T. Bradley, Richard C. Jaeger, Jeffrey C. Suhling, Y. Zou
1996 — conf
CMOS implementation of a pulse-coupled neuron cell.
ICNN
Bogdan M. Wilamowski, Richard C. Jaeger, Mary Lou Padgett, Lawrence J. Myers
1996 — conf
Implementation of RBF type networks by MLP networks.
ICNN
Bogdan M. Wilamowski, Richard C. Jaeger
1996 J jnl
Low-frequency noise in UHV/CVD epitaxial Si and SiGe bipolar transistors.
IEEE J. Solid State Circuits
Lakshmi S. Vempati, John D. Cressler, Jeffrey Babcock, Richard C. Jaeger, David L. Harame
1992 J jnl
A high-speed sensing scheme for 1T dynamic RAMs utilizing the clamped bit-line sense amplifier.
IEEE J. Solid State Circuits
Travis N. Blalock, Richard C. Jaeger
1991 J jnl
A high-speed clamped bit-line current-mode sense amplifier.
IEEE J. Solid State Circuits
Travis N. Blalock, Richard C. Jaeger
1986 J jnl
Computer-Aided Design of One-Dimensional MOSFET Impurity Profiles.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Richard C. Jaeger
1983 J jnl
An Efficient Numerical Algorithm for Simulation of MOS Capacitance.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Richard C. Jaeger, Fritz H. Gaensslen, Sherra E. Diehl