Riccardo Scarsi

19 papers A* 1A 7Journal 8Unranked 3
YearRankTypeTitle / Venue / Authors
2003 J jnl
Scheduling battery usage in mobile systems.
IEEE Trans. Very Large Scale Integr. Syst.
Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2001 J jnl
Battery-Driven Dynamic Power Management.
IEEE Des. Test Comput.
Luca Benini, Giuliano Castelli, Alberto Macii, Riccardo Scarsi
2001 J jnl
Discrete-time battery models for system-level low-power design.
IEEE Trans. Very Large Scale Integr. Syst.
Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2001 A conf
Extending lifetime of portable systems by battery scheduling.
DATE
Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2001 J jnl
Stream synthesis for efficient power simulation based on spectral transforms.
IEEE Trans. Very Large Scale Integr. Syst.
Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000 A conf
A Discrete-Time Battery Model for High-Level Power Estimation.
DATE
Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000 J jnl
A multilevel engine for fast power simulation of realistic inputstreams.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
2000 A conf
A spatially-adaptive bus interface for low-switching communication (poster session).
ISLPED
Andrea Acquaviva, Riccardo Scarsi
2000 J jnl
Architectures and synthesis algorithms for power-efficient businterfaces.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Luca Benini, Alberto Macii, Massimo Poncino, Riccardo Scarsi
2000 — conf
Battery-Driven Dynamic Power Management of Portable Systems.
ISSS
Luca Benini, Giuliano Castelli, Alberto Macii, Enrico Macii, Riccardo Scarsi
2000 J jnl
Glitch power minimization by selective gate freezing.
IEEE Trans. Very Large Scale Integr. Syst.
Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999 A conf
Glitch Power Minimization by Gate Freezing.
DATE
Luca Benini, Giovanni De Micheli, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999 — conf
Regression-Based Macromodeling for Delay Estimation of Behavioral Components.
Great Lakes Symposium on VLSI
Alberto Macii, Enrico Macii, Giuseppe Odasso, Massimo Poncino, Riccardo Scarsi
1999 J jnl
Symbolic synthesis of clock-gating logic for power optimization of synchronous controllers.
ACM Trans. Design Autom. Electr. Syst.
Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1999 A* conf
Synthesis of Low-Overhead Interfaces for Power-Efficient Communication over Wide Buses.
DAC
Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1998 A conf
Stream synthesis for efficient power simulation based on spectral transforms.
ISLPED
Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1998 A conf
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits.
ICCAD
Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi
1997 A conf
Fast power estimation for deterministic input streams.
ICCAD
Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi
1997 — conf
Symbolic synthesis of clock-gating logic for power optimization of control-oriented synchronous networks.
ED&TC
Luca Benini, Giovanni De Micheli, Enrico Macii, Massimo Poncino, Riccardo Scarsi