Riccardo Della Sala

39 papers C 1Journal 19Unranked 19
YearRankTypeTitle / Venue / Authors
2026 J jnl
Two-Stage Inverter-Based OTA With 56-dB Gain and Digitally Reconfigurable GBW/SR for PVT-Resiliency.
IEEE Trans. Circuits Syst. I Regul. Pap.
Riccardo Della Sala, Marco Privitera, Giuseppe Scotti, Alfio Dario Grasso, Massimo Alioto
2025 — conf
A $200 \text{FOM}_{\mathrm{L}}, 0.3 \mathrm{V}$, and 2nW Fully Differential Bulk-Driven OTA Exploiting Current Mirrors.
NewCAS
Riccardo Della Sala, Noor Ul Amin, Orazio Aiello, Roslina Mohd Sidek, Fakhrul Zaman Rokhani, Pasquale Tommasino
2025 J jnl
A 0.3 V Ultra-Low Power Hysteresis Comparator With SRAM-Based Output Stage and Its Application in Asynchronous Sigma-Delta Modulators.
IEEE Access
Riccardo Della Sala, Giovanni Nicolini, Giuseppe Scotti
2025 — conf
A 0.3V Hysteresis Comparator with Bulk-Based SRAM Output Stage.
PRIME
Giovanni Nicolini, Riccardo Della Sala, Giuseppe Scotti
2025 — conf
A 0.3V, 2.34nW and 56db Gain Bulk-Driven OTA Exploiting Cascode Output Stages and Enhanced Current Mirrors.
LASCAS
Riccardo Della Sala, Orazio Aiello, Giuseppe Scotti
2025 — conf
A 138.39 FoMS, 2.8 nW, 65dB, Digital-Based OTA for Bio-Signal Processing Applications.
NewCAS
Riccardo Della Sala, Ali Namdari, Orazio Aiello, Daniele D. Caviglia, Pasquale Tommasino
2025 C conf
A Body-Driven, 1.8 nW, 75 dB Gain, Single Stage OTA, for ULV and ULP Applications.
ISCAS
Riccardo Della Sala, Giovanni Nicolini, Giuseppe Scotti
2025 — conf
A Novel 0.62 nW Inverter Based Digital-OTA.
LASCAS
Riccardo Della Sala, Orazio Aiello, Giuseppe Scotti
2025 J jnl
Exploiting Body-Driven Feedbacks in Physical Unclonable Functions for Ultra Low Voltage, Ultra Low Power Applications: A 0.3 V Weak-PUF.
IEEE Trans. Circuits Syst. I Regul. Pap.
Riccardo Della Sala, Davide Bellizia, Francesco Centurelli, Giuseppe Scotti, Alessandro Trifiletti
2025 — conf
Exploring 0.3V Inverter Based OTA Designs with NOR3-Based Common Mode Feedback.
NewCAS
Riccardo Della Sala, Orazio Aiello, Ngo-Doanh Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, Giuseppe Scotti
2025 — conf
Sub-10nW, 73dB Gain, Inverter-Based Digital OTA with C-Muller Input Stage and Novel CMFB for Enhanced Performance in IoT Applications.
NewCAS
Riccardo Della Sala, Reza Shokri, Orazio Aiello, Daniele D. Caviglia, Giuseppe Scotti
2024 J jnl
A Novel High Performance Standard-Cell Based ULV OTA Exploiting an Improved Basic Amplifier.
IEEE Access
Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti
2024 — conf
A Novel Technique to Design Ultra-Low Voltage and Ultra-Low Power Inverter-Based OTAs.
PRIME
Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti
2024 — conf
Ask Less, Get More: On Reducing the Resource Consumption and Improving Statistical Performance of Ring Oscillator PUFs on FPGA.
ApplePies
Riccardo Della Sala, Giuseppe Scotti
2024 — conf
Enhancing Performance of Ultra-Low Voltage Body-Driven Comparators Through Clocked Supply Voltage.
PRIME
Riccardo Della Sala, Cristian Bocciarelli, Valerio Spinogatti, Francesco Centurelli, Alessandro Trifiletti
2024 — conf
Evaluation and Comparison of Physical Unclonable Functions suitable for FPGA Implementation.
DCIS
Riccardo Della Sala, Giuseppe Scotti
2024 J jnl
On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation.
IEEE Access
Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti
2024 J jnl
Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications.
IEEE Access
Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti, Gaetano Palumbo
2024 J jnl
Unveiling the True Power of the Latched Ring Oscillator for a Unified PUF and TRNG Architecture.
IEEE Trans. Very Large Scale Integr. Syst.
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2023 J jnl
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations.
IEEE Access
Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti
2023 — conf
A 2.5 GHz, 0.6 V Body Driven Dynamic Comparator Exploiting Charge Pump Based Dynamic Biasing.
PRIME
Cristian Bocciarelli, Francesco Centurelli, Riccardo Della Sala, Valerio Spinogatti, Alessandro Trifiletti
2023 J jnl
A Novel FPGA Implementation of the NAND-PUF with Minimal Resource Usage and High Reliability.
Cryptogr.
Riccardo Della Sala, Giuseppe Scotti
2023 — conf
A Novel Ultra-Low Voltage Fully Synthesizable Comparator exploiting NAND Gates.
PRIME
Riccardo Della Sala, Cristian Bocciarelli, Francesco Centurelli, Valerio Spinogatti, Alessandro Trifiletti
2023 J jnl
A body-driven rail-to-rail 0.3 V operational transconductance amplifier exploiting current gain stages.
Int. J. Circuit Theory Appl.
Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti
2023 J jnl
An Improved Strong Arm Comparator With Integrated Static Preamplifier.
IEEE Access
Valerio Spinogatti, Riccardo Della Sala, Cristian Bocciarelli, Francesco Centurelli, Alessandro Trifiletti
2023 J jnl
Exploiting the DD-Cell as an Ultra-Compact Entropy Source for an FPGA-Based Re-Configurable PUF-TRNG Architecture.
IEEE Access
Riccardo Della Sala, Giuseppe Scotti
2023 — conf
On Enhancing the Throughput of the Latched Ring Oscillator TRNG on FPGA.
ApplePies
Riccardo Della Sala, Giuseppe Scotti
2023 — conf
Robust Body Biasing Techniques for Dynamic Comparators.
PRIME
Valerio Spinogatti, Cristian Bocciarelli, Francesco Centurelli, Riccardo Della Sala, Alessandro Trifiletti
2022 J jnl
A Lightweight FPGA Compatible Weak-PUF Primitive Based on XOR Gates.
IEEE Trans. Circuits Syst. II Express Briefs
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2022 J jnl
A Novel Differential to Single-Ended Converter for Ultra-Low-Voltage Inverter-Based OTAs.
IEEE Access
Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti
2022 J jnl
A Novel Ultra-Compact FPGA-Compatible TRNG Architecture Exploiting Latched Ring Oscillators.
IEEE Trans. Circuits Syst. II Express Briefs
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2022 J jnl
Enabling ULV Fully Synthesizable Analog Circuits: The BA Cell, a Standard-Cell-Based Building Block for Analog Design.
IEEE Trans. Circuits Syst. II Express Briefs
Riccardo Della Sala, Francesco Centurelli, Giuseppe Scotti
2022 J jnl
High-Throughput FPGA-Compatible TRNG Architecture Exploiting Multistimuli Metastable Cells.
IEEE Trans. Circuits Syst. I Regul. Pap.
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2022 — conf
High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain.
PRIME
Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti
2022 — conf
Sub-μW Front-End Low Noise Amplifier for Neural Recording Applications.
PRIME
Riccardo Della Sala, Francesco Centurelli, Pietro Monsurrò, Giuseppe Scotti
2022 — conf
The DD-Cell: a Double Side Entropic Source exploitable as PUF and TRNG.
PRIME
Riccardo Della Sala, Giuseppe Scotti
2021 J jnl
A Novel Ultra-Compact FPGA PUF: The DD-PUF.
Cryptogr.
Riccardo Della Sala, Davide Bellizia, Giuseppe Scotti
2021 J jnl
SC-DDPL as a Countermeasure against Static Power Side-Channel Attacks.
Cryptogr.
Davide Bellizia, Riccardo Della Sala, Giuseppe Scotti
2019 — conf
Area-Efficient Low-Power Bandpass Gm-C Filter for Epileptic Seizure Detection in 130nm CMOS.
ICECS
Riccardo Della Sala, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti